My Inquiry
My Account
Microchip Technology ATR2406-PNQG 86
- Part No.:
- ATR2406-PNQG 86
- Manufacturer:
- Microchip Technology
- Category:
- RF Transceiver ICs
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
ATR2406-PNQG 86.pdf
- Description:
- IC RF TXRX ISM>1GHZ 32QFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,269
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ATR2406-PNQG from Microchip Technology (formerly Atmel) is a fully integrated 2.4 GHz ISM band low-IF transceiver in QFN32 (5 × 5 × 0.9 mm) package, featuring integrated LNA (−93 dBm sensitivity), +4 dBm TX output, GFSK modulation at 72–1152 kBit/s, and on-chip clock recovery for 1152 kBit/s data streams - deployed in wireless game controllers and telemetry systems.
For engineers reviewing the ATR2406-PNQG datasheet, ATR2406-PNQG pinout, ATR2406-PNQG application, or ATR2406-PNQG equivalent, key selection considerations include its 95-channel frequency-hopping capability, auxiliary 3.2–4.6 V regulator support, 3-wire SPI interface timing (10 MHz max), and compliance with FCC Part 15, ETSI EN 300 328, and ARIB STD-T-66.
Technical Context
The ATR2406-PNQG implements a low-IF architecture with 864 kHz IF frequency, image-rejection mixer, integrated Gaussian filter, and fully integrated VCO with on-chip inductors and varactors. Its PLL uses a 1.728 MHz phase detector frequency and supports programmable main/swallow counters for precise channel tuning across 95 channels.
It delivers clock recovery synchronized to the transmitter's clock via RX-CLOCK (Pin 6), enabling optimal sampling of RX_DATA on the falling edge - eliminating external clock distribution overhead. The ramp generator (RAMP_OUT, Pin 21) provides controlled voltage steps (1.3–1.75 V) for external PA power ramping per D12/D13 register settings.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Band | 2.400–2.483 GHz ISM band - covers all 95 defined channels with ±10 kHz frequency drift tolerance per slot. |
| RX Sensitivity | −93 dBm @ BER ≤ 10⁻³, 1152 kBit/s - enables reliable reception in low-SNR environments like multi-user toys. |
| TX Output Power | +4 dBm typical over full temperature range - sufficient for short-range wireless audio/video without external PA. |
| Data Rates | 72 / 144 / 288 / 576 / 1152 kBit/s GFSK - supports scalable throughput for telemetry and point-of-sale applications. |
| Supply Voltage | 2.9–3.6 V unregulated main supply; auxiliary regulator accepts 3.2–4.6 V input - enables flexible battery or regulated rail sourcing. |
| Interface | 3-wire SPI (CLOCK/DATA/ENABLE) up to 10 MHz - minimal GPIO count for microcontroller integration. |
| Regulatory Compliance | FCC CFR47 Part 15, ETSI EN 300 328, ARIB STD-T-66 - certified for global 2.4 GHz ISM deployment without additional RF approval. |
Pinout & Package
ATR2406-PNQG is housed in a lead-free QFN32 package (5 × 5 × 0.9 mm) with exposed thermal paddle (GND). All pins are surface-mount compatible; IC-labeled pins (7, 22, 23) are internal connections and must remain unconnected on PCB.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PU_REG (1) | Auxiliary regulator enable | Activates on-chip 3.2–4.6 V regulator and VCO supply - required before PU_TRX for full power-up sequence. |
| REF_CLK (2) | Reference clock input | Accepts 10.368 MHz or 13.824 MHz sinusoidal input (250–500 mVRMS) - sets PLL reference for channel accuracy. |
| RSSI (3) | Analog received signal strength indicator | Outputs 0.3–2.1 V linearly proportional to RF input level (−96 to −36 dBm) - used for link quality monitoring. |
| VS_IFD (4) | Digital IF supply | Provides dedicated 2.9–3.6 V rail for digital IF circuits - decoupling critical for clock recovery stability. |
| RX-CLOCK (6) | Recovered clock output | Falling-edge-aligned clock for RX_DATA sampling - eliminates need for external clock recovery circuitry at 1152 kBit/s. |
| RX_IN1/RX_IN2 (18–19) | Differential RF input | Accepts balanced 50 Ω antenna signal - high IIP3 (−15 dBm) ensures robustness against interferers in dense 2.4 GHz environments. |
| TX_OUT (20) | Transmit driver output | Delivers +4 dBm into 50 Ω load - requires external balun/filter (e.g., µStrip) per Figure 7 for spectral compliance. |
| RAMP_OUT (21) | PA ramp control output | Generates 1.3–1.75 V ramp per D12/D13 register setting - controls external PA turn-on/turn-off to meet spurious emission limits. |
| TX_ON (25) | Transmit activation control | Edge-triggered enable for TX path - initiates RAMP_OUT sequence and activates PA; must be timed per Figure 5. |
| PU_TRX (27) | Core transceiver power-up | Enables RX/TX/PLL/VCO blocks after PU_REG - minimum 40 µs delay required before programming or operation. |
| RX_DATA (28) | Demodulated data output | CMOS-level serial data stream - sampled on falling edge of RX-CLOCK (Pin 6) when clock recovery is active. |
| TX_DATA (29) | Baseband data input | Accepts GFSK-modulated bitstream - filtered internally by Gaussian filter with GFCS-adjustable deviation (±400 kHz nominal). |
| CLOCK/DATA/ENABLE (30–32) | 3-wire SPI interface | Asynchronous serial bus for register configuration - no handshake; latched on ENABLE rising edge after MSB-first transfer. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated clock recovery | Eliminates external clock recovery IC at 1152 kBit/s - reduces BOM cost and board space while synchronizing RX_DATA sampling to transmitter clock. |
| On-chip auxiliary regulator | Supports 3.2–4.6 V input to generate stable 3.0 V VREG and 2.7 V VREG_VCO - enables single-cell Li-ion or alkaline battery operation without external LDO. |
| Programmable Gaussian filter | GFCS bits (D9–D11) adjust modulation deviation from 60% to 130% of ±400 kHz - compensates for production tolerances to meet spectral mask requirements. |
| Multi-channel hopping support | 95 pre-defined channels with ETSI-compliant frequency hopping - provides interference resilience in crowded 2.4 GHz environments like wireless headsets. |
| Low-power modes | Power-down current <1 µA with PU_TRX = PU_REG = 0 - extends battery life in intermittent telemetry or point-of-sale devices. |
Applications
| Wireless Game Controllers | Telemetry Systems |
|---|---|
Use Scenario: Bidirectional low-latency communication between handheld controller and console or PC, operating in multi-user environments with co-located 2.4 GHz devices. IC Role / Device Role / Timing Role: Full-duplex transceiver handling both TX (button/axis data) and RX (vibration feedback, firmware updates) with 100 µs RX→TX switching time. Use Value: Integrated clock recovery ensures deterministic timing at 1152 kBit/s, reducing MCU processing load and jitter in real-time control loops. | Use Scenario: Battery-powered remote sensor nodes transmitting temperature, pressure, or motion data to gateway at intervals ranging from seconds to hours. IC Role / Device Role / Timing Role: Low-power transceiver with <1 µA shutdown current and fast wake-up (40 µs RSSI readiness), supporting scheduled burst transmission. Use Value: Auxiliary regulator allows direct connection to 3.6 V Li-ion cells, eliminating external DC/DC converter and extending operational lifetime by >20%. |
| Electronic Point of Sale (POS) | Wireless Audio/Video Streaming |
Use Scenario: Cordless barcode scanner or payment terminal communicating with host system in retail environments with multiple concurrent 2.4 GHz links. IC Role / Device Role / Timing Role: Frequency-hopping transceiver using ETSI-compliant channel selection to avoid interference from Wi-Fi, Bluetooth, or other POS units. Use Value: 95-channel support and 350 µs channel switch time enable rapid re-hopping during packet loss, maintaining >99.5% link uptime in dense deployments. | Use Scenario: Short-range uncompressed stereo audio or video streaming from source (e.g., smartphone) to receiver (e.g., speaker, display) with sub-10 ms latency. IC Role / Device Role / Timing Role: High-data-rate (1152 kBit/s) GFSK transceiver with +4 dBm output and −93 dBm sensitivity - sustains robust link at 5–10 m line-of-sight. Use Value: Integrated Gaussian filter and ramp generator ensure spectral purity and spurious emissions below −40.5 dBc, meeting FCC/ETSI radiated emission limits without external filtering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2.4 GHz ISM transceiver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CC2530F256RHAT | Integrated 8051 MCU + 256 kB flash; lower RX sensitivity (−97 dBm); Zigbee/Proprietary stack support | Requires embedded protocol stack development; better suited for mesh networks than point-to-point streaming | Select when MCU co-location and Zigbee compatibility are required; not drop-in for ATR2406-PNQG's standalone transceiver use case |
| nRF24L01+ | No integrated clock recovery; lower TX power (+0 dBm); proprietary 250 kBit/s–2 MBit/s GFSK; no auxiliary regulator | Lacks 1152 kBit/s clock recovery and 3.2–4.6 V auxiliary input - needs external LDO for battery operation | Choose for cost-sensitive, lower-throughput applications where MCU handles clock recovery; verify regulatory testing coverage separately |
Compared with CC2530F256RHAT and nRF24L01+, the ATR2406-PNQG uniquely combines clock recovery at 1152 kBit/s, integrated auxiliary regulation, and ETSI/FCC/ARIB triple compliance - making it optimal for latency-critical, battery-powered, standards-certified 2.4 GHz links without embedded software overhead.
Availability
ATR2406-PNQG is available at Aetrix Electronics and suitable for wireless game controllers, telemetry systems, electronic point-of-sale terminals, and wireless audio/video streaming requiring stable component supply and full regulatory certification.
Supply support for ATR2406-PNQG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains its RF product portfolio, emphasizing high-integration, low-power wireless solutions for industrial and consumer markets.
The ATR2406 product line was designed for cost-sensitive, standards-compliant 2.4 GHz ISM band applications requiring minimal external components - targeting wireless peripherals, telemetry, and short-range streaming where clock recovery and regulatory alignment are critical.
FAQ
What is the maximum data rate supported by the ATR2406-PNQG with on-chip clock recovery?
The ATR2406-PNQG supports on-chip clock recovery exclusively at 1152 kBit/s GFSK modulation. At this rate, the recovered clock is output on Pin 6 (RX-CLOCK), with data sampled on its falling edge. Lower rates (72–576 kBit/s) require external clocking - the ATR2406-PNQG does not provide clock recovery functionality below 1152 kBit/s.
Does the ATR2406-PNQG require external matching components for its RF ports?
Yes, the ATR2406-PNQG requires external balun and low-pass filtering for both RX_IN1/RX_IN2 and TX_OUT. Figure 7 in the datasheet shows a µStrip balun and lowpass filter implementation. These components are mandatory to meet FCC/ETSI spectral mask requirements and ensure impedance matching to 50 Ω antennas - omitting them results in out-of-band emissions exceeding regulatory limits.
How does the auxiliary voltage regulator in the ATR2406-PNQG function, and what supply range does it accept?
The ATR2406-PNQG's auxiliary regulator accepts 3.2–4.6 V input (VS_REG, Pin 11) and generates 3.0 V (VREG, Pin 10) and 2.7 V (VREG_VCO, Pin 13) outputs. It is enabled via PU_REG (Pin 1) and powers the VCO and analog sections. This allows direct connection to single-cell Li-ion (3.6 V nominal) or alkaline batteries without external regulators - the ATR2406-PNQG itself does not regulate the main 2.9–3.6 V VS_TRX supply.
Can the ATR2406-PNQG operate without the auxiliary regulator enabled?
Yes, the ATR2406-PNQG can operate without the auxiliary regulator: PU_REG is held low, and the main supply (VS_TRX, Pin 17) must be 2.9–3.6 V. In this mode, internal VCO and analog supplies are derived from VS_TRX, resulting in reduced TX output power stability and narrower temperature margin. The ATR2406-PNQG datasheet specifies +4 dBm output only "with AUX regulator" - operation without it requires validation per application conditions.
What is the purpose of the RAMP_OUT pin (Pin 21) on the ATR2406-PNQG, and how is its voltage controlled?
RAMP_OUT (Pin 21) provides a programmable voltage ramp to control an external power amplifier's turn-on/turn-off timing. Its output voltage is set by D12/D13 bits in the TX register: 00=1.3 V, 01=1.35 V, 10=1.4 V, 11=1.75 V. This ramp starts on assertion of TX_ON (Pin 25) and ensures compliant spectral occupancy during PA switching - critical for passing FCC/ETSI spurious emission tests.
ATR2406-PNQG 86 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- TxRx Only
- RF Family/Standard:
- General ISM > 1GHz
- Protocol:
- -
- Modulation:
- GFSK
- Frequency:
- 2.4GHz
- Data Rate (Max):
- 1.125Mbps
- Power - Output:
- 4dBm
- Sensitivity:
- -93dBm
- Memory Size:
- -
- Serial Interfaces:
- SPI
- GPIO:
- -
- Voltage - Supply:
- 2.9V ~ 3.6V
- Current - Receiving:
- 31mA
- Current - Transmitting:
- 16mA
- Operating Temperature:
- -10°C ~ 60°C
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 32-QFN (5x5)
ATR2406-PNQG 86 FAQ
1.How can I place an order for ATR2406-PNQG 86 through Aetrix?
Please submit a Request for Quotation (RFQ) for ATR2406-PNQG 86 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATR2406-PNQG 86 reliable?
The price and inventory of ATR2406-PNQG 86 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATR2406-PNQG 86 is usually 5 days.
3.What payment methods are accepted for ATR2406-PNQG 86?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATR2406-PNQG 86 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATR2406-PNQG 86?
ATR2406-PNQG 86 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATR2406-PNQG 86 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATR2406-PNQG 86?
For technical support, including ATR2406-PNQG 86 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATR2406-PNQG 86 requirements.
6.How does Aetrix verify that ATR2406-PNQG 86 is sourced from the original manufacturer or authorized distributors?
All ATR2406-PNQG 86 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATR2406-PNQG 86 meets industry standards.
7.What is the process for return or replacement of ATR2406-PNQG 86?
All ATR2406-PNQG 86 units undergo pre-shipment inspection (PSI). If there is an issue with ATR2406-PNQG 86, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATR2406-PNQG 86 part is unused and in its original packaging.
Return procedure for ATR2406-PNQG 86:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ATR2406-PNQG 86 Tags
-
ESP32-D0WD-V3
Espressif Systems
-
ESP8266EX
Espressif Systems
-
ESP32-S3
Espressif Systems
-
NRF24L01P-R7
Nordic Semiconductor ASA
-
NRF24L01P-R
Nordic Semiconductor ASA
-
ESP32-U4WDH
Espressif Systems
-
DA14531-00000OG2
Renesas
-
ESP32-C6FH4
Espressif Systems
-
DA14531-00000FX2
Renesas
-
NRF24L01P-T
Nordic Semiconductor ASA
-
NRF52810-QCAA-R
Nordic Semiconductor ASA
-
ESP32-S3FN8
Espressif Systems
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
