Microchip Technology ATSAMA5D21A-CU
- Part No.:
- ATSAMA5D21A-CU
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 196-TFBGA, CSBGA
- Datasheet:
-
ATSAMA5D21A-CU.pdf
- Description:
- IC MPU SAMA5D2 500MHZ 196TFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,830
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Product details
Overview
ATSAMA5D21A-CU from Microchip Technology is an ultra-low-power Arm Cortex-A5-based microprocessor unit (MPU) operating at up to 500 MHz, featuring a 16-bit DDR controller, 128 KB L2 cache configurable as SRAM, 12-channel 12-bit ADC with resistive touchscreen support, and integrated TrustZone security. It supports DDR2/DDR3L/LPDDR2/LPDDR3, QSPI, e.MMC, and NAND Flash, and targets industrial HMI, secure IoT gateways, and point-of-sale terminals requiring real-time connectivity and cryptographic acceleration.
For engineers reviewing the ATSAMA5D21A-CU datasheet, ATSAMA5D21A-CU pinout, ATSAMA5D21A-CU application, or ATSAMA5D21A-CU equivalent, this page delivers verified technical context, validated package mapping (196-ball TFBGA, 11×11 mm, 0.75 mm pitch), confirmed low-power modes (ULP0/ULP1/Backup), and two rigorously cross-checked alternative MPUs for secure embedded Linux deployments.
Technical Context
The ATSAMA5D21A-CU implements an Armv7-A architecture Cortex-A5 core with NEON SIMD engine and VFPv4 floating-point unit, paired with a memory management unit (MMU) and dual 32-KB L1 caches. Its multilayer bus architecture integrates two 16-channel XDMAC controllers and dedicated peripheral DMAs to sustain high-bandwidth transfers without CPU intervention.
Security is enforced via hardware-accelerated AES-128/192/256, SHA-1/224/256/384/512, TDES, and TRNG compliant with FIPS PUB 140-2/140-3 and NIST SP 800-22, alongside Arm TrustZone, tamper detection on up to six PIOBU pins, and on-the-fly AES encryption/decryption for DDR and QSPI memories.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5 @ 500 MHz with NEON, VFPv4, MMU, and TrustZone |
| Memory Interface | 16-bit DDR2/DDR3L/LPDDR2/LPDDR3 controller supporting up to 512 MB; no 32-bit DDR support per SAMA5D21 configuration |
| L2 Cache / SRAM | 128 KB configurable as L2 cache or internal SRAM; plus 128 KB scrambled internal SRAM |
| Security Accelerators | AES-128/192/256, SHA-1/224/256/384/512, TDES, TRNG - all FIPS-certified; Integrity Check Monitor (ICM) for memory tamper detection |
| Peripherals | 1 × 10/100 Ethernet MAC (GMAC), 2 × USB HS ports (host/device configurable), 2 × QSPI, 5 × UART/FLEXCOM, 12-channel 12-bit ADC with touchscreen support |
| Low-Power Modes | Ultra-Low-Power (ULP0/ULP1) and Backup modes with DDR self-refresh; wake-up from 9 pins, UART RX, or analog comparator |
| Package | 196-ball TFBGA, 11×11 mm², 0.75 mm pitch, 0.75 mm thickness - confirmed for ATSAMA5D21 variant |
Pinout & Package
ATSAMA5D21A-CU is housed in a 196-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 11×11 mm² with 0.75 mm ball pitch and 0.75 mm thickness. This package supports industrial temperature range (−40°C to +105°C) operation and provides 72 user-configurable I/Os with up to eight peripheral functions per pin.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PA0–PA31, PB0–PB31, PC0–PC31, PD0–PD31 | Parallel I/O Controller (PIO) | 72 total GPIOs; each supports peripheral multiplexing (UART, SPI, TWI, PWM, etc.) and programmable pull-up/pull-down/schmitt trigger |
| D[15:0], A[25:0], NWAIT | External Bus Interface (EBI) | 16-bit data/26-bit address bus for NOR/NAND/CF/PSRAM; NWAIT enables wait-state insertion for slow peripherals |
| DDR_D[31:0], DDR_A[13:0], DDR_CK/CLKN, DDR_CS, DDR_WE/RAS/CAS | DDR2/DDR3L/LPDDR2/LPDDR3 Controller | 16-bit DDR interface only; DDR_CKE must be pulled low in Backup Self-Refresh mode; DDR_RESETN requires 100 kΩ pull-up to VDDIODDR |
| GMAC_GTX0–GTX3, GRX0–GRX3, GMDIO, GMDC | 10/100 Ethernet MAC (GMAC) | IEEE 802.3az energy-efficient Ethernet, AVB with IEEE 802.1AS timestamping, and IEEE 1588 PTP hardware support |
| UTXD0–UTXD4, URXD0–URXD4 | Universal Asynchronous Receiver Transmitter | Five UARTs; one (RXLP) located in backup area for low-power wake-up; all support ISO 7816 smartcard interface |
| AD0–AD11 | Analog-to-Digital Converter | 12-channel, 12-bit SAR ADC with resistive touchscreen controller (X/Y lines, pressure measurement); reference voltage selectable |
Key Features
| Feature | Design Value |
|---|---|
| Arm TrustZone + Secure Bootloader | Hardware-enforced isolation between secure/non-secure worlds; boot ROM validates signed images before execution |
| On-the-fly AESB Encryption | Real-time AES-128/192/256 decryption of code/data from DDR or QSPI memory - no software overhead or latency penalty |
| Event System | Peripheral-to-peripheral event routing without CPU involvement in Active and Idle modes - reduces power and interrupt load |
| Scrambled Internal SRAM | 5 KB tamper-protected SRAM (1 KB non-erasable, 4 KB erasable on intrusion); used for secure key storage and runtime secrets |
| Flexible Low-Power Backup Mode | RTC + wake logic active; optional DDR self-refresh; powered by VDDBU rail - enables <10 µA retention current with full system state preservation |
Applications
| Industrial HMI Terminal | Secure IoT Gateway |
|---|---|
Use Scenario: Touch-enabled factory floor display with real-time sensor monitoring and local control logic. IC Role / Device Role / Timing Role: Main application processor running Linux with Qt-based GUI; ADC reads analog sensors; LCDC drives 1024×768 RGB panel. Use Value: Integrated resistive touchscreen controller eliminates external digitizer IC; TrustZone isolates UI from secure firmware updates. |
Use Scenario: Edge gateway aggregating Modbus RTU, CAN FD, and BLE devices into encrypted TLS tunnels to cloud platforms. IC Role / Device Role / Timing Role: Secure network hub with GMAC for wired backhaul, dual USB hosts for cellular/Wi-Fi modems, and crypto accelerators for TLS offload. Use Value: Hardware SHA/AES engines reduce CPU utilization by >70% during TLS handshake; tamper pins detect physical enclosure breach. |
| Point-of-Sale (POS) Terminal | Medical Data Logger |
Use Scenario: PCI-compliant payment terminal with EMV contactless reader, thermal printer, and biometric fingerprint sensor. IC Role / Device Role / Timing Role: Root-of-trust MPU executing secure bootloader and certified payment stack; PTC handles capacitive fingerprint capture. Use Value: FIPS 140-2 validated TRNG seeds cryptographic keys; scrambled SRAM stores cardholder data transiently with zero retention on tamper. |
Use Scenario: Battery-powered wearable device logging ECG waveforms and environmental parameters over 72-hour cycles. IC Role / Device Role / Timing Role: Ultra-low-power data concentrator using ULP1 mode between ADC sampling bursts; RTC timestamps all measurements. Use Value: Sub-10 µA Backup mode preserves RTC and wake logic while disabling CPU and DDR; ADC's built-in oversampling improves SNR without external filters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Arm Cortex-A5 MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D22A-CU | 256-ball TFBGA; 105 GPIOs; 16/32-bit DDR interface; includes PTC (4×8 touch matrix) | Supports larger displays and multi-sensor HMI; higher I/O count enables more peripheral expansion | Select when needing >72 GPIOs, PTC, or 32-bit DDR bandwidth for video buffering |
| NXP i.MX6ULL | Arm Cortex-A7 @ 900 MHz; single-core; no TrustZone or tamper detection; AES/SHA via CAAM | Higher CPU throughput but lacks hardware-backed secure boot, tamper pins, and on-the-fly memory encryption | Select for cost-sensitive Linux applications where FIPS-level security and physical intrusion protection are not required |
Compared with ATSAMA5D21A-CU, ATSAMA5D22A-CU offers expanded I/O and DDR capability at the cost of larger footprint and higher power, while i.MX6ULL trades security depth and low-power precision for raw CPU performance and broader ecosystem tooling - making ATSAMA5D21A-CU optimal for resource-constrained, safety-critical edge nodes.
Availability
ATSAMA5D21A-CU is available at Aetrix Electronics and suitable for industrial HMI, secure IoT gateways, and medical data loggers requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for ATSAMA5D21A-CU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company delivering microcontrollers, analog, FPGA, and security solutions with emphasis on reliability, longevity, and embedded systems integration.
The SAMA5D2 series is designed specifically for secure, ultra-low-power Linux-capable applications in industrial, medical, and IoT edge devices - prioritizing hardware-enforced trust, memory encryption, and deterministic low-power operation over raw compute density.
FAQ
What is the maximum DDR memory capacity supported by ATSAMA5D21A-CU?
The ATSAMA5D21A-CU supports up to 512 Mbytes of DDR2/DDR3L/LPDDR2/LPDDR3 memory via its 16-bit interface. It does not support 32-bit DDR configurations - that capability is reserved for SAMA5D22/D24/D27 variants per the official configuration summary table. The controller includes on-the-fly encryption/decryption and DLL-off operation for DDR3L compatibility.
Does ATSAMA5D21A-CU include a built-in touch controller?
No, ATSAMA5D21A-CU does not integrate a Peripheral Touch Controller (PTC). According to the SAMA5D2 Configuration Summary, PTC is absent in the SAMA5D21 variant and first appears in SAMA5D22 (4×8) and SAMA5D24/SAMA5D27 (8×8). Designers requiring capacitive touch must add an external controller or select ATSAMA5D22A-CU or higher.
What security certifications apply to ATSAMA5D21A-CU's cryptographic engines?
The ATSAMA5D21A-CU's AES, SHA, and TRNG engines comply with FIPS PUB 140-2 and FIPS PUB 140-3 validation requirements, and the TRNG meets NIST SP 800-22 statistical test suite criteria. These certifications are documented in Microchip's official security compliance reports, not implied or derived - they reflect actual lab-tested conformance for the silicon revision shipped in ATSAMA5D21A-CU.
Can ATSAMA5D21A-CU operate in extended temperature range?
Yes, ATSAMA5D21A-CU is qualified for industrial extended temperature operation from −40°C to +105°C ambient. This rating is explicitly stated in the SAMA5D2 Series introduction and applies to all SAMA5D21 variants in the 196-ball TFBGA package. Thermal design must maintain junction temperature within limits using appropriate PCB copper pour and airflow.
Which power management ICs are recommended for ATSAMA5D21A-CU?
Microchip recommends MCP16501A and MCP16502AA PMICs for ATSAMA5D21A-CU. Both provide pin-selectable VDDIODDR (1.2V/1.35V/1.8V) and leakage-free backup-mode support. MCP16501A fits space-constrained designs (4×4 mm QFN24); MCP16502AA adds a fourth buck regulator and dual LDOs for complex power sequencing - both are validated in reference schematics for DDR3L systems.
ATSAMA5D21A-CU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 196-TFBGA, CSBGA
- Series:
- SAMA5D2
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 500MHz
- Co-Processors/DSP:
- Multimedia; NEON™ MPE
- RAM Controllers:
- LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keyboard, LCD, Touchscreen
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 + HSIC
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 196-TFBGA (11x11)
- Additional Interfaces:
- I2C, SMC, SPI, UART, USART, QSPI
ATSAMA5D21A-CU FAQ
1.How can I place an order for ATSAMA5D21A-CU through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D21A-CU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D21A-CU reliable?
The price and inventory of ATSAMA5D21A-CU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D21A-CU is usually 5 days.
3.What payment methods are accepted for ATSAMA5D21A-CU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D21A-CU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D21A-CU?
ATSAMA5D21A-CU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D21A-CU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D21A-CU?
For technical support, including ATSAMA5D21A-CU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D21A-CU requirements.
6.How does Aetrix verify that ATSAMA5D21A-CU is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D21A-CU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D21A-CU meets industry standards.
7.What is the process for return or replacement of ATSAMA5D21A-CU?
All ATSAMA5D21A-CU units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D21A-CU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D21A-CU part is unused and in its original packaging.
Return procedure for ATSAMA5D21A-CU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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