Microchip Technology ATSAMA5D21B-CU
- Part No.:
- ATSAMA5D21B-CU
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 196-TFBGA, CSBGA
- Datasheet:
-
ATSAMA5D21B-CU.pdf
- Description:
- IC MPU SAMA5D2 500MHZ 196TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ATSAMA5D21B-CU from Microchip Technology is an ultra-low-power Arm Cortex-A5-based microprocessor unit (MPU) operating at up to 500 MHz, featuring a 128-Kbyte configurable L2 cache, TrustZone security, and hardware crypto accelerators (AES-256, SHA-256, TRNG). It integrates a 10/100 Ethernet MAC, dual CAN-FD controllers, USB high-speed host/device ports, and supports DDR2/DDR3L/LPDDR2/LPDDR3 memory. It targets secure industrial HMI, IoT gateways, and point-of-sale terminals requiring real-time connectivity and tamper-resistant boot.
For engineers reviewing the ATSAMA5D21B-CU datasheet, ATSAMA5D21B-CU pinout, ATSAMA5D21B-CU application, or ATSAMA5D21B-CU equivalent, this page delivers verified technical context, validated package mapping (196-ball TFBGA, 11×11 mm), confirmed low-power modes (ULP0/ULP1/Backup), exact peripheral count (5 FLEXCOMs, 12-channel 12-bit ADC), and two validated alternative MPUs with documented functional differences.
Technical Context
The ATSAMA5D21B-CU implements an Armv7-A architecture Cortex-A5 core with NEON SIMD engine and floating-point unit (FPU), paired with a Memory Management Unit (MMU) and dual 32-Kbyte L1 caches. Its multilayer bus architecture supports 2×16-channel DMA controllers for zero-overhead data transfers between peripherals including GMAC, ISC, LCDC, and SDMMC.
Security is enforced via Arm TrustZone, 5-Kbyte scrambled SRAM (1-Kbyte nonerasable on tamper), eight tamper pins (PIOBU0–7), Integrity Check Monitor (ICM) using SHA-256, and on-the-fly AES encryption/decryption for DDR and QSPI memories. The device includes dedicated PLLs: one 600–1200 MHz system PLL, one 480 MHz USB PLL, and a digital fractional audio PLL.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5 @ up to 500 MHz with NEON, FPU, MMU, and TrustZone |
| Memory Support | DDR2/DDR3L/LPDDR2/LPDDR3 (16-bit bus), QSPI, e.MMC, NAND with 32-bit PMECC |
| Security | Hardware AES-256/SHA-256/TRNG, 5-Kbyte tamper-protected SRAM, ICM, secure bootloader |
| Connectivity | 1× 10/100 EMAC with IEEE 1588 PTP, 2× CAN-FD (non-ISO), 2× USB HS (host/device), 2× QSPI |
| Peripherals | 12-channel 12-bit ADC with touchscreen support, 5× FLEXCOM (USART/SPI/TWI), 4× PWM + 6× TC |
| Low-Power Modes | ULP0 (512 Hz clocking), ULP1 (full clock stop), Backup (RTC + DDR self-refresh) |
| I/O Count | 72 programmable PIO lines with 8-function multiplexing per pin |
Pinout & Package
ATSAMA5D21B-CU is housed in a 196-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 11×11 mm² with 0.75 mm pitch and 0.75 mm thickness. This package supports industrial temperature range (−40°C to +105°C) operation and is optimized for compact, thermally constrained embedded designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| XIN / XOUT | Main crystal oscillator interface | Supports 8–24 MHz external crystal; required for system clock generation and PLL reference |
| XIN32 / XOUT32 | 32.768 kHz slow clock oscillator | Feeds RTC and low-power wake-up logic; enables timekeeping during Backup mode |
| NRST | Active-low reset input | Asynchronous processor reset; asserted low to initialize CPU, peripherals, and memory controllers |
| SHDN | Shutdown control output | Drives external PMIC (e.g., MCP16501A) to enter BSR mode; coordinated with PIOBU0 for backup entry/exit |
| PIOBU0–7 | Tamper/wake-up inputs | Eight dedicated pins for static/dynamic intrusion detection and asynchronous wake-up from ULP/Backup modes |
| GTX0–GTX3 / GRX0–GRX3 | GMAC transmit/receive data | 4-bit parallel MII interface; supports 10/100 Mbps Ethernet with AVB and IEEE 1588 timestamping |
| CANRX0 / CANTX0 | CAN-FD controller 0 interface | Dedicated differential pair for non-ISO CAN FD communication; supports time-triggered transmission |
| SDMMC0_CMD / SDMMC0_DAT[7:0] | e.MMC 4.51 / SD 3.0 host interface | 8-bit wide data path with command/response protocol; enables boot-from-eMMC and high-throughput storage |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled secure execution environment | Hardware-isolated secure world for bootloader, crypto keys, and sensitive firmware; prevents unauthorized access to protected memory regions |
| On-the-fly AESB encryption/decryption engine | Secures DDR and QSPI memory contents transparently during read/write operations without software overhead or latency penalty |
| Event System with peripheral-to-peripheral routing | Enables autonomous peripheral interaction (e.g., ADC trigger → PWM update) without CPU intervention in Active and Idle modes |
| Configurable 128-Kbyte L2 cache or internal SRAM | Reduces external memory bandwidth demand; when used as SRAM, provides fast deterministic access for real-time tasks |
| Integrated Integrity Check Monitor (ICM) | Automatically verifies SHA-256 hash of critical code/data in QSPI/DDR; triggers secure exception on tampering or corruption |
| Ultra-low-power Backup mode with DDR self-refresh | Maintains full system state including DDR contents while consuming <100 µA; enables instant wake-up with no boot delay |
Applications
| Industrial HMI Terminal | Secure IoT Gateway |
|---|---|
Use Scenario: A wall-mounted factory floor display with capacitive touch, Ethernet backhaul, and local sensor aggregation. IC Role / Device Role / Timing Role: ATSAMA5D21B-CU serves as main application processor running Linux, managing LCDC (1024×768), PTC (8×8 touch), GMAC, and CAN-FD for PLC interfacing. Use Value: Integrated TrustZone and AESB enable secure OTA updates and encrypted local data storage; ULP1 mode extends battery life during idle periods. |
Use Scenario: Edge gateway aggregating BLE/Zigbee sensor data, encrypting payloads, and forwarding via TLS-secured Ethernet to cloud. IC Role / Device Role / Timing Role: ATSAMA5D21B-CU executes Linux networking stack, runs crypto engines for TLS offload, and interfaces with multiple FLEXCOMs for wireless SoC bridging. Use Value: Hardware SHA-256 and TRNG accelerate certificate validation and key generation; 128-Kbyte L2 cache improves packet processing throughput. |
| Point-of-Sale (POS) Terminal | Medical Data Logger |
Use Scenario: PCI-compliant retail terminal with contactless payment, receipt printing, and biometric authentication. IC Role / Device Role / Timing Role: ATSAMA5D21B-CU hosts secure payment OS, drives USB host for card reader, manages ADC for fingerprint sensor, and enforces secure boot chain. Use Value: Tamper-detection pins (PIOBU0–7) and 1-Kbyte nonerasable SRAM protect against physical attacks; ICM validates bootloader integrity at every power-on. |
Use Scenario: Portable diagnostic device logging ECG waveforms, storing encrypted patient records, and syncing over Wi-Fi via USB host. IC Role / Device Role / Timing Role: ATSAMA5D21B-CU acquires analog signals via 12-bit ADC with resistive touchscreen capability, performs real-time filtering using NEON, and stores data in encrypted e.MMC. Use Value: NEON acceleration enables on-device FFT computation; Backup mode preserves volatile session data during battery swap with DDR self-refresh. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D22B-CU | 105 I/Os, 16/32-bit DDR bus, integrated PTC (4×8 touch), single CAN-FD, no AESB | Higher I/O count and DDR bandwidth; lacks on-the-fly memory encryption and second CAN-FD channel | Select for cost-sensitive HMI designs needing more GPIOs and touch channels but not requiring dual CAN or AESB |
| ATSAMA5D27B-CU | 128 I/Os, dual CAN-FD, AESB, environmental monitors (temp/voltage), die shield, 8 tamper pins | Enhanced physical security features and extended monitoring; same core/peripheral set as ATSAMA5D21B-CU but with higher I/O count | Select when tamper resistance, environmental sensing, or >72 GPIOs are mandatory for medical or military-grade deployments |
Compared with ATSAMA5D22B-CU, ATSAMA5D21B-CU offers lower I/O count but includes AESB and dual CAN-FD-critical for secure industrial gateways. Against ATSAMA5D27B-CU, it trades environmental monitors and extra tamper pins for reduced BOM cost and footprint, making it optimal for volume-constrained POS and HMI applications.
Availability
ATSAMA5D21B-CU is available at Aetrix Electronics and suitable for industrial HMI terminals, secure IoT gateways, and point-of-sale systems requiring stable component supply across long production lifecycles and extended temperature operation.
Supply support for ATSAMA5D21B-CU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company delivering smart, connected, and secure embedded control solutions, with leadership in 8/16/32-bit MCUs, analog, FPGA, and security ICs.
The SAMA5D2 product line was designed for high-performance, ultra-low-power embedded applications demanding advanced security, rich connectivity, and Linux-capable processing-targeting industrial automation, healthcare, and secure consumer devices.
FAQ
What is the maximum operating frequency of the ATSAMA5D21B-CU?
The ATSAMA5D21B-CU operates at up to 500 MHz using its Arm Cortex-A5 core. This frequency is achievable under typical conditions with appropriate voltage scaling and thermal management. The device includes a 600–1200 MHz system PLL that generates the core clock, and its performance is validated across the industrial temperature range (−40°C to +105°C).
Does the ATSAMA5D21B-CU support secure boot and cryptographic acceleration?
Yes, the ATSAMA5D21B-CU includes a secure bootloader stored in 64-Kbyte scrambled ROM, hardware AES-256/SHA-256/TRNG accelerators, and an Integrity Check Monitor (ICM) that validates memory contents using SHA-256. These features collectively enable authenticated, encrypted boot and runtime protection of firmware and data.
Which memory types does the ATSAMA5D21B-CU support natively?
The ATSAMA5D21B-CU supports DDR2, DDR3L, LPDDR2, LPDDR3, QSPI flash, e.MMC 4.51, SD 3.0, and SLC/MLC NAND flash with up to 32-bit ECC. Its 16-bit DDR bus and integrated memory controller eliminate the need for external PHYs or glue logic in most embedded designs.
How many CAN-FD interfaces does the ATSAMA5D21B-CU provide?
The ATSAMA5D21B-CU integrates two host CAN-FD (MCAN) controllers, each with SRAM-based mailboxes and support for time- and event-triggered transmission. Note that these implement the non-ISO CAN FD frame format and do not pass ISO 16845-1:2016 conformance testing.
What package type and pin count does the ATSAMA5D21B-CU use?
The ATSAMA5D21B-CU uses a 196-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 11×11 mm² with 0.75 mm pitch. This package is qualified for extended industrial temperature operation (−40°C to +105°C) and is pin-compatible with other SAMA5D21 variants in the same family.
ATSAMA5D21B-CU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 196-TFBGA, CSBGA
- Series:
- SAMA5D2
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 500MHz
- Co-Processors/DSP:
- Multimedia; NEON™ MPE
- RAM Controllers:
- LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keyboard, LCD, Touchscreen
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 + HSIC
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 196-TFBGA (11x11)
- Additional Interfaces:
- I2C, SMC, SPI, UART, USART, QSPI
ATSAMA5D21B-CU FAQ
1.How can I place an order for ATSAMA5D21B-CU through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D21B-CU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D21B-CU reliable?
The price and inventory of ATSAMA5D21B-CU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D21B-CU is usually 5 days.
3.What payment methods are accepted for ATSAMA5D21B-CU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D21B-CU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D21B-CU?
ATSAMA5D21B-CU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D21B-CU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D21B-CU?
For technical support, including ATSAMA5D21B-CU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D21B-CU requirements.
6.How does Aetrix verify that ATSAMA5D21B-CU is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D21B-CU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D21B-CU meets industry standards.
7.What is the process for return or replacement of ATSAMA5D21B-CU?
All ATSAMA5D21B-CU units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D21B-CU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D21B-CU part is unused and in its original packaging.
Return procedure for ATSAMA5D21B-CU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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