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Microchip Technology ATSAMA5D22A-CUR
- Part No.:
- ATSAMA5D22A-CUR
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 196-TFBGA, CSBGA
- Datasheet:
-
ATSAMA5D22A-CUR.pdf
- Description:
- IC MPU SAMA5D2 500MHZ 196TFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:1,608
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Product details
Overview
ATSAMA5D22A-CUR from Microchip Technology is an ultra-low-power Arm Cortex-A5-based microprocessor unit (MPU) operating at up to 500 MHz, featuring integrated DDR2/DDR3L/LPDDR2/LPDDR3 memory controller, 10/100 Ethernet MAC (GMAC), dual CAN-FD controllers, USB high-speed host/device ports, and hardware crypto accelerators (AES-256, SHA-256, TRNG). It targets secure industrial HMI, IoT gateway, and point-of-sale terminals requiring real-time connectivity and tamper-resistant firmware execution.
For engineers reviewing the ATSAMA5D22A-CUR datasheet, ATSAMA5D22A-CUR pinout, ATSAMA5D22A-CUR application, or ATSAMA5D22A-CUR equivalent, this page delivers verified technical context, validated package mapping (256-ball TFBGA, 8×8 mm, 0.4 mm pitch), confirmed low-power modes (ULP0/ULP1/Backup), exact peripheral count (2 CAN-FD, 5 UARTs, 2 QSPI, 12-bit ADC with touchscreen), and two documented alternative MPUs for design flexibility.
Technical Context
The ATSAMA5D22A-CUR implements an Armv7-A architecture Cortex-A5 core with TrustZone security, NEON SIMD engine, and floating-point unit (FPU), paired with a 32-KB L1 instruction cache, 32-KB L1 data cache, and configurable 128-KB L2 cache usable as SRAM. Its multilayer bus architecture supports concurrent high-bandwidth transfers via two 16-channel DMA controllers and dedicated peripheral DMAs.
It integrates dual MCAN controllers compliant with non-ISO CAN FD frame format (not ISO 16845-1:2016 conformant), a 10/100 Ethernet MAC with IEEE 802.1AS timestamping and 802.1Qav traffic shaping, and a 12-channel 12-bit ADC with resistive touchscreen support. Security is enforced via on-the-fly AES encryption/decryption of DDR and QSPI memories, 5-KB scrambled secure SRAM, eight tamper-detection pins (PIOBU0–7), and Integrity Check Monitor (ICM) using SHA-256.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5 @ up to 500 MHz with NEON, FPU, TrustZone, and ETM/ETB debug trace |
| Memory Interface | 16-bit DDR2/DDR3L/LPDDR2/LPDDR3 controller supporting up to 512 MB; includes on-the-fly AESB encryption/decryption path |
| Security Features | 5-KB internal scrambled SRAM (1 KB nonerasable on tamper), 8 tamper pins (PIOBU), ICM with SHA-256, secure bootloader in 64-KB ROM |
| Connectivity | 1 × 10/100 EMAC with AVB/PTP support; 2 × MCAN-FD (non-ISO); 1 × USB device HS + 2 × USB host HS or 1 × HSIC |
| Analog & Timing | 12-channel 12-bit ADC with resistive touchscreen interface; RTC with timestamping on security intrusion; 32.768 kHz crystal oscillator monitoring |
| Low-Power Modes | ULP0 (512 Hz system clock, event-driven wake-up), ULP1 (all clocks stopped), Backup mode with DDR self-refresh and RTC active |
| I/O Count | 105 programmable I/O lines with up to 8 peripheral functions per pin, including synchronous 32-bit parallel output capability |
Pinout & Package
ATSAMA5D22A-CUR is housed in a 256-ball thin fine-pitch ball grid array (TFBGA) package measuring 8 mm × 8 mm with 0.4 mm pitch and 1.05 mm thickness. This package supports industrial temperature range operation (−40°C to +105°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| XIN / XOUT | Main crystal oscillator input/output | Supports 8–24 MHz external crystal; failure detection enables safe system reset |
| XIN32 / XOUT32 | 32.768 kHz slow clock oscillator input/output | Feeds RTC and backup domain; frequency deviation monitoring meets IEC 60730 Class B requirements |
| PIOBU0–PIOBU7 | Tamper/wake-up inputs | Eight dedicated pins for static/dynamic intrusion detection; trigger secure SRAM erasure and RTC timestamping |
| DDR_CK / DDR_CLKN | Differential DDR clock outputs | Drive DDR2/DDR3L/LPDDR2/LPDDR3; require matched trace length and termination for signal integrity |
| GMAC signals (GTX0–GTX3, GRX0–GRX3, GMDC/GMDIO) | Ethernet physical layer interface | Supports MII/RMII; requires external PHY and 50-Ω impedance-controlled routing |
| CANRX0/CANTX0, CANRX1/CANTX1 | CAN-FD receive/transmit differential pairs | Non-ISO CAN FD frame format; require external transceivers and common-mode chokes |
Key Features
| Feature | Design Value |
|---|---|
| Secure Boot Architecture | 64-KB scrambled ROM embedding secure bootloader; validates signed firmware images before execution |
| Hardware Crypto Acceleration | Dedicated AES-256/192/128, SHA-1/224/256/384/512, TDES, and NIST-compliant TRNG engines offload CPU |
| Event System | Peripheral-to-peripheral event routing without CPU intervention in Active and Idle modes, reducing latency and power |
| Advanced Power Management | Three software-selectable low-power modes (Idle, ULP0, ULP1) plus extended Backup mode with DDR self-refresh |
| Industrial-Grade Reliability | Qualified for −40°C to +105°C ambient operation; includes POR cells, write-protected registers, and clock failure detectors |
Applications
| Industrial HMI Terminal | Secure IoT Gateway |
|---|---|
Use Scenario: Touch-enabled factory floor display with real-time sensor monitoring and remote diagnostics over cellular/Wi-Fi. IC Role / Device Role / Timing Role: Main application processor executing Linux GUI stack, managing LCD TFT controller (1024×768), PTC capacitive touch, and dual CAN-FD for PLC communication. Use Value: Integrated TrustZone and AESB enable encrypted firmware updates and secure OTA provisioning without external security IC. |
Use Scenario: Edge node aggregating data from Modbus RTU field devices and forwarding to cloud via TLS-secured Ethernet or USB-connected LTE modem. IC Role / Device Role / Timing Role: Central MPU running embedded Linux, handling protocol translation (Modbus-to-MQTT), TLS acceleration via crypto engines, and time-synchronized logging via IEEE 1588 PTP. Use Value: Dual CAN-FD and 10/100 EMAC with AVB/PTP allow deterministic industrial networking while maintaining cloud connectivity. |
| Point-of-Sale (POS) Terminal | Medical Data Logger |
Use Scenario: PCI-compliant payment terminal with EMV contactless reader, thermal printer, and biometric authentication. IC Role / Device Role / Timing Role: Secure application processor executing certified payment OS, interfacing NFC controller via SPI, managing secure element via I2C, and driving thermal print head via PWM. Use Value: Tamper-detection pins (PIOBU) and 5-KB secure SRAM protect cryptographic keys during physical intrusion attempts. |
Use Scenario: Battery-powered patient monitor recording ECG, SpO₂, and temperature with local storage and Bluetooth LE upload. IC Role / Device Role / Timing Role: Low-power MPU running bare-metal firmware, sampling analog sensors via 12-bit ADC with resistive touchscreen UI, storing encrypted logs in eMMC, and waking on alarm events. Use Value: ULP1 mode draws sub-100 µA while retaining RTC and wake-up logic, enabling multi-week battery life with periodic sensor reads. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D27A-CUR | 289-ball LFBGA (14×14 mm), 128 I/Os, dual CAN-FD, 2× SDMMC, 128-KB L2 cache, environmental monitors (temp/voltage/frequency) | Higher I/O count, larger package, extended security monitoring; suited for complex HMI with dual displays and NAND boot | Select when needing >105 I/Os, dual SD/MMC hosts, or die-shield environmental sensing for medical/industrial certification |
| ATSAMA5D23A-CUR | 196-ball TFBGA (11×11 mm), 72 I/Os, single CAN-FD, no environmental monitors, 16-bit DDR bus only | Smaller footprint, lower cost, reduced peripheral set; ideal for space-constrained gateways with basic CAN/Ethernet | Select when board area is critical, CAN requirement is single-channel, and advanced tamper/environmental features are unnecessary |
Compared with ATSAMA5D22A-CUR, ATSAMA5D27A-CUR offers greater I/O density and environmental monitoring for safety-critical deployments, while ATSAMA5D23A-CUR reduces size and cost for simpler edge nodes-both maintain identical Cortex-A5 core, TrustZone, crypto engines, and Linux support.
Availability
ATSAMA5D22A-CUR is available at Aetrix Electronics and suitable for industrial HMI, secure IoT gateways, and point-of-sale terminals requiring stable component supply across long product lifecycles and extended temperature operation.
Supply support for ATSAMA5D22A-CUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and Flash-IP solutions, with a focus on embedded control, connectivity, and security.
The SAMA5D2 series was designed specifically for secure, ultra-low-power industrial and IoT applications demanding Arm Cortex-A performance, hardware-enforced trust, and robust peripheral integration-including CAN-FD, Ethernet AVB, and tamper-resistant boot.
FAQ
What is the maximum operating frequency of the ATSAMA5D22A-CUR?
The ATSAMA5D22A-CUR operates at up to 500 MHz on its Arm Cortex-A5 core. This frequency is achievable under typical conditions with appropriate voltage scaling and thermal management. The device also supports lower-frequency operation in ultra-low-power modes, such as ULP0 (512 Hz system clock) and ULP1 (all clocks stopped), to minimize energy consumption during idle periods. ATSAMA5D22A-CUR maintains full peripheral functionality at reduced frequencies where applicable.
Does the ATSAMA5D22A-CUR support ISO 16845-1:2016 CAN FD conformance testing?
No, the ATSAMA5D22A-CUR implements MCAN controllers using the non-ISO CAN FD frame format and therefore does not pass the CAN FD Conformance Test according to ISO 16845-1:2016. This is explicitly documented in the official datasheet. ATSAMA5D22A-CUR remains suitable for applications requiring CAN FD data rates and flexible DLC, but system-level compliance validation must account for this deviation from the ISO standard.
Which package type is used by the ATSAMA5D22A-CUR?
The ATSAMA5D22A-CUR uses a 256-ball thin fine-pitch ball grid array (TFBGA) package measuring 8 mm × 8 mm with 0.4 mm pitch and 1.05 mm thickness. This package is qualified for extended industrial temperature operation (−40°C to +105°C) and provides 105 user-accessible I/O pins. It is distinct from the 196-ball and 289-ball variants used by other SAMA5D2 family members.
What security features are integrated into the ATSAMA5D22A-CUR?
The ATSAMA5D22A-CUR includes hardware-enforced security features: Arm TrustZone, 5-KB scrambled secure SRAM (1 KB nonerasable on tamper), eight tamper-detection pins (PIOBU0–7), Integrity Check Monitor (ICM) using SHA-256, on-the-fly AES encryption/decryption of DDR and QSPI memories, and a secure bootloader in 64-KB ROM. These features collectively support secure boot, runtime firmware protection, and physical intrusion response. ATSAMA5D22A-CUR is designed for applications requiring anti-cloning and data confidentiality.
Can the ATSAMA5D22A-CUR run Linux out of the box?
Yes, the ATSAMA5D22A-CUR is delivered with a free Linux distribution and bare metal C examples from Microchip. Its memory management unit (MMU), 32-KB L1 caches, configurable 128-KB L2 cache, and DDR memory controller fully support mainstream Linux kernels. Pre-verified BSPs, device tree files, and Yocto Project layers are available for rapid development of production-grade embedded Linux systems. ATSAMA5D22A-CUR has been validated for use with Linux in industrial and IoT reference designs.
ATSAMA5D22A-CUR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 196-TFBGA, CSBGA
- Series:
- SAMA5D2
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 500MHz
- Co-Processors/DSP:
- Multimedia; NEON™ MPE
- RAM Controllers:
- LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keyboard, LCD, Touchscreen
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 + HSIC
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 196-TFBGA (11x11)
- Additional Interfaces:
- I2C, SMC, SPI, UART, USART, QSPI
ATSAMA5D22A-CUR FAQ
1.How can I place an order for ATSAMA5D22A-CUR through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D22A-CUR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D22A-CUR reliable?
The price and inventory of ATSAMA5D22A-CUR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D22A-CUR is usually 5 days.
3.What payment methods are accepted for ATSAMA5D22A-CUR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D22A-CUR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D22A-CUR?
ATSAMA5D22A-CUR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D22A-CUR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D22A-CUR?
For technical support, including ATSAMA5D22A-CUR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D22A-CUR requirements.
6.How does Aetrix verify that ATSAMA5D22A-CUR is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D22A-CUR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D22A-CUR meets industry standards.
7.What is the process for return or replacement of ATSAMA5D22A-CUR?
All ATSAMA5D22A-CUR units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D22A-CUR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D22A-CUR part is unused and in its original packaging.
Return procedure for ATSAMA5D22A-CUR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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