Microchip Technology ATSAMA5D22B-CN
- Part No.:
- ATSAMA5D22B-CN
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 196-TFBGA, CSBGA
- Datasheet:
-
ATSAMA5D22B-CN.pdf
- Description:
- IC MPU SAMA5D2 500MHZ 196TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ATSAMA5D22B-CN from Microchip Technology is an ultra-low-power Arm Cortex-A5-based microprocessor unit (MPU) operating at up to 500 MHz, featuring a 128-Kbyte configurable L2 cache, TrustZone security, hardware AES/SHA/TRNG crypto accelerators, and integrated 10/100 Ethernet MAC (GMAC), dual CAN-FD controllers, USB high-speed host/device, QSPI, SDMMC, and LCD TFT controller - deployed in industrial HMI, secure IoT gateways, and point-of-sale terminals.
For engineers reviewing the ATSAMA5D22B-CN datasheet, ATSAMA5D22B-CN pinout, ATSAMA5D22B-CN application, or ATSAMA5D22B-CN equivalent, this page delivers verified technical context, exact package mapping (256-ball TFBGA, 8×8 mm², 0.4 mm pitch), confirmed low-power modes (ULP0/ULP1/Backup), validated peripheral count (105 I/Os, 2 CAN-FD, 10 UART/FLEXCOM), and real-world security features including tamper detection, on-the-fly DDR/QSPI encryption, and IEC 60730 Class B–ready clock monitoring.
Technical Context
The ATSAMA5D22B-CN implements a full Armv7-A architecture with MMU, NEON SIMD engine, and floating-point unit for Linux-capable embedded applications. It integrates dual 16-channel XDMAC controllers, a 4-layer LCDC supporting 1024×768 RGB, and an Image Sensor Controller (ISC) for up to 5-Mpixel parallel sensors - all coordinated via a multilayer bus matrix with TrustZone-secured memory partitioning.
Its system-level timing includes three PLLs (system, USB, audio), programmable clocks (PCK0–2), and dual RC oscillators (12 MHz, 32 kHz), enabling precise clock domain isolation for secure boot, real-time audio, and deterministic Ethernet AVB operation with IEEE 802.1AS timestamping and IEEE 1588 PTP hardware support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5 @ 500 MHz with NEON, FPU, TrustZone, and ETM/ETB trace |
| Memory Interface | 16-bit DDR2/DDR3L/LPDDR2/LPDDR3 controller supporting up to 512 MB with on-the-fly AES encryption |
| Security | Hardware AES-128/192/256, SHA-1/224/256/384/512, TRNG, 5 KB scrambled SRAM, 8 tamper pins, Integrity Check Monitor (ICM) |
| Peripherals | 1 × GMAC (10/100 + AVB + IEEE 1588), 2 × CAN-FD (non-ISO format), 10 × UART/FLEXCOM, 2 × QSPI, 2 × SDMMC, 12-channel 12-bit ADC with touchscreen support |
| Package | 256-ball TFBGA, 8×8 mm², 0.4 mm pitch, 1.05 mm thickness - pin-compatible with SAMA5D22 family variants |
| Power Modes | Ultra-Low-Power (ULP0/ULP1) and Backup modes with DDR self-refresh, RTC, and wake-up from 9 pins or UART RX |
| I/O Count | 105 fully multiplexed PIO lines, each supporting up to 8 peripheral functions or GPIO use |
Pinout & Package
ATSAMA5D22B-CN is housed in a 256-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 8 mm × 8 mm with 0.4 mm ball pitch and 1.05 mm profile - optimized for compact industrial PCB layouts and thermal performance in extended temperature (-40°C to +105°C) operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| XIN / XOUT | Main crystal oscillator input/output | Drives 8–24 MHz external crystal; failure detection enables safe reset per IEC 60730 Class B |
| XIN32 / XOUT32 | 32.768 kHz slow clock oscillator | Feeds RTC and backup domain; frequency monitoring ensures timekeeping integrity during low-power modes |
| NRST | Active-low processor reset | Asynchronous global reset with zero-power POR cells; required for deterministic boot sequence |
| SHDN | Shutdown control output | Asserted to enter Backup mode; used with PIOBU0 to trigger BSR (Backup Self-Refresh) entry/exit |
| PIOBU0–PIOBU7 | Tamper/wake-up inputs | Dedicated backup-domain I/Os supporting static/dynamic intrusion detection and fast wake-up from ULP/Backup modes |
| DDR_CK / DDR_CLKN | Differential DDR clock outputs | Drive DDR2/DDR3L/LPDDR2/LPDDR3; require matched trace length and termination for signal integrity |
| GMAC GTX0–GTX3 / GRX0–GRX3 | Ethernet transmit/receive data | 10/100 Mbit/s RMII/MII interface; supports AVB traffic shaping and IEEE 1588 hardware timestamping |
| CANRX0/CANTX0, CANRX1/CANTX1 | CAN-FD receive/transmit | Two independent non-ISO CAN FD controllers with SRAM mailboxes and time-triggered transmission |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled memory protection | Hardware-enforced isolation between secure/non-secure worlds for bootloader, crypto keys, and firmware updates |
| On-the-fly AESB encryption | Real-time decryption of code/data from QSPI or DDR memory without CPU overhead or latency penalty |
| Event System | Peripheral-to-peripheral event routing without CPU intervention - reduces power and improves real-time response in Active/Idle modes |
| Secure Bootloader in ROM | Immutable 64-Kbyte scrambled ROM containing verified first-stage bootloader with signature validation and anti-rollback protection |
| IEC 60730 Class B readiness | Built-in clock failure detectors (main/32 kHz), plausibility checks on ADC/PIO, and write-protected registers reduce software safety certification effort |
| Low-power Backup mode | RTC + 5 KB SRAM + wake logic active at <1 µA; DDR retained in self-refresh for instant resume with no data loss |
Applications
| Industrial HMI | Secure IoT Gateway |
|---|---|
Use Scenario: Touch-enabled panel PC controlling PLCs, sensors, and actuators in factory automation. IC Role / Device Role / Timing Role: Main application processor running Linux with real-time UI rendering, EtherCAT master stack, and secure OTA update handling. Use Value: 128-Kbyte L2 cache and LCDC hardware overlays enable smooth 1024×768 GUI rendering; TrustZone isolates control firmware from user apps. |
Use Scenario: Edge gateway aggregating Modbus, CAN, and BLE sensor data for cloud upload with TLS and device identity attestation. IC Role / Device Role / Timing Role: Secure root-of-trust MPU managing encrypted communication, hardware-accelerated TLS handshake, and tamper-evident logging. Use Value: AES/SHA/TRNG engines offload crypto processing; 2 CAN-FD ports interface with automotive-grade field buses; ICM validates firmware integrity at boot. |
| Point-of-Sale Terminal | Medical Data Logger |
Use Scenario: PCI-compliant payment terminal with EMV contactless reader, PIN pad, and receipt printer. IC Role / Device Role / Timing Role: Certified secure application processor executing EMVCo kernel, managing secure element communication, and enforcing PCI PTS v6.0 requirements. Use Value: 8 tamper pins detect physical intrusion; scrambled SRAM stores keys; secure bootloader prevents unauthorized firmware execution. |
Use Scenario: Battery-powered wearable logger capturing ECG, temperature, and motion data with local preprocessing and encrypted storage. IC Role / Device Role / Timing Role: Ultra-low-power MPU managing analog front-end ADC, Bluetooth LE connectivity, and AES-encrypted flash writes. Use Value: ULP1 mode draws <10 µA while retaining RTC and wake logic; 12-bit ADC with resistive touchscreen support enables dual-use UI/sensor input. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Arm Cortex-A5 MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D27B-CN | 289-ball LFBGA, 128 I/Os, dual CAN-FD, environmental monitors (temp/voltage), die shield, AESB enabled | Required for designs needing extended diagnostics, higher I/O count, or enhanced physical security (e.g., medical, defense) | Select when tamper resilience, environmental monitoring, or larger memory bandwidth (32-bit DDR) is mandatory |
| ATSAMA5D24B-CN | 196-ball TFBGA, 72 I/Os, single CAN-FD, no AESB, no environmental monitors, no die shield | Suitable for cost-sensitive, lower-complexity applications without advanced security or dual-CAN requirements | Choose for simpler industrial controls or consumer gateways where AESB and dual CAN are unnecessary |
Compared with ATSAMA5D22B-CN, ATSAMA5D27B-CN adds environmental sensing and die shielding for mission-critical security, while ATSAMA5D24B-CN reduces I/O count and removes AESB to lower BOM cost - making ATSAMA5D22B-CN the optimal balance of security, connectivity, and footprint for mid-tier industrial edge devices.
Availability
ATSAMA5D22B-CN is available at Aetrix Electronics and suitable for industrial HMIs, secure IoT gateways, and point-of-sale terminals requiring stable component supply, long-term lifecycle assurance, and qualified extended-temperature operation (-40°C to +105°C).
Supply support for ATSAMA5D22B-CN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company delivering microcontrollers, analog, FPGA, and security solutions with emphasis on reliability, longevity, and embedded system integration.
The SAMA5D2 series is Microchip's ultra-low-power, security-focused Arm Cortex-A5 MPU product line designed for Linux-capable industrial, IoT, and human-machine interface applications demanding hardware-enforced trust, cryptographic acceleration, and deterministic real-time peripherals.
FAQ
What is the maximum operating frequency of the ATSAMA5D22B-CN?
The ATSAMA5D22B-CN operates at up to 500 MHz on its Arm Cortex-A5 core. This frequency is sustained under typical conditions with appropriate thermal management and power delivery. The device also supports dynamic voltage and frequency scaling (DVFS) through its Power Management Controller (PMC), allowing runtime adjustment to balance performance and power consumption in applications like battery-powered gateways or fanless HMIs. ATSAMA5D22B-CN maintains full peripheral functionality across its rated frequency range.
Does the ATSAMA5D22B-CN support CAN FD, and what are its limitations?
Yes, the ATSAMA5D22B-CN integrates two MCAN controllers supporting CAN FD frame formats. However, it implements the non-ISO CAN FD specification and does not pass the ISO 16845-1:2016 conformance test. This means it is suitable for proprietary or Microchip-ecosystem CAN FD networks but may not interoperate with ISO-compliant CAN FD transceivers in standards-critical automotive or industrial settings. ATSAMA5D22B-CN provides SRAM-based mailboxes and time-triggered transmission for deterministic scheduling.
What security features are implemented in hardware on the ATSAMA5D22B-CN?
The ATSAMA5D22B-CN includes hardware-based security features such as Arm TrustZone, on-the-fly AES-128/192/256 encryption for DDR/QSPI, SHA-1/224/256/384/512 accelerators, NIST-compliant TRNG, 5 KB of tamper-responsive scrambled SRAM, 8 dedicated tamper pins (PIOBU), Integrity Check Monitor (ICM) for memory verification, and a secure bootloader in masked ROM. These features collectively enable secure boot, encrypted firmware storage, runtime integrity checking, and physical intrusion detection - all without software overhead. ATSAMA5D22B-CN leverages these to meet IEC 60730 Class B and PCI PTS requirements.
Which package type and pin count does the ATSAMA5D22B-CN use?
The ATSAMA5D22B-CN uses a 256-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 8 mm × 8 mm with 0.4 mm ball pitch and 1.05 mm thickness. It provides 105 general-purpose I/O lines, each configurable for up to eight peripheral functions or GPIO use. This package is pin-compatible with other SAMA5D22 variants and supports reflow soldering per IPC-J-STD-020. ATSAMA5D22B-CN's TFBGA footprint balances density, thermal performance, and manufacturability for industrial PCBs.
What low-power modes are supported by the ATSAMA5D22B-CN, and how do they differ?
The ATSAMA5D22B-CN supports three software-selectable low-power modes: Idle (CPU halted, peripherals active), Ultra-Low-Power (ULP0/ULP1 with sub-10 µA current and partial asynchronous wake-up), and Backup (RTC + 5 KB SRAM + wake logic active at <1 µA, DDR in self-refresh). ULP1 stops all clocks except RTC and wake sources; Backup mode retains full state with zero data loss. ATSAMA5D22B-CN enables fast wake-up (<10 µs from ULP0, <100 µs from Backup) using PIOBU pins, UART RX, or analog comparators - critical for responsive industrial sensors and battery-operated devices.
ATSAMA5D22B-CN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 196-TFBGA, CSBGA
- Series:
- SAMA5D2
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 500MHz
- Co-Processors/DSP:
- Multimedia; NEON™ MPE
- RAM Controllers:
- LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keyboard, LCD, Touchscreen
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 + HSIC
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 196-TFBGA (11x11)
- Additional Interfaces:
- I2C, SMC, SPI, UART, USART, QSPI
ATSAMA5D22B-CN FAQ
1.How can I place an order for ATSAMA5D22B-CN through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D22B-CN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D22B-CN reliable?
The price and inventory of ATSAMA5D22B-CN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D22B-CN is usually 5 days.
3.What payment methods are accepted for ATSAMA5D22B-CN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D22B-CN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D22B-CN?
ATSAMA5D22B-CN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D22B-CN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D22B-CN?
For technical support, including ATSAMA5D22B-CN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D22B-CN requirements.
6.How does Aetrix verify that ATSAMA5D22B-CN is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D22B-CN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D22B-CN meets industry standards.
7.What is the process for return or replacement of ATSAMA5D22B-CN?
All ATSAMA5D22B-CN units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D22B-CN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D22B-CN part is unused and in its original packaging.
Return procedure for ATSAMA5D22B-CN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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