Microchip Technology ATSAMA5D22C-CU

Overview

ATSAMA5D22C-CU from Microchip Technology is an ultra-low-power Arm Cortex-A5-based microprocessor unit (MPU) operating at up to 500 MHz, integrating a 128-Kbyte configurable L2 cache, TrustZone security, hardware crypto accelerators (AES-256, SHA-256, TRNG), and dual 10/100 Ethernet MAC with IEEE 1588 PTP support. It targets secure industrial HMI, IoT gateways, and point-of-sale terminals requiring DDR3L/LPDDR3 memory, CAN FD, USB HS, and resistive touchscreen control.

For engineers reviewing the ATSAMA5D22C-CU datasheet, ATSAMA5D22C-CU pinout, ATSAMA5D22C-CU application, or ATSAMA5D22C-CU equivalent, this page delivers verified technical context, validated package mapping (256-ball TFBGA, 8×8 mm, 0.4 mm pitch), confirmed low-power modes (ULP0/ULP1/Backup), real-world peripheral integration (ISC, LCDC, PTC), and two rigorously validated alternative MPUs for design continuity.

Technical Context

The ATSAMA5D22C-CU implements an Armv7-A architecture Cortex-A5 core with NEON SIMD engine and floating-point unit, paired with a multilayer bus matrix supporting concurrent DDR3L/LPDDR3 access and on-the-fly AES encryption/decryption of external memory. Its security subsystem includes Arm TrustZone, 5-Kbyte scrambled SRAM with tamper response, and Integrity Check Monitor (ICM) using SHA-256.

Peripherals are organized across three H32MX/H64MX bridges: one dedicated to high-bandwidth interfaces (EMAC, USB, QSPI), another to audio/video (ISC, LCDC, CLASSD), and a third to low-latency I/O (FLEXCOM, UART, PWM). The Event System enables autonomous peripheral-to-peripheral communication without CPU intervention in Active and Idle modes.

Key Specifications

Pinout & Package

ATSAMA5D22C-CU is housed in a 256-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 8×8 mm² with 0.4 mm ball pitch and 1.05 mm thickness. This package supports 105 programmable I/Os with up to eight peripheral functions per pin, including dedicated tamper/wake-up inputs (PIOBU0–PIOBU7) and DDR3L/LPDDR3 interface signals (DDR_D[31:0], DDR_A[13:0], DDR_CK/CLKN).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar MPU applications.

Compared with ATSAMA5D22C-CU, ATSAMA5D27C-CU adds die-shield monitoring and wider DDR bus but increases PCB area and cost; i.MX6ULL offers higher CPU clock but lacks TrustZone, tamper detection, and on-the-fly memory encryption - making it unsuitable for certified secure deployments.

Availability

ATSAMA5D22C-CU is available at Aetrix Electronics and suitable for industrial HMI, secure IoT gateways, and medical data loggers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing from authorized channels.

Supply support for ATSAMA5D22C-CU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a leading provider of microcontrollers, analog components, and Flash-IP solutions, serving industrial, automotive, and communications markets with focus on reliability and security.

The SAMA5D2 product line was designed specifically for secure, ultra-low-power embedded Linux applications demanding hardware-enforced trust, cryptographic acceleration, and industrial-grade longevity - targeting POS, IIoT, and medical edge devices.

FAQ

What is the maximum DDR3L memory capacity supported by ATSAMA5D22C-CU?

ATSAMA5D22C-CU supports up to 512 Mbytes of DDR3L memory via its 16-bit bus with 8-bank addressing. The controller implements DLL-off operation and includes on-the-fly AES encryption/decryption (AESB) for secure code execution directly from external memory - eliminating need for external encryption ICs while maintaining full bandwidth utilization.

Does ATSAMA5D22C-CU support CAN FD with ISO 16845-1 conformance?

No, ATSAMA5D22C-CU implements MCAN controllers using the non-ISO CAN FD frame format and does not pass the CAN FD Conformance Test per ISO 16845-1:2016. It supports time- and event-triggered transmission with SRAM-based mailboxes but requires protocol-layer adaptation for full ISO FD interoperability in automotive applications.

How many tamper detection pins does ATSAMA5D22C-CU provide, and what happens on detection?

ATSAMA5D22C-CU provides six dedicated tamper pins (PIOBU0–PIOBU5) in its backup domain. Upon static or dynamic intrusion detection, the security module immediately erases 4-Kbyte of erasable scrambled SRAM while preserving 1-Kbyte nonerasable region for forensic logging - all enforced in hardware without software intervention.

What power management ICs are recommended for ATSAMA5D22C-CU?

Microchip recommends MCP16502AA (for DDR3L/LPDDR2 systems) and MCP16501A (for space-constrained designs) as companion PMICs. Both provide pin-selectable VDDIODDR (1.2V/1.35V/1.8V), leakage-free interface in Backup mode, and I²C-controlled rail sequencing - ensuring robust startup and low-power state transitions for ATSAMA5D22C-CU.

Can ATSAMA5D22C-CU run bare-metal firmware without Linux?

Yes, ATSAMA5D22C-CU includes a 160-Kbyte maskable ROM with secure bootloader and supports bare-metal C examples provided by Microchip. Its MMU, TrustZone, and interrupt controllers allow deterministic real-time execution - enabling safety-critical tasks alongside Linux in hybrid environments or standalone firmware for resource-constrained use cases.