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Microchip Technology ATSAMA5D24B-CU
- Part No.:
- ATSAMA5D24B-CU
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 256-TFBGA
- Datasheet:
-
ATSAMA5D24B-CU.pdf
- Description:
- IC MPU SAMA5D2 500MHZ 256TFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:3,250
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Product details
Overview
ATSAMA5D24B-CU from Microchip Technology is an ultra-low-power Arm Cortex-A5-based microprocessor unit (MPU) operating at up to 500 MHz, featuring dual CAN-FD controllers, 10/100 Ethernet MAC with IEEE 1588 PTP support, LCD TFT controller (1024×768), and hardware crypto accelerators (AES-256, SHA-256, TRNG). It integrates 128 KB L2 cache configurable as SRAM, 128 KB scrambled internal SRAM, and supports DDR2/DDR3L/LPDDR2/LPDDR3 memory interfaces for industrial HMI and secure IoT gateway applications.
For engineers reviewing the ATSAMA5D24B-CU datasheet, ATSAMA5D24B-CU pinout, ATSAMA5D24B-CU application, or ATSAMA5D24B-CU equivalent, this page delivers verified technical context, validated package mapping (256-ball TFBGA, 8×8 mm, 0.4 mm pitch), confirmed low-power modes (ULP0/ULP1/Backup), real-world security features (TrustZone, tamper detection, on-the-fly AESB), and precise peripheral allocation per SAMA5D24 configuration.
Technical Context
The ATSAMA5D24B-CU implements a dual-bus multilayer matrix architecture with two 16-channel XDMAC controllers and dedicated DMA channels for EMAC, USB, ISC, and LCDC-enabling concurrent high-bandwidth transfers without CPU intervention. Its Arm Cortex-A5 core includes NEON SIMD, VFPv4 FPU, and TrustZone-enabled MMU for secure partitioning of Linux kernel and user-space execution.
It integrates two MCAN controllers compliant with non-ISO CAN FD frame format (not ISO 16845-1:2016 conformant), a 12-channel 12-bit ADC with resistive touchscreen support, and a 4-channel PWM plus six 32-bit timer/counters. The device supports IEEE 802.1AS timestamping, AVB traffic shaping (802.1Qav), and PTP hardware acceleration for deterministic networking in industrial control systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5 @ 500 MHz with NEON, VFPv4 FPU, TrustZone, and ETM/ETB debug |
| Memory Interface | 32-bit DDR2/DDR3L/LPDDR2/LPDDR3 controller supporting up to 512 MB; includes on-the-fly AESB encryption/decryption path |
| Security | Hardware AES-256/192/128, SHA-1/224/256/384/512, TDES, TRNG (NIST SP800-22 compliant), 5 KB tamper-protected SRAM, 8 tamper pins |
| Peripherals | Dual MCAN (non-ISO FD), 10/100 EMAC with IEEE 1588 PTP, 2× QSPI, 2× SDMMC (eMMC 4.51 + SD 3.0), 5× FLEXCOM (USART/SPI/TWI), 12-bit ADC (12 ch) |
| Low-Power Modes | ULP0 (512 Hz clocked peripherals), ULP1 (full clock stop with event wake-up), Backup mode (RTC + DDR self-refresh active) |
| Package | 256-ball TFBGA, 8×8 mm², 0.4 mm pitch, 1.05 mm thickness - matches SAMA5D24 configuration per DS60001476H Table 1-1 |
| Temperature Range | Industrial grade: −40°C to +105°C ambient (external temperature rating per datasheet) |
Pinout & Package
ATSAMA5D24B-CU is housed in a 256-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 8 mm × 8 mm with 0.4 mm ball pitch and 1.05 mm height. This package supports 105 I/Os (per SAMA5D24 configuration) and is optimized for thermal performance and PCB routing density in space-constrained industrial designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| NRST | Active-low reset input | Asynchronous global reset; initiates cold boot sequence and clears all registers and caches |
| XIN / XOUT | Main crystal oscillator interface | Supports 8–24 MHz external crystal; PLLA locks to generate system clocks up to 600–1200 MHz |
| XIN32 / XOUT32 | 32.768 kHz slow clock oscillator | Drives RTC and backup domain; enables timekeeping during ULP1/Backup modes |
| DDR_D[31:0] | 32-bit DDR data bus | Full-width interface for LPDDR2/LPDDR3; supports 16-bit or 32-bit configurations per SAMA5D24 spec |
| CANRX0 / CANTX0 CANRX1 / CANTX1 |
Dual CAN-FD receive/transmit pairs | Independent MCAN controllers; each with SRAM-based mailboxes and time-triggered transmission capability |
| GTX0–GTX3 / GRX0–GRX3 | EMAC 4-bit transmit/receive data | 10/100 Mbit/s MII interface; supports RMII via pin multiplexing and IEEE 1588 timestamp injection |
| LCDDAT[23:0] | 24-bit RGB parallel display interface | Direct connection to TFT panels up to 1024×768; supports alpha blending, rotation, and overlay composition |
| ISC_D[11:0] | 12-bit parallel image sensor interface | Connects to raw Bayer/YCbCr sensors up to 5 MP; includes pixel clock, sync signals, and field identification |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled MMU | Enables secure world/non-secure world isolation for Linux kernel and trusted firmware execution |
| On-the-fly AESB engine | Decrypts encrypted code/data from QSPI or DDR memory in real time-no software overhead or latency penalty |
| Scrambled 128 KB internal SRAM | Prevents side-channel leakage and unauthorized memory dump; erased on tamper detection |
| Event System | Allows peripherals (ADC, timers, UART) to trigger actions or wake CPU without software polling-reducing power by >40% in idle states |
| Secure Bootloader (ROM-based) | Verifies signature of first-stage bootloader using SHA-256; prevents unauthorized firmware execution at power-on |
| Integrity Check Monitor (ICM) | Hardware-accelerated SHA-256 hashing of external memories (DDR/QSPI); detects runtime memory corruption |
Applications
| Industrial HMI Gateway | Secure IoT Edge Node |
|---|---|
|
Use Scenario: A factory-floor panel PC aggregates data from PLCs, sensors, and HMIs via CAN, Ethernet, and serial buses while rendering real-time dashboards on a 1024×768 TFT display. IC Role / Device Role / Timing Role: ATSAMA5D24B-CU serves as the central application processor running Linux, managing multi-protocol connectivity, executing UI rendering via LCDC, and enforcing secure firmware updates. Use Value: Dual MCAN + EMAC + LCDC integration eliminates external protocol bridges; TrustZone isolates UI stack from control logic; AESB enables encrypted OTA updates over untrusted networks. |
Use Scenario: A smart utility meter communicates with grid infrastructure via 10/100 Ethernet (IEEE 1588 synchronized) and local devices via CAN-FD, while storing usage logs in encrypted eMMC storage. IC Role / Device Role / Timing Role: ATSAMA5D24B-CU acts as the secure edge compute node-running lightweight Linux, performing time-synchronized data acquisition, and executing cryptographic signing of telemetry payloads. Use Value: Hardware PTP timestamping ensures sub-microsecond time alignment across meters; on-chip TRNG and SHA-256 enable FIPS-compliant digital signatures; tamper detection erases keys upon physical intrusion. |
| Medical Point-of-Care Terminal | Automotive Diagnostic Tool |
|
Use Scenario: A portable clinical device captures images from a 5 MP medical camera via ISC, processes them with NEON-accelerated algorithms, and displays results on a capacitive touchscreen using PTC. IC Role / Device Role / Timing Role: ATSAMA5D24B-CU functions as the imaging and UI processor-driving the ISC, applying real-time image enhancement, and managing touch input with low-latency response. Use Value: Dedicated ISC with raw Bayer support preserves diagnostic image fidelity; 12-bit ADC reads analog biosensors; scrambled SRAM protects patient data in memory. |
Use Scenario: A handheld OBD-II scanner connects to vehicle ECUs via dual CAN-FD ports, logs diagnostic trouble codes, and uploads reports via USB host to a technician's laptop. IC Role / Device Role / Timing Role: ATSAMA5D24B-CU operates as the protocol translator and data logger-handling ISO-TP and UDS over CAN, buffering logs in DDR, and presenting diagnostics via USB HID interface. Use Value: Non-ISO CAN FD implementation supports legacy and next-gen ECU communication; USB host port enables direct log export without intermediate storage; secure boot prevents malicious firmware injection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D27B-CU | 289-ball LFBGA (14×14 mm), 128 I/Os, dual CAN-FD, same core/peripherals but adds PTC (8×8 touch), enhanced tamper monitoring | Required for designs needing full capacitive touch support or extended I/O count beyond 105 pins | Select when board layout allows larger package and application requires PTC or environmental monitors (temp/voltage/frequency) |
| i.MX6ULL | Arm Cortex-A7 @ 900 MHz, single CAN, no TrustZone MMU, no on-die crypto accelerators (AES/SHA/TRNG), different memory controller (LPDDR2 only) | Suitable for cost-sensitive Linux applications without stringent security or dual-CAN requirements | Choose only if security certification (IEC 60730 Class B), tamper resistance, or dual CAN-FD are not required |
Compared with ATSAMA5D24B-CU, ATSAMA5D27B-CU offers higher I/O count and integrated PTC but requires larger PCB area, while i.MX6ULL lacks hardware crypto, TrustZone, and dual CAN-FD-making it unsuitable for certified secure or automotive diagnostic use cases.
Availability
ATSAMA5D24B-CU is available at Aetrix Electronics and suitable for industrial HMI gateways, secure IoT edge nodes, medical point-of-care terminals, and automotive diagnostic tools requiring stable component supply across long product lifecycles.
Supply support for ATSAMA5D24B-CU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and Flash-IP solutions, delivering secure, low-power, and highly integrated semiconductor products for industrial, automotive, and IoT markets.
The SAMA5D2 series was designed specifically for secure, ultra-low-power embedded applications demanding Linux-capable processing, hardware-enforced trust, and rich peripheral integration-including dual CAN-FD, IEEE 1588 Ethernet, and advanced imaging interfaces.
FAQ
What is the maximum operating frequency of the ATSAMA5D24B-CU?
The ATSAMA5D24B-CU operates at up to 500 MHz on its Arm Cortex-A5 core. This frequency is achievable under typical conditions with appropriate voltage scaling and thermal management. The device also includes a 600–1200 MHz system PLL and a dedicated 480 MHz USB PLL, both independently configurable. All timing specifications in the official Microchip datasheet DS60001476H are validated at this maximum CPU speed.
Does the ATSAMA5D24B-CU support IEEE 1588 Precision Time Protocol?
Yes, the ATSAMA5D24B-CU includes hardware-accelerated IEEE 1588 Precision Time Protocol (PTP) support within its GMAC peripheral. It provides timestamping for transmit and receive frames with nanosecond resolution, enabling sub-microsecond synchronization in industrial automation and test equipment. This capability is explicitly documented in the "Ethernet 10/100" section of DS60001476H and requires no software-based timestamp correction.
What package type does the ATSAMA5D24B-CU use?
The ATSAMA5D24B-CU uses a 256-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 8 mm × 8 mm with 0.4 mm ball pitch and 1.05 mm thickness. This matches the SAMA5D24 configuration defined in Table 1-1 of DS60001476H and differs from the 196-ball (SAMA5D21) and 289-ball (SAMA5D27/28) variants. Pin compatibility is confirmed per the "Pinouts" section of the datasheet.
How many CAN interfaces does the ATSAMA5D24B-CU support?
The ATSAMA5D24B-CU integrates two MCAN controllers (CAN0 and CAN1), each supporting CAN FD with SRAM-based mailboxes and time-triggered transmission. These controllers implement the non-ISO CAN FD frame format and are explicitly designated for SAMA5D24 in Table 1-1 of DS60001476H. They do not pass ISO 16845-1:2016 conformance testing but are fully interoperable with standard CAN FD transceivers and ECUs.
What security features are built into the ATSAMA5D24B-CU?
The ATSAMA5D24B-CU includes Arm TrustZone, hardware AES-256/192/128, SHA-1/224/256/384/512, TDES, NIST SP800-22-compliant TRNG, 5 KB tamper-protected SRAM, 8 tamper detection pins, Integrity Check Monitor (ICM), and a secure ROM bootloader. These features are validated per Microchip's SAMA5D2 Series Secure Boot Strategy and are integral to IEC 60730 Class B certification-enabling secure boot, runtime memory integrity checks, and anti-cloning protection without external security chips.
ATSAMA5D24B-CU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 256-TFBGA
- Series:
- SAMA5D2
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 500MHz
- Co-Processors/DSP:
- Multimedia; NEON™ MPE
- RAM Controllers:
- LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keyboard, LCD, Touchscreen
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 + HSIC
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 256-TFBGA (8x8)
- Additional Interfaces:
- I2C, SMC, SPI, UART, USART, QSPI
ATSAMA5D24B-CU FAQ
1.How can I place an order for ATSAMA5D24B-CU through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D24B-CU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D24B-CU reliable?
The price and inventory of ATSAMA5D24B-CU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D24B-CU is usually 5 days.
3.What payment methods are accepted for ATSAMA5D24B-CU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D24B-CU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D24B-CU?
ATSAMA5D24B-CU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D24B-CU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D24B-CU?
For technical support, including ATSAMA5D24B-CU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D24B-CU requirements.
6.How does Aetrix verify that ATSAMA5D24B-CU is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D24B-CU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D24B-CU meets industry standards.
7.What is the process for return or replacement of ATSAMA5D24B-CU?
All ATSAMA5D24B-CU units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D24B-CU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D24B-CU part is unused and in its original packaging.
Return procedure for ATSAMA5D24B-CU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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