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Microchip Technology ATSAMA5D26A-CN

Part No.:
ATSAMA5D26A-CN
Manufacturer:
Microchip Technology
Category:
Microprocessors
Package:
289-LFBGA
Datasheet:
AetrixATSAMA5D26A-CN.pdf
Description:
IC MPU SAMA5D2 500MHZ 289LFBGA
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,237

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Product details

Overview

ATSAMA5D26A-CN from Microchip Technology is an ultra-low-power Arm Cortex-A5 microprocessor unit (MPU) operating at up to 500 MHz, integrating a 128-Kbyte configurable L2 cache, TrustZone security, AES/SHA/TRNG crypto accelerators, and dual CAN-FD controllers. It supports DDR3L/LPDDR3 memory, 10/100 Ethernet with AVB and IEEE 1588 PTP, and is qualified for industrial temperature range (−40°C to +105°C). It targets secure embedded applications such as industrial HMIs and IoT gateways.

For engineers reviewing the ATSAMA5D26A-CN datasheet, ATSAMA5D26A-CN pinout, ATSAMA5D26A-CN application, or ATSAMA5D26A-CN equivalent, key selection considerations include its dual MCAN support (non-ISO CAN FD), 128 I/Os with 8 tamper pins, 12-channel 12-bit ADC with resistive touchscreen capability, and Linux-ready architecture with free distribution and bare-metal examples.

Technical Context

The ATSAMA5D26A-CN implements an Armv7-A compliant Cortex-A5 core with NEON SIMD engine and floating-point unit (FPU), paired with MMU, 32-Kbyte L1 instruction/data caches, and a 128-Kbyte L2 cache usable as SRAM. Its multilayer bus architecture integrates two 16-channel DMA controllers and dedicated peripheral DMAs for zero-overhead data movement.

Security is enforced via Arm TrustZone, on-the-fly AESB encryption/decryption for DDR and QSPI, Integrity Check Monitor (ICM) using SHA256, 5-Kbyte scrambled secure SRAM (1-Kbyte nonerasable on tamper), and eight tamper detection pins. Low-power operation includes ULP0/ULP1 modes and Backup mode with DDR self-refresh.

Key Specifications

Parameter Value and Actual Design Meaning
CPU CoreArm Cortex-A5, Armv7-A, up to 500 MHz - enables Linux-capable real-time processing with NEON/FPU acceleration
Memory Interface32-bit DDR3L/LPDDR3 controller supporting up to 512 Mbytes - provides high-bandwidth external memory access with on-the-fly encryption
Security AccelerationAES-128/192/256, SHA-1/224/256/384/512, TRNG, TDES - hardware-accelerated cryptography compliant with FIPS PUB 140-2/140-3 and NIST SP 800-22
Connectivity PeripheralsDual MCAN (non-ISO CAN FD), 10/100 EMAC with AVB, IEEE 1588 PTP, USB 2.0 HS Device + 2x Host or HSIC - supports deterministic industrial networking and secure device-to-cloud links
User Interface24-bit RGB LCD TFT controller (1024×768), ISC image sensor interface (5-Mpixel), 12-channel 12-bit ADC with resistive touchscreen - enables rich HMI and vision-enabled edge devices
Power ManagementUltra-Low-Power (ULP0/ULP1) and Backup modes with RTC, 5-Kbyte backup SRAM, SleepWalking™ - allows sub-100 µA standby with fast wake-up from multiple sources including UART or analog compare
I/O & Packaging128 programmable I/Os in 289-ball LFBGA (14×14 mm, 0.8 mm pitch) - supports high-density peripheral routing and industrial-grade thermal/mechanical reliability

Pinout & Package

ATSAMA5D26A-CN is housed in a 289-ball LFBGA package (14 mm × 14 mm, 1.4 mm thickness, 0.8 mm ball pitch), optimized for industrial thermal performance and signal integrity. Pin functions are defined across five parallel I/O banks (PA–PE), each supporting up to eight peripheral multiplexing options per pin.

Pin/Terminal Circuit Role Design Meaning
PA0–PA31, PB0–PB31, PC0–PC31, PD0–PD31, PE0–PE31Programmable I/O Banks128 total GPIOs with configurable pull-up/down, schmitt trigger, and peripheral function mapping - enables flexible board design and reuse across variants
DDR_D[31:0], DDR_A[13:0], DDR_BA[2:0], DDR_CK/CLKN, DDR_CKE, DDR_CS, DDR_WE, DDR_RAS/CASDDR3L/LPDDR3 Memory Interface32-bit data bus with differential clock and calibration signals - supports high-speed, low-power SDRAM with built-in scrambling and ECC path
CANRX0/CANTX0, CANRX1/CANTX1Dual MCAN TransceiversTwo independent CAN-FD interfaces with SRAM-based mailboxes and time-triggered transmission - enables redundant fieldbus communication without software arbitration
GTX0–GTX3, GRX0–GRX3, GMDC/GMDIO, GREFCK10/100 Ethernet MAC (GMAC)IEEE 802.3az energy-efficient Ethernet with AVB timestamping and credit-based shaping - delivers deterministic latency for industrial control networks
LCDDAT[23:0], LCDVSYNC, LCDHSYNC, LCDPCK, LCDDENLCD TFT Controller Interface24-bit parallel RGB output supporting 1024×768 resolution with hardware overlays and alpha blending - reduces CPU load for dynamic GUI rendering

Key Features

Feature Design Value
Arm TrustZone + Secure BootloaderHardware-enforced isolation between secure/non-secure worlds with authenticated boot chain - prevents unauthorized firmware execution and runtime code injection
On-the-fly AESB EncryptionReal-time decryption of encrypted code/data from DDR/QSPI without CPU involvement - eliminates software overhead while protecting intellectual property
Event SystemPeripheral-to-peripheral event chaining without CPU intervention in Active/Idle modes - enables ultra-low-latency sensor-to-actuator response in battery-powered systems
Integrity Check Monitor (ICM)SHA256-based memory content verification for QSPI, DDR, and internal ROM - detects malicious or accidental memory corruption during runtime
Backup Mode with DDR Self-RefreshRTC and wake logic remain active while DDR retains state in self-refresh - enables instant resume from deep sleep with full system context preserved

Applications

Industrial HMI Secure IoT Gateway

Use Scenario: Touch-enabled panel PC for factory floor monitoring with real-time PLC data visualization and local alarm logging.

IC Role / Device Role / Timing Role: Main application processor executing Linux with Qt-based GUI, managing LCD, touch controller, Ethernet, and dual CAN for machine connectivity.

Use Value: Integrated 12-channel ADC with resistive touchscreen support eliminates external digitizer IC; dual MCAN enables direct connection to legacy industrial drives and sensors.

Use Scenario: Edge gateway aggregating data from Modbus RTU, CAN bus, and BLE sensors before forwarding via TLS-secured MQTT to cloud platform.

IC Role / Device Role / Timing Role: Secure application host running lightweight Linux, performing crypto offload (AES/SHA), secure boot, and IEEE 1588 time-synchronized packet forwarding.

Use Value: Hardware TRNG and FIPS-compliant crypto engines enable robust key generation and TLS handshake acceleration; tamper detection pins guard against physical intrusion during deployment.

Medical Point-of-Care Device Smart Energy Metering Hub

Use Scenario: Portable diagnostic instrument with camera-based imaging, audio feedback, and wired/wireless data export compliance with HIPAA requirements.

IC Role / Device Role / Timing Role: Central MPU handling image capture via ISC, stereo Class D audio playback, USB device for data export, and secure eMMC storage.

Use Value: ISC interface supports raw Bayer/JPEG sensors up to 5 MP; on-chip AESB encrypts patient data stored on eMMC before write - meets regulatory data-at-rest requirements.

Use Scenario: DIN-rail mounted utility meter concentrator collecting AMI data over RS-485 (Modbus) and M-Bus, with time-synchronized firmware updates via Ethernet.

IC Role / Device Role / Timing Role: Real-time data aggregator with IEEE 1588 PTP synchronization across multiple meters, executing secure OTA updates via signed images verified by ICM.

Use Value: Precision timestamping ensures billing accuracy across distributed meters; secure bootloader and fuse-based JTAG protection prevent unauthorized firmware modification.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-performance, secure MPU applications.

Alternative Part Technical Difference Application Difference Selection Advice
ATSAMA5D27A-CN256-ball TFBGA (8×8 mm), 105 I/Os, single CAN, no environmental monitors, no AESBSuitable for cost-sensitive designs where dual CAN and DDR encryption are not requiredSelect when footprint reduction and lower I/O count are acceptable trade-offs for reduced security and connectivity
i.MX6ULLArm Cortex-A7, 900 MHz, no TrustZone, no tamper detection, no on-die crypto accelerators (AES/SHA/TRNG)Requires external security IC for comparable protection; lacks integrated tamper sensing and secure boot enforcementChoose only if higher CPU frequency outweighs need for hardware-enforced security and industrial-grade tamper resilience

Compared with ATSAMA5D26A-CN, ATSAMA5D27A-CN offers smaller packaging and lower pin count but omits dual CAN and AESB encryption, while i.MX6ULL delivers higher clock speed but lacks TrustZone, tamper pins, and integrated cryptographic acceleration - making ATSAMA5D26A-CN uniquely suited for safety-critical, physically exposed deployments requiring end-to-end hardware security.

Availability

ATSAMA5D26A-CN is available at Aetrix Electronics and suitable for industrial HMIs, secure IoT gateways, medical point-of-care devices, and smart energy metering hubs requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ATSAMA5D26A-CN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company delivering scalable, secure, and power-optimized microcontrollers, analog, FPGA, and memory solutions for industrial, automotive, and communications markets.

The SAMA5D2 product line was designed specifically for secure, ultra-low-power embedded applications demanding Linux capability, hardware-enforced trust, and industrial-grade reliability - targeting industrial automation, medical devices, and connected infrastructure.

FAQ

What is the maximum operating frequency of the ATSAMA5D26A-CN?

The ATSAMA5D26A-CN operates at up to 500 MHz on its Arm Cortex-A5 core. This frequency is sustained under typical industrial conditions with appropriate thermal management and power supply regulation. The device also features a 128-Kbyte configurable L2 cache and 32-Kbyte L1 instruction/data caches to maintain throughput at this clock rate. ATSAMA5D26A-CN supports dynamic voltage and frequency scaling (DVFS) through its Power Management Controller (PMC) to optimize performance versus power consumption.

Does the ATSAMA5D26A-CN support CAN FD, and what are its limitations?

Yes, the ATSAMA5D26A-CN integrates two MCAN controllers supporting CAN FD frame format, but they implement the non-ISO CAN FD specification and do not pass the ISO 16845-1:2016 conformance test. Each MCAN includes SRAM-based mailboxes and supports time- and event-triggered transmission. ATSAMA5D26A-CN does not support classical CAN-only mode; CAN FD operation is mandatory, and users must validate interoperability with target transceivers and network stacks accordingly.

What security features are implemented in hardware on the ATSAMA5D26A-CN?

The ATSAMA5D26A-CN includes Arm TrustZone, on-the-fly AESB encryption/decryption for DDR and QSPI, Integrity Check Monitor (ICM) using SHA256, 5-Kbyte scrambled secure SRAM (1-Kbyte nonerasable on tamper), eight tamper detection pins, and a programmable fuse box with 544 bits. ATSAMA5D26A-CN also embeds FIPS PUB 140-2/140-3 compliant AES, SHA, TDES, and TRNG accelerators - all accessible without software intervention for secure boot, encrypted storage, and runtime integrity verification.

Which memory types does the ATSAMA5D26A-CN support, and what is the maximum capacity?

The ATSAMA5D26A-CN supports DDR2, DDR3, DDR3L, LPDDR1, LPDDR2, and LPDDR3 memory via its 32-bit multiport DDR controller, with maximum addressable capacity of 512 Mbytes. It also supports QSPI flash (up to 4 Gbytes), e.MMC 4.51 (SDMMC0), SD 3.0, and 8-bit SLC/MLC NAND with up to 32-bit PMECC. ATSAMA5D26A-CN includes "on-the-fly" encryption/decryption for DDR and QSPI memories, ensuring data confidentiality without CPU overhead.

What development resources are provided for the ATSAMA5D26A-CN?

Microchip provides a free Linux distribution (Yocto-based) and bare-metal C examples for ATSAMA5D26A-CN, along with comprehensive documentation including the DS60001476H datasheet, SAMA5D2 Series Secure Boot Strategy (NDA), and SAMA5D2 External Tamper Protections guide. ATSAMA5D26A-CN is supported by Atmel Studio (legacy) and Microchip MPLAB Harmony v3, and compatible evaluation platforms include the SAMA5D2 Xplained Ultra (ATSAMA5D2-XULT).

ATSAMA5D26A-CN Specifications

Product attributes
Attribute value
Manufacturer:
Microchip Technology
Package/Case:
289-LFBGA
Series:
SAMA5D2
Packaging:
Tray
Product Status:
Active
Core Processor:
ARM® Cortex®-A5
Number of Cores/Bus Width:
1 Core, 32-Bit
Speed:
500MHz
Co-Processors/DSP:
Multimedia; NEON™ MPE
RAM Controllers:
LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI
Graphics Acceleration:
Yes
Display & Interface Controllers:
Keyboard, LCD, Touchscreen
Ethernet:
10/100Mbps (1)
SATA:
-
USB:
USB 2.0 + HSIC
Voltage - I/O:
3.3V
Operating Temperature:
-40°C ~ 105°C (TA)
Grade:
-
Qualification:
-
Security Features:
ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC
Mounting Type:
Surface Mount
Supplier Device Package:
289-LFBGA (14x14)
Additional Interfaces:
I2C, SMC, SPI, UART, USART, QSPI

ATSAMA5D26A-CN FAQ

1.How can I place an order for ATSAMA5D26A-CN through Aetrix?

Please submit a Request for Quotation (RFQ) for ATSAMA5D26A-CN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ATSAMA5D26A-CN reliable?

The price and inventory of ATSAMA5D26A-CN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D26A-CN is usually 5 days.

3.What payment methods are accepted for ATSAMA5D26A-CN?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D26A-CN transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ATSAMA5D26A-CN?

ATSAMA5D26A-CN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ATSAMA5D26A-CN order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ATSAMA5D26A-CN?

For technical support, including ATSAMA5D26A-CN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D26A-CN requirements.

6.How does Aetrix verify that ATSAMA5D26A-CN is sourced from the original manufacturer or authorized distributors?

All ATSAMA5D26A-CN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D26A-CN meets industry standards.

7.What is the process for return or replacement of ATSAMA5D26A-CN?

All ATSAMA5D26A-CN units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D26A-CN, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ATSAMA5D26A-CN part is unused and in its original packaging.

Return procedure for ATSAMA5D26A-CN:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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