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Microchip Technology ATSAMA5D27A-CN
- Part No.:
- ATSAMA5D27A-CN
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 289-LFBGA
- Datasheet:
-
ATSAMA5D27A-CN.pdf
- Description:
- IC MPU SAMA5D2 500MHZ 289LFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:3,603
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Product details
Overview
ATSAMA5D27A-CN from Microchip Technology is an ultra-low-power Arm Cortex-A5-based microprocessor unit (MPU) operating at up to 500 MHz, integrating DDR3L/LPDDR3 memory controller, 10/100 Ethernet MAC (GMAC), dual CAN-FD controllers, USB high-speed host/device ports, and hardware crypto accelerators (AES-256, SHA-256, TRNG). It targets secure industrial HMI, IoT gateways, and point-of-sale terminals requiring real-time connectivity and tamper-resistant boot.
For engineers reviewing the ATSAMA5D27A-CN datasheet, ATSAMA5D27A-CN pinout, ATSAMA5D27A-CN application, or ATSAMA5D27A-CN equivalent, this page delivers verified technical context, validated package mapping (289-ball LFBGA), confirmed low-power modes (ULP0/ULP1/Backup), exact peripheral count (2 CAN-FD, 5 FLEXCOMs, 12-channel 12-bit ADC), and two field-validated alternative MPUs with documented functional trade-offs.
Technical Context
The ATSAMA5D27A-CN implements a dual-CAN-FD (MCAN) subsystem with SRAM-based mailboxes and time-triggered transmission, compliant with non-ISO CAN FD frame format per ISO 16845-1:2016 conformance test exclusion. Its memory architecture includes a 128-Kbyte configurable L2 cache, 128-Kbyte scrambled internal SRAM, and DDR3L/LPDDR3 controller supporting on-the-fly AES encryption/decryption.
Security is enforced via Arm TrustZone, 5-Kbyte tamper-protected SRAM (1-Kbyte nonerasable), eight tamper pins (PIOBU0–PIOBU7), Integrity Check Monitor (ICM) using SHA-256, and secure bootloader in 64-Kbyte scrambled ROM. The device supports IEEE 802.1AS timestamping, PTP, and AVB traffic shaping for deterministic Ethernet applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5 @ 500 MHz with NEON, FPU, MMU, and TrustZone isolation |
| Memory Interface | 32-bit DDR3L/LPDDR3 controller with self-refresh mode support and on-the-fly AESB encryption |
| Connectivity | Dual MCAN-FD controllers (non-ISO frame format), 10/100 GMAC with IEEE 1588 PTP and AVB support |
| Security | Hardware AES-256/SHA-256/TRNG, 5-Kbyte tamper-protected SRAM, 8 tamper pins, ICM-based memory integrity check |
| Peripherals | 12-channel 12-bit ADC with resistive touchscreen, 8×8 PTC, LCD TFT controller (1024×768), ISC image sensor interface |
| Power Modes | Three software-selectable low-power states: Idle, Ultra-Low-Power (ULP0/ULP1), and Backup with DDR self-refresh |
| Package | 289-ball LFBGA, 14×14 mm², 0.8 mm pitch, 1.4 mm thickness - matches SAMA5D27 configuration summary |
Pinout & Package
ATSAMA5D27A-CN is housed in a 289-ball LFBGA package (14×14 mm², 0.8 mm pitch), optimized for high-density industrial PCB layouts and thermal performance in extended temperature range (-40°C to +105°C). Pin assignment follows the SAMA5D27-specific signal mapping defined in DS60001476H, including dedicated tamper inputs (PIOBU0–PIOBU7), dual CAN-FD transceivers (CANRX0/CANTX0, CANRX1/CANTX1), and DDR3L interface signals (DDR_D[31:0], DDR_A[13:0], DDR_CS).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CANRX0 / CANTX0 | Primary CAN-FD Receive/Transmit | Non-ISO CAN FD frame support; requires external transceiver for physical layer |
| CANRX1 / CANTX1 | Secondary CAN-FD Receive/Transmit | Independent mailbox SRAM; enables time-triggered dual-bus communication |
| DDR_D[31:0] | DDR3L/LPDDR3 Data Bus | 32-bit bidirectional data path with differential DQS strobes for timing-critical memory access |
| PIOBU0–PIOBU7 | Tamper Detection Inputs | Eight dedicated pins for static/dynamic intrusion monitoring; trigger secure erase on violation |
| GTX0–GTX3 / GRX0–GRX3 | GMAC Transmit/Receive Data | 4-bit parallel MII interface; supports IEEE 802.1AS timestamping and PTP synchronization |
| SDMMC0_DAT[7:0] | e.MMC 4.51 / SD 3.0 Interface | 8-bit wide high-speed data bus; supports boot-from-eMMC and secure firmware updates |
Key Features
| Feature | Design Value |
|---|---|
| Secure Boot Architecture | 64-Kbyte scrambled ROM embedding secure bootloader with fuse-protected JTAG disable and BMS key storage |
| Hardware Crypto Acceleration | FIPS PUB 197-compliant AES-256, SHA-256, TDES, and NIST SP 800-22-certified TRNG for runtime encryption |
| Low-Power Event System | Peripheral-to-peripheral event routing without CPU intervention in Active/Idle modes for deterministic wake-up |
| Industrial Temperature Support | Qualified for -40°C to +105°C operation with calibrated RTC, POR cells, and crystal failure detection |
| Display & Imaging Interface | 24-bit RGB LCD controller (1024×768) + ISC supporting 5-Mpixel raw Bayer/JPEG sensors via parallel 12-bit interface |
Applications
| Industrial HMI Terminal | Secure IoT Gateway |
|---|---|
|
Use Scenario: Touch-enabled factory floor display with real-time machine status, local data logging, and remote diagnostics over cellular/Ethernet. IC Role / Device Role / Timing Role: Main application processor executing Linux with deterministic Ethernet (PTP/AVB) and dual CAN-FD for PLC interconnect. Use Value: Integrated TrustZone and tamper detection prevent unauthorized firmware modification; on-the-fly DDR encryption protects stored operational data. |
Use Scenario: Edge gateway aggregating sensor data from Modbus RTU, CAN bus, and BLE peripherals before TLS-secured cloud upload. IC Role / Device Role / Timing Role: Secure root-of-trust MPU managing encrypted OTA updates, authenticated device onboarding, and time-synchronized packet forwarding. Use Value: Hardware AESB and secure bootloader ensure firmware integrity; IEEE 1588 PTP enables sub-microsecond clock alignment across distributed sensors. |
| Point-of-Sale (POS) Terminal | Medical Device Controller |
|
Use Scenario: PCI-compliant payment terminal with EMV contactless reader, thermal printer, and biometric authentication. IC Role / Device Role / Timing Role: Certified Class B safety MPU handling encrypted card transactions, secure PIN entry, and tamper-evident logging. Use Value: IEC 60730-compliant clock monitoring and plausibility checks on ADC/PIO reduce external safety circuitry; 5-Kbyte tamper SRAM stores cryptographic keys. |
Use Scenario: Portable diagnostic instrument with capacitive touch UI, image capture from medical-grade camera, and HIPAA-compliant data export. IC Role / Device Role / Timing Role: High-integrity controller running real-time OS with secure boot, encrypted storage, and environmental monitor integration (temp/voltage). Use Value: Eight tamper pins and die shield detect physical intrusion; ISC interface acquires calibrated medical images with hardware post-processing (rotation, alpha blending). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D26A-CN | 196-ball TFBGA, 128 I/Os, single CAN-FD, no environmental monitors, 16-bit DDR bus | Suitable for cost-sensitive HMI with reduced peripheral count and no extended temp or tamper requirements | Select when footprint and BOM cost are prioritized over dual CAN, DDR3L bandwidth, and full security features |
| ATSAMA5D28A-CN | 289-ball LFBGA, 128 I/Os, dual CAN-FD, environmental monitors (temp/voltage/frequency), die shield | Required for applications needing active die shielding and calibrated environmental sensing under NDA | Choose when certified tamper resistance and real-time environmental monitoring are mandatory for regulatory compliance |
Compared with ATSAMA5D27A-CN, ATSAMA5D26A-CN reduces package size and peripheral count for lower-cost designs, while ATSAMA5D28A-CN adds environmental monitors and die shield for higher-assurance security-critical deployments - both share identical core architecture and Linux support but differ in I/O count, memory interface width, and security feature depth.
Availability
ATSAMA5D27A-CN is available at Aetrix Electronics and suitable for industrial HMI, secure IoT gateways, and point-of-sale terminals requiring stable component supply, long-term lifecycle management, and traceable sourcing for production programs.
Supply support for ATSAMA5D27A-CN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company delivering smart, connected, and secure embedded control solutions with focus on reliability, longevity, and design-in support.
The SAMA5D2 product line targets secure, ultra-low-power industrial and IoT edge applications, combining Arm Cortex-A5 performance with hardware-enforced security, deterministic networking, and extended temperature operation.
FAQ
What is the maximum supported DDR memory type and speed for ATSAMA5D27A-CN?
The ATSAMA5D27A-CN supports DDR3L and LPDDR3 memory types with a 32-bit bus width, enabling up to 512 Mbytes capacity. Its DDR controller operates with DLL-off mode only and supports on-the-fly AES encryption/decryption. The device is validated for DDR3L at 1.35 V and LPDDR3 at 1.2 V, with timing parameters aligned to JEDEC specifications for stable operation at 500 MHz CPU frequency. ATSAMA5D27A-CN does not support DDR4 or DDR5 interfaces.
Does ATSAMA5D27A-CN support IEEE 1588 Precision Time Protocol (PTP) and how is it implemented?
Yes, ATSAMA5D27A-CN implements IEEE 1588 PTP through its GMAC peripheral with hardware timestamping on transmit and receive paths. The GMAC includes a dedicated Timestamp Unit (TSU) that captures precise nanosecond-resolution timestamps for PTP sync, delay_req, and pdelay_req messages. This enables sub-microsecond clock synchronization across industrial Ethernet networks without CPU overhead. ATSAMA5D27A-CN also supports IEEE 802.1AS for audio/video bridging and IEEE 802.1Qav traffic shaping.
How many CAN-FD interfaces does ATSAMA5D27A-CN provide, and what is their compliance status?
ATSAMA5D27A-CN integrates two MCAN-FD controllers (CAN0 and CAN1), each with SRAM-based mailboxes and time-triggered transmission capability. Both controllers implement the non-ISO CAN FD frame format and do not pass the ISO 16845-1:2016 CAN FD Conformance Test. They are fully compatible with Microchip's standalone CAN FD transceivers (e.g., MCP2562FD) and support bit rates up to 5 Mbps in FD mode. ATSAMA5D27A-CN does not include integrated CAN PHY.
What security features are enabled by default in ATSAMA5D27A-CN at power-on?
At power-on, ATSAMA5D27A-CN enables Arm TrustZone memory protection, 64-Kbyte scrambled ROM bootloader execution, zero-power POR cells, main crystal oscillator failure detection, and write-protection on critical registers. The Integrity Check Monitor (ICM) is initialized to verify ROM and SRAM contents using SHA-256. Tamper detection (PIOBU0–PIOBU7) and secure SRAM erasure require explicit configuration via fuse programming and are not active until user-defined security policies are loaded. ATSAMA5D27A-CN does not enable AESB or environmental monitors by default.
Which development tools and software support are provided for ATSAMA5D27A-CN?
Microchip provides a free Yocto Project-based Linux distribution (SAMA5D2 Linux SDK), bare-metal C examples, Atmel Studio IDE integration, and SAM-BA In-System Programming utility for ATSAMA5D27A-CN. Hardware evaluation platforms include the SAMA5D2 Xplained Ultra board (ATSAMA5D2-XULT) with debug probe, QSPI Flash, DDR3L, Ethernet, and CAN transceivers. ATSAMA5D27A-CN is supported by FreeRTOS, Zephyr, and SafeRTOS for real-time applications, with drivers validated for Linux kernel v5.15+ and mainline U-Boot.
ATSAMA5D27A-CN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 289-LFBGA
- Series:
- SAMA5D2
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 500MHz
- Co-Processors/DSP:
- Multimedia; NEON™ MPE
- RAM Controllers:
- LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keyboard, LCD, Touchscreen
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 + HSIC
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 289-LFBGA (14x14)
- Additional Interfaces:
- I2C, SMC, SPI, UART, USART, QSPI
ATSAMA5D27A-CN FAQ
1.How can I place an order for ATSAMA5D27A-CN through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D27A-CN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D27A-CN reliable?
The price and inventory of ATSAMA5D27A-CN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D27A-CN is usually 5 days.
3.What payment methods are accepted for ATSAMA5D27A-CN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D27A-CN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D27A-CN?
ATSAMA5D27A-CN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D27A-CN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D27A-CN?
For technical support, including ATSAMA5D27A-CN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D27A-CN requirements.
6.How does Aetrix verify that ATSAMA5D27A-CN is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D27A-CN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D27A-CN meets industry standards.
7.What is the process for return or replacement of ATSAMA5D27A-CN?
All ATSAMA5D27A-CN units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D27A-CN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D27A-CN part is unused and in its original packaging.
Return procedure for ATSAMA5D27A-CN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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