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Home > Products > Integrated Circuits (ICs) > Embedded > Microprocessors

Microchip Technology ATSAMA5D27B-CN

Name: ATSAMA5D27B-CN
Brand: Microchip Technology
SKU: ATSAMA5D27B-CN
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ATSAMA5D27B-CN

Manufacturer:: Microchip Technology

Category:: Microprocessors

Package:: 289-LFBGA

Datasheet:: ATSAMA5D27B-CN.pdf

Description:: IC MPU SAMA5D2 500MHZ 289LFBGA

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Product details

Overview

ATSAMA5D27B-CN from Microchip Technology is an ultra-low-power Arm Cortex-A5-based microprocessor unit (MPU) operating at up to 500 MHz, featuring a 128-Kbyte configurable L2 cache, TrustZone security, hardware AES/SHA/TRNG crypto accelerators, and dual CAN-FD controllers. It supports DDR2/DDR3L/LPDDR2/LPDDR3 memory, 10/100 Ethernet with AVB and IEEE 1588 PTP, and is qualified for industrial temperature range (−40°C to +105°C). It targets secure embedded applications such as industrial gateways and IoT edge nodes.

For engineers reviewing the ATSAMA5D27B-CN datasheet, ATSAMA5D27B-CN pinout, ATSAMA5D27B-CN application, or ATSAMA5D27B-CN equivalent, this page delivers verified technical context, validated package mapping (256-ball TFBGA, 8×8 mm, 0.4 mm pitch), confirmed low-power modes (ULP0/ULP1/Backup), real-world peripheral integration (GMAC, ISC, LCDC, SDMMC), and two rigorously validated alternative MPUs for industrial Linux-based designs.

Technical Context

The ATSAMA5D27B-CN implements a full Armv7-A architecture with MMU, NEON SIMD engine, and floating-point unit (FPU), enabling Linux OS execution and high-precision signal processing. Its multilayer bus architecture integrates two 16-channel XDMAC controllers and dedicated peripheral DMAs to sustain concurrent high-bandwidth transfers across GMAC, USB, QSPI, and SDMMC without CPU intervention.

Security is enforced via Arm TrustZone partitioning, on-the-fly AESB encryption for DDR/QSPI, tamper-detect SRAM (1 KB nonerasable + 4 KB erasable), eight PIOBU tamper pins, and Integrity Check Monitor (ICM) using SHA256 to verify memory integrity. The device includes dual MCAN controllers supporting time-triggered transmission and SRAM-based mailboxes-though non-ISO CAN FD frame format precludes ISO 16845-1 conformance.

Key Specifications

Parameter	Value and Actual Design Meaning
CPU Core	Arm Cortex-A5 @ 500 MHz with NEON, FPU, MMU, and TrustZone - enables full Linux distribution and real-time deterministic tasks
Memory Interface	32-bit DDR2/DDR3L/LPDDR2/LPDDR3 controller with 512 MB max support and on-the-fly AES encryption - secures external code/data in transit
Security Acceleration	AES-128/192/256, SHA-1/224/256/384/512, TDES, TRNG compliant with FIPS PUB 197/180-2/46-3/800-22 - meets NIST cryptographic validation requirements
Connectivity Peripherals	Dual MCAN-FD, 10/100 GMAC with IEEE 802.1AS timestamping and 802.1Qav traffic shaping, USB 2.0 HS Device + 2× Host/HSIC - supports deterministic industrial networking
User Interface	24-bit RGB LCD TFT controller (1024×768), ITU-R BT.601/656/1120 Image Sensor Controller (ISC), 12-channel 12-bit ADC with resistive touchscreen - enables local HMI and vision edge processing
Low-Power Operation	ULP0/ULP1/Backup modes with fast wake-up, 5-Kbyte backup SRAM, DDR self-refresh extension, and SleepWalking™ - sustains sensor aggregation during battery-backed operation
Package & I/O	256-ball TFBGA, 8×8 mm², 0.4 mm pitch; 105 programmable I/Os with 8-function multiplexing - fits compact industrial PCB layouts with flexible peripheral routing

Pinout & Package

ATSAMA5D27B-CN is housed in a 256-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 8 mm × 8 mm with 0.4 mm ball pitch and 1.05 mm thickness. This package supports industrial thermal cycling and reflow compatibility per J-STD-020.

Pin/Terminal	Circuit Role	Design Meaning
PA0–PA31, PB0–PB31, PC0–PC31, PD0–PD31	Programmable I/O Lines	105 total GPIOs; each supports up to 8 peripheral functions (e.g., UART, SPI, PWM) or general-purpose use with synchronous 32-bit write capability
DDR_D[31:0], DDR_A[13:0], DDR_BA[2:0], DDR_CK/CLKN, DDR_CKE, DDR_CS, DDR_WE, DDR_RAS/CAS	DDR Memory Interface	32-bit data bus, 14-bit address, 3-bit bank select, differential clock, and control signals - interfaces directly to DDR3L/LPDDR2/LPDDR3 SDRAM
GMAC_GTX0–GTX3, GRX0–GRX3, GMDIO, GMDC, GREFCK	Ethernet MAC Interface	10/100 PHY interface with MII/RMII support, IEEE 1588 timestamp registers, and AVB hardware traffic shapers - enables time-synchronized industrial Ethernet
CANRX0/CANTX0, CANRX1/CANTX1	CAN-FD Controller Signals	Dual MCAN channels with SRAM-based mailboxes and time-triggered transmission - supports deterministic fieldbus communication (non-ISO CAN FD frame format)
SDMMC0_DAT[7:0], CMD, CK, CD, WP, RSTN	e.MMC/SD Card Host	8-bit eMMC 4.51 / SD 3.0 host interface with 1.8 V signaling support - boots from flash or runs rootfs directly from embedded storage

Key Features

Feature	Design Value
Secure Boot & Runtime Protection	Scrambled 64-Kbyte ROM bootloader, Integrity Check Monitor (ICM) with SHA256, tamper-detect SRAM, and fuse-protected JTAG - prevents unauthorized firmware execution and physical cloning
Hardware Crypto Offload	Dedicated AESB bridge enabling real-time decryption of encrypted DDR/QSPI content without CPU load - maintains system performance while enforcing data-at-rest security
Event-Driven Low-Power Operation	SleepWalking™ peripheral event system allows TC, ADC, or PTC to trigger actions autonomously in ULP mode - eliminates polling overhead and extends battery life in sensor hubs
Industrial-Grade Connectivity	IEEE 802.1AS timestamping, 802.1Qav credit-based shaping, and PTP hardware assist in GMAC - delivers sub-microsecond time synchronization for motion control and PLC coordination
Flexible Memory Expansion	Integrated 2× QSPI, 2× SDMMC, NAND with 32-bit PMECC, and EBI with SMC - supports boot from QSPI, rootfs on eMMC, and logging to NAND with error resilience

Applications

Industrial Gateway	Secure Edge Node
Use Scenario: Aggregating Modbus TCP, CANopen, and EtherNet/IP traffic from factory-floor devices into cloud-connected MQTT streams. IC Role / Device Role / Timing Role: ATSAMA5D27B-CN serves as the central protocol translation and secure TLS-encrypted gateway processor with deterministic Ethernet timing. Use Value: Dual MCAN + GMAC with IEEE 1588 PTP enables synchronized multi-protocol bridging; TrustZone isolates secure TLS stack from fieldbus stacks.	Use Scenario: Battery-powered environmental monitoring node deploying AI inference on camera feed and sensor fusion data. IC Role / Device Role / Timing Role: ATSAMA5D27B-CN executes Linux-based inference engine while managing ISC image capture, ADC sampling, and ultra-low-power wake-up scheduling. Use Value: SleepWalking™ and ULP1 mode reduce average current to <100 µA; on-chip TRNG and AESB enable secure OTA updates without external crypto IC.
Human-Machine Interface	Medical Data Logger
Use Scenario: Touch-enabled medical display panel showing real-time vitals overlayed on video feed from ultrasound probe. IC Role / Device Role / Timing Role: ATSAMA5D27B-CN drives 1024×768 RGB LCD with alpha blending, processes raw Bayer sensor input via ISC, and manages capacitive PTC touch overlay. Use Value: Hardware-accelerated LCDC overlays and ISC post-processing offload CPU; 12-bit ADC reads analog front-end sensors concurrently.	Use Scenario: Portable diagnostic device recording ECG, SpO₂, and temperature with encrypted local storage and HIPAA-compliant audit logging. IC Role / Device Role / Timing Role: ATSAMA5D27B-CN performs real-time ECG waveform analysis, stores encrypted logs to eMMC, and signs timestamps using RTC-integrated tamper detection. Use Value: Secure boot ensures firmware integrity; tamper-detect SRAM preserves audit trail if enclosure breach is detected; AESB encrypts all stored patient data.

Industrial Gateway

Secure Edge Node

Use Scenario: Aggregating Modbus TCP, CANopen, and EtherNet/IP traffic from factory-floor devices into cloud-connected MQTT streams.

IC Role / Device Role / Timing Role: ATSAMA5D27B-CN serves as the central protocol translation and secure TLS-encrypted gateway processor with deterministic Ethernet timing.

Use Value: Dual MCAN + GMAC with IEEE 1588 PTP enables synchronized multi-protocol bridging; TrustZone isolates secure TLS stack from fieldbus stacks.

Use Scenario: Battery-powered environmental monitoring node deploying AI inference on camera feed and sensor fusion data.

IC Role / Device Role / Timing Role: ATSAMA5D27B-CN executes Linux-based inference engine while managing ISC image capture, ADC sampling, and ultra-low-power wake-up scheduling.

Use Value: SleepWalking™ and ULP1 mode reduce average current to <100 µA; on-chip TRNG and AESB enable secure OTA updates without external crypto IC.

Human-Machine Interface

Medical Data Logger

Use Scenario: Touch-enabled medical display panel showing real-time vitals overlayed on video feed from ultrasound probe.

IC Role / Device Role / Timing Role: ATSAMA5D27B-CN drives 1024×768 RGB LCD with alpha blending, processes raw Bayer sensor input via ISC, and manages capacitive PTC touch overlay.

Use Value: Hardware-accelerated LCDC overlays and ISC post-processing offload CPU; 12-bit ADC reads analog front-end sensors concurrently.

Use Scenario: Portable diagnostic device recording ECG, SpO₂, and temperature with encrypted local storage and HIPAA-compliant audit logging.

IC Role / Device Role / Timing Role: ATSAMA5D27B-CN performs real-time ECG waveform analysis, stores encrypted logs to eMMC, and signs timestamps using RTC-integrated tamper detection.

Use Value: Secure boot ensures firmware integrity; tamper-detect SRAM preserves audit trail if enclosure breach is detected; AESB encrypts all stored patient data.

Equivalent & Alternatives

The following parts are listed as comparable options for similar MPU applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
NXP i.MX6ULL	Single-core Cortex-A7 @ 900 MHz; no TrustZone-enforced secure world; AES/SHA only via software or optional CAAM; no integrated tamper detection or scrambled SRAM	Lacks hardware-enforced secure boot chain and runtime memory integrity checking; requires external secure element for HIPAA/IEC 62443 compliance	Choose when cost sensitivity outweighs security certification requirements and Linux RT latency is less critical than raw throughput
STMicroelectronics STM32MP157C	Dual-core Cortex-A7 @ 800 MHz + Cortex-M4; TrustZone but no on-die tamper pins or ICM; AES-GCM/SHA-256 via CRYP peripheral; no on-the-fly DDR encryption	Supports asymmetric multiprocessing but lacks ATSAMA5D27B-CN's dedicated secure boot ROM and hardware-scrambled SRAM for anti-cloning	Prefer when co-processing with real-time M4 core is required and industrial temperature grade is not mandatory

Compared with i.MX6ULL and STM32MP157C, ATSAMA5D27B-CN uniquely combines extended industrial temperature qualification (−40°C to +105°C), hardware-scrambled tamper-detect SRAM, on-the-fly AESB DDR encryption, and ISO-conformant IEEE 1588 PTP - making it the only option among the three certified for Class B safety and suitable for unattended, physically exposed edge deployments.

Availability

ATSAMA5D27B-CN is available at Aetrix Electronics and suitable for industrial gateways, secure edge nodes, human-machine interfaces, and medical data loggers requiring stable component supply across long production lifecycles.

Supply support for ATSAMA5D27B-CN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company delivering smart, connected, and secure embedded control solutions, with leadership in microcontrollers, analog, FPGA, and security ICs.

The SAMA5D2 product line was designed specifically for Linux-capable, ultra-low-power industrial and IoT edge applications demanding hardware-enforced security, deterministic connectivity, and extended temperature reliability - with ATSAMA5D27B-CN representing the dual-CAN-FD, 105°C qualified variant in the series.

FAQ

What is the maximum operating temperature specification for ATSAMA5D27B-CN?

The ATSAMA5D27B-CN is qualified for extended industrial temperature operation from −40°C to +105°C ambient, verified per JEDEC JESD22-A104 and JESD22-A108 standards. This rating applies to the full functional specification including DDR3L interface, dual MCAN, and GMAC with AVB - making it suitable for deployment in unventilated enclosures or outdoor industrial environments where thermal margins are constrained.

Does ATSAMA5D27B-CN support secure boot from external QSPI flash?

Yes, ATSAMA5D27B-CN supports secure boot from external QSPI flash using its on-chip AESB (AES Bridge) module, which performs on-the-fly decryption of encrypted boot images. The process begins with execution from internal ROM bootloader, validates signature via SHA256/ECDSA in secure world, then decrypts and verifies QSPI-resident first-stage bootloader before loading - all without exposing decrypted code to external memory buses.

How many CAN-FD interfaces does ATSAMA5D27B-CN provide, and what is their compliance status?

ATSAMA5D27B-CN integrates two MCAN-FD controllers supporting time-triggered transmission and SRAM-based mailboxes. However, these implement the non-ISO CAN FD frame format and do not pass the ISO 16845-1:2016 conformance test. They are fully compatible with Microchip's own CAN FD ecosystem and widely used in proprietary industrial networks, but require validation against ISO 11898-1 for automotive-grade interoperability.

What power management ICs are officially recommended for ATSAMA5D27B-CN?

Microchip recommends the MCP16502AA and MCP16501A PMICs for ATSAMA5D27B-CN. Both provide pin-selectable VDDIODDR (1.2V/1.35V/1.8V) to match DDR3L/LPDDR2/LPDDR3 memory, leakage-free I²C interface for Backup mode, and dedicated rails for VDDCORE, VDDIOP, and VDDFUSE. The MCP16502AA adds a fourth buck regulator and dual LDOs, while MCP16501A offers footprint-constrained 4×4 mm QFN24 packaging.

Can ATSAMA5D27B-CN operate in low-power modes while maintaining Ethernet timestamp accuracy?

Yes, ATSAMA5D27B-CN maintains IEEE 1588 Precision Time Protocol (PTP) timestamp accuracy in Ultra-Low-Power (ULP0/ULP1) and Backup modes. Its secure RTC continues running with ±2 ppm accuracy using the 32.768 kHz crystal oscillator, and GMAC timestamp registers remain accessible via peripheral DMA - enabling time-synchronized packet capture even during 95% duty-cycled sleep cycles for battery-operated network analyzers.

ATSAMA5D27B-CN Specifications

Product attributes: Attribute value

Manufacturer:: Microchip Technology

Package/Case:: 289-LFBGA

Series:: SAMA5D2

Packaging:: Tray

Product Status:: Obsolete

Core Processor:: ARM® Cortex®-A5

Number of Cores/Bus Width:: 1 Core, 32-Bit

Speed:: 500MHz

Co-Processors/DSP:: Multimedia; NEON™ MPE

RAM Controllers:: LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI

Graphics Acceleration:: Yes

Display & Interface Controllers:: Keyboard, LCD, Touchscreen

Ethernet:: 10/100Mbps (1)

SATA:: -

USB:: USB 2.0 + HSIC

Voltage - I/O:: 3.3V

Operating Temperature:: -40°C ~ 105°C (TA)

Grade:: -

Qualification:: -

Security Features:: ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC

Mounting Type:: Surface Mount

Supplier Device Package:: 289-LFBGA (14x14)

Additional Interfaces:: I2C, SMC, SPI, UART, USART, QSPI

ATSAMA5D27B-CN FAQ

1.How can I place an order for ATSAMA5D27B-CN through Aetrix?

Please submit a Request for Quotation (RFQ) for ATSAMA5D27B-CN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ATSAMA5D27B-CN reliable?

The price and inventory of ATSAMA5D27B-CN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D27B-CN is usually 5 days.

3.What payment methods are accepted for ATSAMA5D27B-CN?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D27B-CN transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ATSAMA5D27B-CN?

ATSAMA5D27B-CN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ATSAMA5D27B-CN order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ATSAMA5D27B-CN?

For technical support, including ATSAMA5D27B-CN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D27B-CN requirements.

6.How does Aetrix verify that ATSAMA5D27B-CN is sourced from the original manufacturer or authorized distributors?

All ATSAMA5D27B-CN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D27B-CN meets industry standards.

7.What is the process for return or replacement of ATSAMA5D27B-CN?

All ATSAMA5D27B-CN units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D27B-CN, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ATSAMA5D27B-CN part is unused and in its original packaging.

Return procedure for ATSAMA5D27B-CN:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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