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Microchip Technology ATSAMA5D28A-CU
- Part No.:
- ATSAMA5D28A-CU
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 289-LFBGA
- Datasheet:
-
ATSAMA5D28A-CU.pdf
- Description:
- IC MPU SAMA5D2 500MHZ 289LFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:2,894
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Product details
Overview
ATSAMA5D28A-CU from Microchip Technology is an ultra-low-power Arm Cortex-A5-based microprocessor unit (MPU) operating at up to 500 MHz, featuring dual CAN-FD controllers, 10/100 Ethernet MAC with IEEE 1588 PTP support, LCD TFT controller (1024×768), and hardware crypto accelerators (AES-256, SHA-256, TRNG). It integrates 128 KB L2 cache configurable as SRAM, 12-channel 12-bit ADC with resistive touchscreen support, and 8 tamper detection pins - deployed in industrial HMI, secure IoT gateways, and point-of-sale terminals.
For engineers reviewing the ATSAMA5D28A-CU datasheet, ATSAMA5D28A-CU pinout, ATSAMA5D28A-CU application, or ATSAMA5D28A-CU equivalent, this page delivers verified technical context, package mapping to 289-ball LFBGA (14×14 mm, 0.8 mm pitch), confirmed low-power modes (ULP0/ULP1/Backup), real-world security features (TrustZone, on-the-fly DDR/QSPI AES encryption), and validated alternative MPUs for industrial embedded design.
Technical Context
The ATSAMA5D28A-CU implements a full Armv7-A architecture with MMU, NEON SIMD engine, and floating-point unit (FPU), enabling Linux® execution and deterministic real-time tasks. Its multilayer bus architecture supports concurrent high-bandwidth data paths via two 16-channel XDMAC controllers and dedicated peripheral DMAs.
Security is enforced through hardware-enforced TrustZone isolation, 5 KB internal scrambled SRAM (1 KB nonerasable on tamper), Integrity Check Monitor (ICM) using SHA-256, and secure boot with encrypted code execution from QSPI or DDR memory. The device supports IEEE 802.1AS timestamping, AVB traffic shaping (IEEE 802.1Qav), and CAN-FD with SRAM-based mailboxes and time-triggered transmission - though it uses the non-ISO CAN FD frame format per ISO 16845-1:2016 conformance test.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5 @ up to 500 MHz with NEON, FPU, and TrustZone-enabled memory/peripheral isolation |
| Memory Interface | 32-bit DDR2/DDR3L/LPDDR2/LPDDR3 controller supporting up to 512 MB with on-the-fly AES encryption/decryption |
| Security Acceleration | Dedicated AES-128/192/256, SHA-1/224/256/384/512, TDES, and NIST SP800-22-compliant TRNG |
| Connectivity Peripherals | Dual MCAN-FD controllers, 10/100 GMAC with IEEE 1588 PTP and AVB support, USB 2.0 HS Device + 2× Host (or HSIC) |
| User Interface | LCD TFT controller (24-bit RGB, 1024×768), ISC image sensor interface (5 MPixel), 8×8 capacitive touch (PTC), stereo Class D amplifier |
| Low-Power Operation | Three software-selectable modes: Idle, Ultra-Low-Power (ULP0/ULP1), and Backup with DDR self-refresh; wake-up from 9 pins, UART, or analog comparator |
| Package & I/O | 289-ball LFBGA (14×14 mm, 0.8 mm pitch); 128 fully multiplexed I/Os with up to 8 peripheral functions per pin |
Pinout & Package
ATSAMA5D28A-CU is housed in a 289-ball Low-Profile Fine-Pitch Ball Grid Array (LFBGA) package measuring 14 mm × 14 mm with 0.8 mm ball pitch and 1.4 mm thickness. This package supports industrial temperature range operation (–40°C to +105°C) and provides 128 user-configurable I/Os across four parallel I/O banks (PA–PD).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PA0–PA31, PB0–PB31, PC0–PC31, PD0–PD31 | Parallel I/O Controller Banks | 128 total I/O lines; each supports up to 8 peripheral functions (e.g., UART, SPI, PWM) or GPIO; synchronous 32-bit output capability |
| DDR_D[31:0], DDR_A[13:0], DDR_BA[2:0], DDR_CK/CLKN | DDR3L/LPDDR2/LPDDR3 Memory Interface | 32-bit data bus, 14-bit address, 3-bit bank select, differential clock - enables high-bandwidth external memory access with scrambling and ECC |
| CANRX0/CANTX0, CANRX1/CANTX1 | Controller Area Network Channels | Dual independent CAN-FD interfaces with SRAM-based mailboxes and time/event-triggered transmission (non-ISO frame format) |
| GTX0–GTX3, GRX0–GRX3, GMDC/GMDIO | 10/100 Ethernet MAC Physical Interface | 4-bit transmit/receive data lanes plus MII management interface; supports IEEE 1588 timestamping and AVB credit-based shaping |
| LCDDAT[23:0], LCDHSYNC, LCDVSYNC, LCDPCK | LCD TFT Controller Output | 24-bit parallel RGB interface driving up to 1024×768 resolution with hardware overlays, alpha blending, and rotation |
| ISC_D[0:11], ISC_HSYNC, ISC_VSYNC, ISC_PCK | Image Sensor Controller Input | 12-bit parallel interface supporting Raw Bayer, YCbCr, monochrome, and JPEG-compressed sensors up to 5 MPixel |
Key Features
| Feature | Design Value |
|---|---|
| Secure Boot & Runtime Protection | Scrambled 64-KB ROM bootloader with fuse-protected JTAG disable; TrustZone-enforced memory partitioning and SAIC interrupt isolation |
| Hardware Cryptographic Offload | AESB engine enabling real-time encryption/decryption of DDR and QSPI memory contents without CPU overhead |
| Ultra-Low-Power Backup Mode | RTC + wake logic active with 5 KB SRAM retained; DDR placed in self-refresh while maintaining system state for sub-100 µA standby |
| Event-Driven Peripheral Operation | Event System allows peripherals (e.g., ADC, timers, USART) to trigger actions and communicate directly without CPU intervention in Active/Idle modes |
| Industrial-Grade Safety Monitoring | Integrated crystal failure detector, POR cells, write-protected registers, and ICM-based SHA-256 memory integrity verification per IEC 60730 Class B |
Applications
| Industrial HMI Terminal | Secure IoT Gateway |
|---|---|
Use Scenario: Ruggedized factory-floor display with capacitive touch, camera-based quality inspection, and local edge analytics. IC Role / Device Role / Timing Role: ATSAMA5D28A-CU serves as main application processor running Linux, managing LCD TFT, ISC image capture, PTC touch, and dual CAN-FD fieldbus communication. Use Value: On-chip TrustZone isolates UI stack from secure firmware; hardware AES encrypts captured images before storage; ULP mode extends battery life during idle periods. |
Use Scenario: Cellular-connected gateway aggregating data from Modbus RTU, CAN, and BLE sensors in smart building infrastructure. IC Role / Device Role / Timing Role: ATSAMA5D28A-CU acts as secure edge node with dual CAN-FD for fieldbus bridging, GMAC for wired LAN, and USB host for cellular modem attachment. Use Value: IEEE 1588 PTP enables synchronized sensor timestamping; ICM validates firmware integrity on boot; tamper pins detect physical intrusion attempts on enclosure. |
| Point-of-Sale (POS) Terminal | Medical Data Logger |
Use Scenario: PCI-compliant payment terminal with EMV contactless reader, thermal printer, and biometric fingerprint sensor. IC Role / Device Role / Timing Role: ATSAMA5D28A-CU executes certified secure payment stack, manages USB device interface for card readers, and controls PWM-driven thermal print head. Use Value: Secure bootloader and 5 KB tamper-erased SRAM protect cryptographic keys; AES-256 encrypts transaction logs in e.MMC; FLEXCOMs handle multiple serial peripherals simultaneously. |
Use Scenario: Battery-powered wearable diagnostic logger capturing ECG, temperature, and motion data with local anomaly detection. IC Role / Device Role / Timing Role: ATSAMA5D28A-CU functions as low-power data concentrator with 12-bit ADC for analog biosignals, RTC for precise timestamping, and SDMMC for encrypted log storage. Use Value: Backup mode retains RTC and 5 KB SRAM while DDR enters self-refresh - enabling weeks of standby on coin cell; TRNG seeds secure session keys for Bluetooth LE pairing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D27A-CU | 256-ball TFBGA (8×8 mm); 105 I/Os; single CAN-FD; no environmental monitors or die shield | Suitable for space-constrained designs where dual CAN-FD and extended tamper protection are not required | Select when footprint reduction and lower I/O count are prioritized over industrial-grade tamper resilience and dual-fieldbus support |
| i.MX6ULL | Arm Cortex-A7 @ 900 MHz; single Ethernet; no TrustZone hardware partitioning; no integrated tamper pins or ICM | Targeted at cost-sensitive Linux applications lacking stringent security or safety certification requirements | Choose only if AES acceleration, SHA-256 memory integrity checking, and IEC 60730 Class B compliance are not mandatory |
Compared with ATSAMA5D28A-CU, ATSAMA5D27A-CU reduces package size and I/O count but removes one CAN-FD channel and tamper monitoring capability, while i.MX6ULL offers higher CPU frequency but lacks hardware-enforced security primitives essential for certified secure deployments.
Availability
ATSAMA5D28A-CU is available at Aetrix Electronics and suitable for industrial HMI, secure IoT gateways, and medical data loggers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for safety-critical production programs.
Supply support for ATSAMA5D28A-CU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company delivering microcontrollers, analog components, and Flash-IP solutions with emphasis on reliability, security, and longevity for industrial and automotive markets.
The SAMA5D2 product line was engineered specifically for secure, ultra-low-power Linux-capable embedded applications demanding hardware-rooted trust, real-time connectivity, and extended temperature operation - targeting POS, industrial control, and edge AI endpoints.
FAQ
What is the maximum operating frequency of the ATSAMA5D28A-CU?
The ATSAMA5D28A-CU operates at up to 500 MHz on its Arm Cortex-A5 core. This frequency is sustained under typical thermal conditions with appropriate power delivery and cooling. The device also includes a 128-KB L2 cache configurable as SRAM and a 128-KB internal scrambled SRAM, both accessible at full core speed. The ATSAMA5D28A-CU datasheet specifies this rating for industrial temperature range (–40°C to +105°C) operation.
Does the ATSAMA5D28A-CU support IEEE 1588 Precision Time Protocol?
Yes, the ATSAMA5D28A-CU integrates full IEEE 1588 Precision Time Protocol (PTP) support within its 10/100 Ethernet MAC (GMAC). Hardware timestamping is applied to both transmit and receive frames at the PHY interface level, enabling sub-microsecond synchronization accuracy in time-sensitive networking applications. This capability is documented in the ATSAMA5D28A-CU datasheet section on GMAC features and is validated in Microchip's Linux BSP timing examples.
How many tamper detection pins does the ATSAMA5D28A-CU provide?
The ATSAMA5D28A-CU provides eight dedicated tamper detection pins (PIOBU0–PIOBU7), supporting both static and dynamic intrusion detection. Upon tamper event, 1 KB of internal SRAM is nonerasably preserved while 4 KB is erased - a feature confirmed in the ATSAMA5D28A-CU security architecture documentation and used in certified POS and secure gateway implementations.
What package type is used for the ATSAMA5D28A-CU?
The ATSAMA5D28A-CU is supplied exclusively in a 289-ball Low-Profile Fine-Pitch Ball Grid Array (LFBGA) package measuring 14 mm × 14 mm with 0.8 mm ball pitch and 1.4 mm thickness. This package is qualified for extended industrial temperature operation (–40°C to +105°C) and supports 128 user I/Os across four parallel banks (PA–PD), as specified in the official ATSAMA5D28A-CU datasheet package drawing DS60001476H.
Is the CAN interface on the ATSAMA5D28A-CU compliant with ISO 16845-1:2016?
No, the ATSAMA5D28A-CU implements MCAN controllers using the non-ISO CAN FD frame format and therefore does not pass the CAN FD Conformance Test per ISO 16845-1:2016. This limitation is explicitly stated in the ATSAMA5D28A-CU datasheet warning note and applies to both CAN0 and CAN1 channels. Designers requiring ISO-compliant CAN FD must implement external transceivers or select alternative MPUs with ISO-certified controllers.
ATSAMA5D28A-CU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 289-LFBGA
- Series:
- SAMA5D2
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 500MHz
- Co-Processors/DSP:
- Multimedia; NEON™ MPE
- RAM Controllers:
- LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keyboard, LCD, Touchscreen
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 + HSIC
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 289-LFBGA (14x14)
- Additional Interfaces:
- I2C, SMC, SPI, UART, USART, QSPI
ATSAMA5D28A-CU FAQ
1.How can I place an order for ATSAMA5D28A-CU through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D28A-CU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D28A-CU reliable?
The price and inventory of ATSAMA5D28A-CU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D28A-CU is usually 5 days.
3.What payment methods are accepted for ATSAMA5D28A-CU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D28A-CU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D28A-CU?
ATSAMA5D28A-CU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D28A-CU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D28A-CU?
For technical support, including ATSAMA5D28A-CU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D28A-CU requirements.
6.How does Aetrix verify that ATSAMA5D28A-CU is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D28A-CU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D28A-CU meets industry standards.
7.What is the process for return or replacement of ATSAMA5D28A-CU?
All ATSAMA5D28A-CU units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D28A-CU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D28A-CU part is unused and in its original packaging.
Return procedure for ATSAMA5D28A-CU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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