Microchip Technology ATSAMA5D28C-D1G-CUR

Overview

ATSAMA5D28C-D1G-CUR from Microchip Technology is a high-performance, ultra-low-power Arm® Cortex®-A5 microprocessor (MPU) operating up to 500 MHz, integrating 128 KB L2 cache configurable as SRAM, 128 KB scrambled internal SRAM, and hardware crypto accelerators for AES-256, SHA-256, and TRNG. It supports DDR3L/LPDDR2/LPDDR3 memory, dual QSPI, two CAN-FD controllers, and a 12-channel 12-bit ADC with resistive touchscreen capability - deployed in industrial HMI, secure IoT gateways, and point-of-sale terminals.

For engineers reviewing the ATSAMA5D28C-D1G-CUR datasheet, ATSAMA5D28C-D1G-CUR pinout, ATSAMA5D28C-D1G-CUR application, or ATSAMA5D28C-D1G-CUR equivalent, key selection considerations include its 289-ball TFBGA package, TrustZone-enabled secure boot, dual CAN-FD with SRAM-based mailboxes, extended industrial temperature rating (–40°C to +105°C), and support for Linux® with bare-metal C examples.

Technical Context

The ATSAMA5D28C-D1G-CUR implements an Armv7-A architecture with NEON SIMD engine and VFPv4 floating-point unit, enabling real-time multimedia processing and high-precision computation. Its multilayer bus architecture integrates two 16-channel DMA controllers and dedicated peripheral DMAs to sustain concurrent high-bandwidth transfers across GMAC, USB, QSPI, and SDMMC without CPU intervention.

Security is enforced via Arm TrustZone®, on-the-fly AESB encryption/decryption for DDR and QSPI, 5 KB tamper-responsive scrambled SRAM (1 KB nonerasable), eight PIOBU tamper pins, and Integrity Check Monitor (ICM) using SHA-256. Power management includes three software-selectable low-power modes: Idle, Ultra-Low-Power (ULP0/ULP1), and Backup with DDR self-refresh.

Key Specifications

Pinout & Package

ATSAMA5D28C-D1G-CUR uses a 289-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package measuring 9 mm × 9 mm with 0.5 mm ball pitch and 1.2 mm thickness. The package supports 128 fully multiplexed I/O lines, each configurable for up to eight peripheral functions or general-purpose use.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar embedded MPU applications.

Compared with ATSAMA5D28C-D1G-CUR, the ATSAMA5D27C-D1G-CUR reduces package size and peripheral count while maintaining identical security architecture and crypto engines; i.MX6ULL offers higher CPU clock but lacks TrustZone, tamper resilience, and hardware-accelerated memory encryption - making it unsuitable for PCI PTS or IEC 62443-certified deployments.

Availability

ATSAMA5D28C-D1G-CUR is available at Aetrix Electronics and suitable for industrial HMI, secure IoT gateways, and point-of-sale terminals requiring stable component supply, long lifecycle assurance, and traceable sourcing for safety-critical deployments.

Supply support for ATSAMA5D28C-D1G-CUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company specializing in microcontrollers, analog, FPGA, and security solutions, with a focus on industrial, automotive, and aerospace applications.

The SAMA5D2 series is designed as a secure, ultra-low-power Arm Cortex-A5 MPU family targeting industrial automation, IoT edge nodes, and trusted computing platforms requiring hardware-enforced security and extended temperature operation.

FAQ

What is the maximum operating frequency of the ATSAMA5D28C-D1G-CUR?

The ATSAMA5D28C-D1G-CUR operates at up to 500 MHz on its Arm Cortex-A5 core. This frequency is sustained under typical conditions with appropriate thermal design and power delivery. The device also includes a 600–1200 MHz system PLL and a dedicated 480 MHz USB PLL to support high-speed peripheral operation without compromising CPU performance. ATSAMA5D28C-D1G-CUR maintains this speed across its full –40°C to +105°C industrial temperature range when used with compatible DDR3L or LPDDR3 memory.

Does the ATSAMA5D28C-D1G-CUR support CAN FD, and what are its limitations?

Yes, the ATSAMA5D28C-D1G-CUR integrates two MCAN controllers supporting CAN FD with SRAM-based mailboxes and time/event-triggered transmission. However, it implements the non-ISO CAN FD frame format and does not pass the ISO 16845-1:2016 conformance test. ATSAMA5D28C-D1G-CUR is suitable for proprietary or vendor-specific CAN FD networks but not for systems requiring strict ISO FD compliance. Each controller supports up to 32 mailboxes and operates independently with dedicated DMA channels.

What security features are unique to the ATSAMA5D28C-D1G-CUR compared to other Cortex-A5 MPUs?

The ATSAMA5D28C-D1G-CUR uniquely combines Arm TrustZone with on-the-fly AESB encryption for DDR and QSPI, 5 KB tamper-responsive SRAM (1 KB nonerasable), eight dedicated PIOBU tamper pins, and SHA-256-based Integrity Check Monitor (ICM). Unlike generic Cortex-A5 implementations, ATSAMA5D28C-D1G-CUR embeds these features in silicon with no software dependency - enabling certified secure boot, runtime memory integrity verification, and physical intrusion response without external security chips.

Which memory types does the ATSAMA5D28C-D1G-CUR support, and how is memory security implemented?

The ATSAMA5D28C-D1G-CUR supports DDR2, DDR3L, LPDDR1, LPDDR2, and LPDDR3 up to 512 MB via its 32-bit multiport DDR controller. Memory security is implemented through hardware AESB encryption/decryption engines that operate transparently during every read/write cycle - protecting data at rest without CPU overhead. Additionally, the 128 KB internal SRAM and 160 KB ROM are scrambled, and the ICM continuously verifies memory content integrity using SHA-256 hashing.

Is the ATSAMA5D28C-D1G-CUR pin-compatible with other SAMA5D2 variants?

No, the ATSAMA5D28C-D1G-CUR is not pin-compatible with other SAMA5D2 variants due to its 289-ball TFBGA package (9×9 mm, 0.5 mm pitch), whereas SAMA5D21/22/23 use 196-ball TFBGA and SAMA5D24/26/27 use 256/289-ball LFBGA packages with different pinouts and ball maps. Pin compatibility must be verified per device using Microchip's official "Pin Compatibility" documentation - ATSAMA5D28C-D1G-CUR requires its own dedicated layout and cannot be substituted without PCB revision.