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Microchip Technology ATSAMA5D28C-LD1G-CUR
- Part No.:
- ATSAMA5D28C-LD1G-CUR
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 289-LFBGA
- Datasheet:
-
ATSAMA5D28C-LD1G-CUR.pdf
- Description:
- IC MPU SAMA5D2 500MHZ 289LFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:1,000
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Product details
Overview
ATSAMA5D28C-LD1G-CUR from Microchip Technology is a System-in-Package (SiP) MPU integrating an Arm® Cortex®-A5 core (up to 500 MHz), TrustZone®, NEON™, and 2 Gbit LPDDR2-SDRAM in a single TFBGA361 package. It delivers secure, low-power Linux-capable processing for industrial HMI, edge gateways, and embedded vision systems with integrated ISC, GMAC, and dual CAN-FD controllers.
For engineers reviewing the ATSAMA5D28C-LD1G-CUR datasheet, ATSAMA5D28C-LD1G-CUR pinout, ATSAMA5D28C-LD1G-CUR application, or ATSAMA5D28C-LD1G-CUR equivalent, key selection criteria include LPDDR2 memory integration, 128 GPIOs with flexible peripheral multiplexing, hardware crypto acceleration (AES/SHA/TRNG), tamper detection support, and industrial temperature range (–40°C to +85°C).
Technical Context
The ATSAMA5D28C-LD1G-CUR implements a dual-bus DDR controller architecture: a 32-bit scramblable multiport LPDDR2-SDRAM controller supporting up to 2 Gbit at 1.2 V core / 1.8 V I/O, with PASR, ATCSR, and Deep Power-Down modes; and a separate 16-bit DDR2-SDRAM interface (not populated in this variant). Its memory subsystem includes 128 KB L2 cache configurable as SRAM, 128 KB internal scrambled SRAM, and 160 KB ROM with secure bootloader.
Security is enforced via Arm TrustZone®, hardware-accelerated AES-256/SHA-512/TRNG, 5 KB tamper-responsive SRAM (1 KB non-erasable), eight tamper pins, and Integrity Check Monitor (ICM). The device supports IEEE 1588 PTP, AVB, and IEEE 802.3az for deterministic networking, alongside dual MCAN controllers compliant with non-ISO CAN FD frame format.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5 @ up to 500 MHz, ARMv7-A, TrustZone, NEON, ETM/ETB |
| Integrated Memory | 2 Gbit LPDDR2-SDRAM (8 Mwords × 8 Banks × 32 bits), HSUL_12 interface |
| Package | TFBGA361, 0.8 mm pitch, 16 mm × 16 mm footprint |
| GPIO Count | Up to 128 fully programmable I/Os with 8-function multiplexing per pin |
| Crypto Acceleration | AES-256/192/128, SHA-1/224/256/384/512, TDES, TRNG compliant with NIST SP 800-22 |
| Networking | 1× 10/100 Ethernet MAC (GMAC) with IEEE 1588 PTP, AVB, and 802.3az support |
| Peripherals | 2× MCAN (non-ISO CAN FD), 1× ISC (5 MPixel), 1× LCD TFT (1024×768), 5× FLEXCOMs, 12-bit ADC (12 ch) |
Pinout & Package
ATSAMA5D28C-LD1G-CUR is housed in a 361-ball TFBGA package (0.8 mm pitch, 16 mm × 16 mm) with ballout identical to other SAMA5D28 LPDDR2 variants per DS60001484D Table 6-2. Power rails include DDRM_VDD18 (1.7–1.9 V), DDRM_VDD12 (1.14–1.3 V), VDDIOP0/VDDIOP1 (1.8 V), and VDDSDMMC (1.8 V).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D1 | LPDDR2 Data Bus Bit 1 | Bi-directional data line referenced to DQS/DQSN; supports 8-bit burst transfers at up to 533 MT/s |
| DQS1/DQSN1 | LPDDR2 Differential Data Strobe Pair | Edge-aligned with read data, center-aligned with write data; DLL-synchronized to CLK/CLKN |
| CLK/CLKN | LPDDR2 Differential Clock Input | Reference clock for all command/data timing; requires matched trace length and termination |
| CKE | LPDDR2 Clock Enable | Active-high signal controlling entry/exit from power-down and self-refresh modes |
| CS | LPDDR2 Chip Select | Activates command decoding; asserted for all commands except auto-refresh and self-refresh |
Key Features
| Feature | Design Value |
|---|---|
| LPDDR2 Integration | 2 Gbit on-package memory eliminates external routing, reduces PCB layers, and improves EMI robustness |
| Secure Boot & Runtime | Scrambled ROM bootloader, AESB on-the-fly encryption/decryption of LPDDR2, and tamper-triggered SRAM wipe |
| Low-Power Operation | Ultra-low-power mode with fast wake-up, extended backup with LPDDR2 in self-refresh, and SleepWalking™ peripherals |
| Dual MCAN Controllers | SRAM-based mailboxes, time/event-triggered transmission, and non-ISO CAN FD frame support for deterministic fieldbus |
| Industrial Imaging Interface | ITU-R BT.601/656/1120-compliant ISC supporting Raw Bayer, YCbCr, JPEG, and monochrome sensors up to 5 MP |
Applications
| Industrial HMI | Edge Gateway |
|---|---|
Use Scenario: Touch-enabled factory operator panel with real-time diagnostics and local web server. IC Role / Device Role / Timing Role: Main application processor running Linux with Qt-based UI, managing PTC capacitive touch, LCD TFT, and GMAC for local network access. Use Value: Integrated 2 Gbit LPDDR2 enables full Linux boot without external memory layout complexity; 128 GPIOs support custom I/O expansion for PLC interfacing. | Use Scenario: Protocol-agnostic field gateway aggregating Modbus, CAN, and sensor data for cloud upload. IC Role / Device Role / Timing Role: Central protocol translation engine with dual MCAN, GMAC, USB host, and SDMMC for local storage and firmware updates. Use Value: Hardware crypto acceleration secures OTA updates; IEEE 1588 PTP ensures synchronized timestamping across distributed field nodes. |
| Embedded Vision | Secure IoT Node |
Use Scenario: Low-power machine vision camera for quality inspection in food processing lines. IC Role / Device Role / Timing Role: Image acquisition and preprocessing unit using ISC, 12-bit ADC for analog sensor fusion, and PWM for lighting control. Use Value: On-die ISC eliminates external image processor; LPDDR2 bandwidth supports real-time Bayer-to-YUV conversion and edge inference. | Use Scenario: Tamper-evident remote monitoring node for critical infrastructure with environmental sensing. IC Role / Device Role / Timing Role: Secure runtime environment with eight tamper pins, temperature/voltage monitors, and encrypted LPDDR2 storage. Use Value: 5 KB tamper-responsive SRAM stores keys; TRNG and SHA-512 enable FIPS-compliant attestation and secure boot chain verification. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D27C-LD2G-CUR | Same SAMA5D28 silicon revision but with 2 Gbit LPDDR2 in TFBGA361; differs only in chip ID (0x00000062 vs 0x00000072) and minor qualification status | Identical memory, peripheral, and security feature set; validated for same industrial temperature range and Linux use cases | Select when requiring Microchip's latest production revision with identical functional and electrical behavior |
| ATSAMA5D28C-D1G-CUR | Same package and core, but integrates 1 Gbit DDR2-SDRAM instead of LPDDR2; different power rail requirements (1.8 V DDRM_VDD vs 1.2/1.8 V LPDDR2) | Better suited for cost-sensitive designs where DDR2 compatibility and lower memory bandwidth suffice; lacks LPDDR2-specific features like PASR and ATCSR | Choose for legacy DDR2 ecosystem compatibility or where LPDDR2 power savings are not required |
Compared with ATSAMA5D27C-LD2G-CUR, ATSAMA5D28C-LD1G-CUR offers identical LPDDR2 integration and security features but reflects a distinct chip ID and qualification path; versus ATSAMA5D28C-D1G-CUR, it trades DDR2 simplicity for LPDDR2's lower power, higher density, and advanced self-refresh capabilities essential for battery-backed or thermally constrained deployments.
Availability
ATSAMA5D28C-LD1G-CUR is available at Aetrix Electronics and suitable for industrial HMI, edge gateway, and embedded vision applications requiring stable component supply, long-term lifecycle support, and qualified automotive/industrial-grade silicon.
Supply support for ATSAMA5D28C-LD1G-CUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog, FPGA, and connectivity solutions, with a focus on reliability, security, and longevity for industrial, automotive, and aerospace markets.
The SAMA5D2 product line delivers high-performance, ultra-low-power Arm-based MPUs with integrated memory and hardware security-designed specifically for Linux-capable edge devices demanding robust real-time I/O, deterministic networking, and tamper resistance.
FAQ
What is the memory configuration of the ATSAMA5D28C-LD1G-CUR?
The ATSAMA5D28C-LD1G-CUR integrates 2 Gbit LPDDR2-SDRAM (8 Mwords × 8 Banks × 32 bits) in a single SiP with the Arm Cortex-A5 MPU. It does not include DDR2-SDRAM. The LPDDR2 operates at 1.14–1.3 V (VDD12) and 1.7–1.9 V (VDD18), supports Partial Array Self-Refresh (PASR), Auto Temperature Compensated Self-Refresh (ATCSR), and Deep Power-Down mode-all accessible via the dedicated 32-bit multiport DDR controller in the ATSAMA5D28C-LD1G-CUR.
Does the ATSAMA5D28C-LD1G-CUR support CAN FD, and what is its compliance status?
Yes, the ATSAMA5D28C-LD1G-CUR includes two MCAN controllers supporting non-ISO CAN FD frame format. As stated in the official datasheet, MCAN "does not pass the CAN FD Conformance Test according to ISO 16845-1:2016." It is intended for proprietary or non-ISO FD implementations requiring high-speed, time-triggered messaging-not for automotive ECUs requiring ISO-certified CAN FD interoperability. The ATSAMA5D28C-LD1G-CUR implements SRAM-based mailboxes and event-triggered transmission.
What security features are implemented in hardware on the ATSAMA5D28C-LD1G-CUR?
The ATSAMA5D28C-LD1G-CUR includes TrustZone-enabled secure world isolation, on-the-fly AES-256 encryption/decryption of LPDDR2 and QSPI memory (AESB), SHA-1/224/256/384/512 acceleration, TDES, and NIST SP 800-22-compliant TRNG. It also provides 5 KB of tamper-responsive SRAM (1 KB non-erasable), eight dedicated tamper pins, Integrity Check Monitor (ICM), write-protected registers, and a secure bootloader in masked ROM-all verified and documented for the ATSAMA5D28C-LD1G-CUR in DS60001484D.
What is the operating temperature range and packaging for the ATSAMA5D28C-LD1G-CUR?
The ATSAMA5D28C-LD1G-CUR is rated for industrial operation from –40°C to +85°C ambient temperature. It is supplied in a 361-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package with 0.8 mm ball pitch and 16 mm × 16 mm body size. This package matches the ballout defined for 1 Gbit/2 Gbit LPDDR2 variants in Microchip's DS60001484D datasheet and is distinct from DDR2-equipped SAMA5D2 SIP packages.
How many GPIOs does the ATSAMA5D28C-LD1G-CUR support, and how are they configured?
The ATSAMA5D28C-LD1G-CUR supports up to 128 general-purpose I/Os, each configurable via set/clear registers. Each pin supports up to eight peripheral functions (e.g., UART, SPI, PWM, CAN) or general-purpose use. The PIO controller allows synchronous 32-bit output writes, pull-up/pull-down control, and programmable drive strength. All 128 GPIOs are accessible in the TFBGA361 package and validated in the ATSAMA5D28C-LD1G-CUR's pinout documentation.
ATSAMA5D28C-LD1G-CUR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 289-LFBGA
- Series:
- SAMA5D2
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 500MHz
- Co-Processors/DSP:
- Multimedia; NEON™ MPE
- RAM Controllers:
- LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- Keyboard, LCD, Touchscreen
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 + HSIC
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 289-LFBGA (14x14)
- Additional Interfaces:
- I2C, SMC, SPI, UART, USART, QSPI
ATSAMA5D28C-LD1G-CUR FAQ
1.How can I place an order for ATSAMA5D28C-LD1G-CUR through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D28C-LD1G-CUR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D28C-LD1G-CUR reliable?
The price and inventory of ATSAMA5D28C-LD1G-CUR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D28C-LD1G-CUR is usually 5 days.
3.What payment methods are accepted for ATSAMA5D28C-LD1G-CUR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D28C-LD1G-CUR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D28C-LD1G-CUR?
ATSAMA5D28C-LD1G-CUR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D28C-LD1G-CUR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D28C-LD1G-CUR?
For technical support, including ATSAMA5D28C-LD1G-CUR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D28C-LD1G-CUR requirements.
6.How does Aetrix verify that ATSAMA5D28C-LD1G-CUR is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D28C-LD1G-CUR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D28C-LD1G-CUR meets industry standards.
7.What is the process for return or replacement of ATSAMA5D28C-LD1G-CUR?
All ATSAMA5D28C-LD1G-CUR units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D28C-LD1G-CUR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D28C-LD1G-CUR part is unused and in its original packaging.
Return procedure for ATSAMA5D28C-LD1G-CUR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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