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Home > Products > Integrated Circuits (ICs) > Embedded > Microprocessors

Microchip Technology ATSAMA5D28C-LD2G-CUR

Name: ATSAMA5D28C-LD2G-CUR
Brand: Microchip Technology
SKU: ATSAMA5D28C-LD2G-CUR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ATSAMA5D28C-LD2G-CUR

Manufacturer:: Microchip Technology

Category:: Microprocessors

Package:: 289-LFBGA

Datasheet:: ATSAMA5D28C-LD2G-CUR.pdf

Description:: IC MPU SAMA5D2 500MHZ 289LFBGA

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Product details

Overview

ATSAMA5D28C-LD2G-CUR from Microchip Technology is a System-in-Package (SiP) MPU integrating an Arm® Cortex®-A5 core (up to 500 MHz), TrustZone® security, and 2 Gbit LPDDR2-SDRAM in a single 361-ball TFBGA package. It delivers high-bandwidth memory access via a 32-bit DDR controller with on-the-fly AES encryption/decryption, supports Linux® OS deployments, and targets secure industrial HMI and edge gateway applications.

For engineers reviewing the ATSAMA5D28C-LD2G-CUR datasheet, ATSAMA5D28C-LD2G-CUR pinout, ATSAMA5D28C-LD2G-CUR application, or ATSAMA5D28C-LD2G-CUR equivalent, key selection criteria include LPDDR2-SDRAM capacity (2 Gbit), 128 GPIOs with 8 peripheral multiplexing per pin, integrated hardware crypto engines (AES-256, SHA-512, TRNG), and tamper detection with 8 dedicated pins.

Technical Context

The ATSAMA5D28C-LD2G-CUR implements a dual-bus memory architecture: a 32-bit LPDDR2-SDRAM interface compliant with JEDEC LPDDR2-S4B, supporting 1.7–1.9 V DDRM_VDD18 and 1.14–1.3 V DDRM_VDD12 supplies, with Read Latency = 3 and Write Latency = 1. Its internal memory subsystem includes 128 KB L2 cache configurable as SRAM, 128 KB scrambled internal SRAM, and 160 KB ROM with secure bootloader.

Security is enforced at silicon level via Arm TrustZone®, Integrity Check Monitor (SHA256), 5 KB tamper-responsive SRAM (1 KB non-erasable), 8 tamper pins, and on-the-fly AESB encryption for LPDDR2 and QSPI memories. The device operates across -40°C to +85°C and supports ultra-low-power modes including Backup mode with 5 KB SRAM retention and SleepWalking™.

Key Specifications

Parameter	Value and Actual Design Meaning
CPU Core	Arm Cortex-A5, ARMv7-A, up to 500 MHz - enables Linux-capable real-time processing with NEON media acceleration.
Integrated Memory	2 Gbit LPDDR2-SDRAM - eliminates external memory routing, reduces PCB layers, and supports full Linux distributions.
Memory Interface	32-bit LPDDR2 controller with HSUL_12 I/O standard - ensures JEDEC-compliant low-power, high-bandwidth access to embedded DRAM.
Security Features	AES-256 on-the-fly encryption/decryption, SHA-512, TRNG, 8 tamper pins - provides hardware-rooted protection for firmware and data-in-use.
I/O Count & Flexibility	128 GPIOs, up to 8 peripheral functions per pin - simplifies board layout and enables dynamic peripheral reconfiguration without hardware change.
Package	361-ball TFBGA, 0.8 mm pitch, 16 × 16 mm - matches LPDDR2 density requirements while maintaining manufacturable BGA assembly.
Operating Temp	-40°C to +85°C - qualified for industrial and extended-temperature embedded deployments without derating.

Pinout & Package

ATSAMA5D28C-LD2G-CUR is housed in a 361-ball Thin Fine-Pitch Ball Grid Array (TFBGA) package with 0.8 mm ball pitch and 16 mm × 16 mm body size. Power delivery includes dedicated rails for VDDIOP0/VDDIOP1 (1.8 V I/O), DDRM_VDD18 (1.7–1.9 V), DDRM_VDD12 (1.14–1.3 V), and VDDSDMMC (1.8 V).

Pin/Terminal	Circuit Role	Design Meaning
VDDIOP0 / VDDIOP1	Core I/O Supply	Provides 1.8 V power to 128 GPIO banks; split-rail design isolates noise-sensitive peripherals.
DDRM_VDD18 / DDRM_VDD12	LPDDR2 Memory Supply	Separate 1.8 V and 1.2 V domains enable JEDEC LPDDR2-S4B compliance and low-power self-refresh operation.
CLK / CLKN	Differential Clock Input	Accepts differential LPDDR2 system clock (e.g., 200–533 MHz) for precise timing alignment with DQS strobes.
DQS / DQSN	Differential Data Strobe	Edge-aligned with read data and center-aligned with write data - critical for timing closure in high-speed LPDDR2 interface.
DM[7:0]	Data Mask	Enables byte-level write masking for LPDDR2 - essential for efficient partial writes and cache line updates.

Key Features

Feature	Design Value
Integrated LPDDR2-SDRAM (2 Gbit)	Reduces PCB area by >30% vs discrete MPU+DRAM solutions and eliminates SDRAM signal integrity challenges (stub length, termination, skew).
On-the-fly AESB Encryption	Secures all LPDDR2 and QSPI memory accesses in real time without software overhead or performance penalty.
8 Tamper Detection Pins	Supports both static (voltage/current monitoring) and dynamic (glitch/timing analysis) intrusion detection per Microchip SAMA5D28 environmental monitor spec.
128 GPIOs with 8x Multiplexing	Allows runtime reassignment of pins between UART, SPI, I2C, CAN-FD, PWM, ADC, or capacitive touch - maximizes reuse across product variants.
Linux-Optimized Peripherals	Includes GMAC with IEEE 1588 PTP, dual SDMMC hosts (eMMC 4.51 + SD 3.0), ISC image sensor interface, and LCD TFT controller - accelerates embedded Linux BSP development.

Applications

Industrial HMI	Secure Edge Gateway
Use Scenario: Touch-enabled factory floor display with real-time PLC data visualization and local firmware update capability. IC Role / Device Role / Timing Role: Main application processor running Linux with integrated 2 Gbit LPDDR2 for UI rendering, graphics overlay, and secure OTA update staging. Use Value: Eliminates external DRAM routing complexity and enables AES-encrypted firmware storage directly in LPDDR2, meeting IEC 62443-3-3 SL2 requirements.	Use Scenario: Protocol-agnostic industrial gateway aggregating Modbus, CAN-FD, and Ethernet AVB traffic for cloud telemetry. IC Role / Device Role / Timing Role: Secure network hub with dual GMAC ports, two MCAN controllers, and hardware-accelerated TLS via crypto engines. Use Value: On-chip 2 Gbit LPDDR2 buffers multi-protocol traffic bursts; AESB encryption secures data-in-flight and data-at-rest without host CPU involvement.
Medical Imaging Terminal	Smart Energy Meter Hub
Use Scenario: Portable ultrasound preview station capturing raw sensor data via ISC and displaying processed images on RGB LCD. IC Role / Device Role / Timing Role: Image acquisition and display SoC with 12-bit ADC, ISC supporting 5 MP sensors, and 24-bit RGB LCD controller. Use Value: Integrated LPDDR2 provides low-latency frame buffering; TrustZone isolates diagnostic processing from UI stack, satisfying FDA cybersecurity guidance.	Use Scenario: Utility-grade meter aggregation node performing time-synchronized voltage/current sampling and encrypted grid event logging. IC Role / Device Role / Timing Role: Time-critical measurement engine using RTC with IEEE 1588 PTP timestamping and secure log storage in scrambled SRAM + LPDDR2. Use Value: Hardware RTC calibration and ATCSR-enabled LPDDR2 self-refresh maintain accuracy during brownouts; tamper pins detect physical enclosure breaches.

Industrial HMI

Secure Edge Gateway

Use Scenario: Touch-enabled factory floor display with real-time PLC data visualization and local firmware update capability.

IC Role / Device Role / Timing Role: Main application processor running Linux with integrated 2 Gbit LPDDR2 for UI rendering, graphics overlay, and secure OTA update staging.

Use Value: Eliminates external DRAM routing complexity and enables AES-encrypted firmware storage directly in LPDDR2, meeting IEC 62443-3-3 SL2 requirements.

Use Scenario: Protocol-agnostic industrial gateway aggregating Modbus, CAN-FD, and Ethernet AVB traffic for cloud telemetry.

IC Role / Device Role / Timing Role: Secure network hub with dual GMAC ports, two MCAN controllers, and hardware-accelerated TLS via crypto engines.

Use Value: On-chip 2 Gbit LPDDR2 buffers multi-protocol traffic bursts; AESB encryption secures data-in-flight and data-at-rest without host CPU involvement.

Medical Imaging Terminal

Smart Energy Meter Hub

Use Scenario: Portable ultrasound preview station capturing raw sensor data via ISC and displaying processed images on RGB LCD.

IC Role / Device Role / Timing Role: Image acquisition and display SoC with 12-bit ADC, ISC supporting 5 MP sensors, and 24-bit RGB LCD controller.

Use Value: Integrated LPDDR2 provides low-latency frame buffering; TrustZone isolates diagnostic processing from UI stack, satisfying FDA cybersecurity guidance.

Use Scenario: Utility-grade meter aggregation node performing time-synchronized voltage/current sampling and encrypted grid event logging.

IC Role / Device Role / Timing Role: Time-critical measurement engine using RTC with IEEE 1588 PTP timestamping and secure log storage in scrambled SRAM + LPDDR2.

Use Value: Hardware RTC calibration and ATCSR-enabled LPDDR2 self-refresh maintain accuracy during brownouts; tamper pins detect physical enclosure breaches.

Equivalent & Alternatives

The following parts are listed as comparable options for similar MPU applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ATSAMA5D27C-LD2G-CUR	Same Cortex-A5 core and security features, but integrates 2 Gbit LPDDR2 in 289-ball TFBGA (smaller footprint, lower I/O count: 90 GPIOs).	Targeted at space-constrained designs where full 128 GPIOs and LCD/ISC peripherals are not required.	Select when PCB area is critical and peripheral count can be reduced; not pin-compatible due to different ball count and layout.
i.MX6ULL	Arm Cortex-A7 core (up to 900 MHz), no integrated DRAM, requires external DDR3L; lacks hardware tamper detection and on-the-fly LPDDR2 encryption.	Suitable for cost-sensitive Linux gateways where external memory and software-based security suffice.	Choose when higher CPU clock speed is prioritized over integrated memory and hardware security; requires full DDR3L PHY design and external crypto co-processor for equivalent protection.

Compared with ATSAMA5D27C-LD2G-CUR, the ATSAMA5D28C-LD2G-CUR offers 38 more GPIOs, full LCD/ISC support, and larger package for enhanced thermal dissipation; versus i.MX6ULL, it delivers verified LPDDR2 integration, TrustZone+AESB, and tamper resilience - reducing BOM count and security validation effort.

Availability

ATSAMA5D28C-LD2G-CUR is available at Aetrix Electronics and suitable for industrial HMI, secure edge gateway, and medical imaging terminal applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for ATSAMA5D28C-LD2G-CUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a leading provider of microcontrollers, analog components, FPGAs, and security solutions, with a focus on robust, long-lifecycle semiconductors for industrial, automotive, and aerospace markets.

The SAMA5D2 SIP product line integrates Arm Cortex-A5 MPUs with embedded DRAM to simplify high-reliability Linux-based designs - specifically engineered for secure, low-power, and space-constrained industrial edge applications.

FAQ

What memory types and capacities does the ATSAMA5D28C-LD2G-CUR support?

The ATSAMA5D28C-LD2G-CUR integrates 2 Gbit LPDDR2-SDRAM in a single package and supports no other memory densities or types internally. It does not include DDR2-SDRAM - that option is exclusive to SAMA5D225/27 variants. The LPDDR2 interface complies with JEDEC LPDDR2-S4B, operates at 1.7–1.9 V (VDD18) and 1.14–1.3 V (VDD12), and achieves up to 533 MT/s data rates. External memory expansion remains possible via QSPI or NAND interfaces.

Does the ATSAMA5D28C-LD2G-CUR support Linux operating systems?

Yes, the ATSAMA5D28C-LD2G-CUR is explicitly designed for Linux® deployment. Its 2 Gbit LPDDR2-SDRAM provides sufficient RAM for full-featured distributions (e.g., Yocto Project, Buildroot), and its peripherals - including GMAC with IEEE 1588, dual SDMMC hosts, ISC, and LCD controller - are supported in mainline Linux kernel drivers. Microchip provides validated BSPs and documentation for Yocto-based development targeting the ATSAMA5D28C-LD2G-CUR.

How does the ATSAMA5D28C-LD2G-CUR implement hardware security?

The ATSAMA5D28C-LD2G-CUR implements hardware security through Arm TrustZone®, on-the-fly AES-256 encryption/decryption (AESB) for LPDDR2 and QSPI memories, SHA-256/512 and TRNG crypto engines, 5 KB tamper-responsive SRAM (1 KB non-erasable), and 8 dedicated tamper pins. These features are silicon-verified and documented in Microchip's DS60001484D datasheet and SAMA5D2 Series Secure Boot Strategy (DS00002435), enabling secure boot, runtime memory protection, and physical intrusion detection.

Is the ATSAMA5D28C-LD2G-CUR pin-compatible with other SAMA5D2 SIP variants?

No, the ATSAMA5D28C-LD2G-CUR is not pin-compatible with other SAMA5D2 SIP variants. It uses a 361-ball TFBGA package, whereas SAMA5D27 variants use 289-ball TFBGA and SAMA5D225 uses 196-ball TFBGA. Table 6-1 in DS60001484D explicitly states "SAMA5D2 DDR2 SIP devices are not pin-to-pin compatible with SAMA5D2 devices," and ballouts differ across packages. Migration requires PCB redesign and layout adaptation.

What industrial temperature range does the ATSAMA5D28C-LD2G-CUR operate within?

The ATSAMA5D28C-LD2G-CUR is rated for industrial operation from -40°C to +85°C ambient temperature, as specified in Section 1 of DS60001484D. This rating applies to the full functional specification - including 500 MHz CPU operation, 2 Gbit LPDDR2 access, and all peripherals - without derating. Thermal performance is validated per Microchip's recommended PCB layout guidelines and decoupling network in the same datasheet.

ATSAMA5D28C-LD2G-CUR Specifications

Product attributes: Attribute value

Manufacturer:: Microchip Technology

Package/Case:: 289-LFBGA

Series:: SAMA5D2

Packaging:: Tape & Reel (TR)

Product Status:: Active

Core Processor:: ARM® Cortex®-A5

Number of Cores/Bus Width:: 1 Core, 32-Bit

Speed:: 500MHz

Co-Processors/DSP:: Multimedia; NEON™ MPE

RAM Controllers:: LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI

Graphics Acceleration:: Yes

Display & Interface Controllers:: Keyboard, LCD, Touchscreen

Ethernet:: 10/100Mbps (1)

SATA:: -

USB:: USB 2.0 + HSIC

Voltage - I/O:: 3.3V

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Security Features:: ARM TZ, Boot Security, Cryptography, RTIC, Secure Fusebox, Secure JTAG, Secure Memory, Secure RTC

Mounting Type:: Surface Mount

Supplier Device Package:: 289-LFBGA (14x14)

Additional Interfaces:: I2C, SMC, SPI, UART, USART, QSPI

ATSAMA5D28C-LD2G-CUR FAQ

1.How can I place an order for ATSAMA5D28C-LD2G-CUR through Aetrix?

Please submit a Request for Quotation (RFQ) for ATSAMA5D28C-LD2G-CUR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ATSAMA5D28C-LD2G-CUR reliable?

The price and inventory of ATSAMA5D28C-LD2G-CUR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D28C-LD2G-CUR is usually 5 days.

3.What payment methods are accepted for ATSAMA5D28C-LD2G-CUR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D28C-LD2G-CUR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ATSAMA5D28C-LD2G-CUR?

ATSAMA5D28C-LD2G-CUR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ATSAMA5D28C-LD2G-CUR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ATSAMA5D28C-LD2G-CUR?

For technical support, including ATSAMA5D28C-LD2G-CUR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D28C-LD2G-CUR requirements.

6.How does Aetrix verify that ATSAMA5D28C-LD2G-CUR is sourced from the original manufacturer or authorized distributors?

All ATSAMA5D28C-LD2G-CUR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D28C-LD2G-CUR meets industry standards.

7.What is the process for return or replacement of ATSAMA5D28C-LD2G-CUR?

All ATSAMA5D28C-LD2G-CUR units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D28C-LD2G-CUR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ATSAMA5D28C-LD2G-CUR part is unused and in its original packaging.

Return procedure for ATSAMA5D28C-LD2G-CUR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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