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Microchip Technology ATSAMA5D35A-CUR
- Part No.:
- ATSAMA5D35A-CUR
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 324-LFBGA
- Datasheet:
-
ATSAMA5D35A-CUR.pdf
- Description:
- IC MPU SAMA5D3 536MHZ 324LFBGA
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
ATSAMA5D35A-CUR from Microchip Technology (formerly Atmel) is a high-performance ARM® Cortex®-A5 based embedded MPU operating at up to 536 MHz, featuring integrated Gigabit Ethernet MAC (GMAC) with IEEE 1588 support, dual CAN controllers, and hardware-accelerated cryptographic engines (AES-256, SHA-512, TRNG). It integrates 128 KB SRAM, supports DDR2/LPDDR2 memory with 24-bit ECC, and targets industrial HMI and secure connected gateway applications.
For engineers reviewing the ATSAMA5D35A-CUR datasheet, ATSAMA5D35A-CUR pinout, ATSAMA5D35A-CUR application, or ATSAMA5D35A-CUR equivalent, key selection criteria include GMAC+EMAC dual Ethernet capability, on-chip secure boot, 12-channel 12-bit ADC with resistive touchscreen interface, and 324-ball LFBGA package compatibility with industrial layout constraints.
Technical Context
The ATSAMA5D35A-CUR implements a multi-layer bus architecture with 39 DMA channels to sustain high-bandwidth data flow between the Cortex-A5 core, DDR2/LPDDR2 memory controller, and peripherals including GMAC, EMAC, CAN, USB, and LCD. Its memory subsystem includes dedicated Static Memory Controller with MLC NAND support and 24-bit PMECC.
Security is implemented via hardware-accelerated AES-256/TDES encryption, SHA-1/224/256/384/512 hash, True Random Number Generator (TRNG), and Atmel Secure Boot - all verified for FIPS PUB 197/46-3 compliance. The device boots from 8-bit NAND Flash, eMMC, SD card, or serial DataFlash® with configurable boot order.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-A5 @ 536 MHz with VFPv4 floating-point unit and MMU - enables Linux-capable real-time deterministic execution |
| Memory Interface | 32-bit DDR2/LPDDR2 controller supporting 512 MB with datapath scrambling - ensures high-throughput, secure memory access |
| Secure Peripherals | AES-256, TDES, SHA-512, TRNG, and Secure Boot - provides FIPS-compliant encryption, anti-cloning, and authenticated firmware loading |
| Connectivity | GMAC (10/100/1000 Mbps + IEEE 1588), EMAC (10/100 Mbps), two CAN 2.0B controllers (8 mailboxes each) - enables time-synchronized industrial networking and dual-fieldbus redundancy |
| Analog Interface | 12-channel 12-bit ADC with resistive touch-screen support (AD0UL–AD3LR) - delivers direct panel integration without external touch controller |
| Package | 324-ball LFBGA (15 × 15 × 1.4 mm, 0.8 mm pitch) - industrial-grade footprint with thermal and mechanical reliability for extended temperature operation |
| I/O Count | 160 programmable I/Os with per-pin slew rate control, impedance tuning for DDR, and Schmitt-trigger inputs - supports mixed-signal board routing and noise immunity |
Pinout & Package
ATSAMA5D35A-CUR is housed in a 324-ball Low-Profile Fine-Pitch Ball Grid Array (LFBGA) package measuring 15 mm × 15 mm × 1.4 mm with 0.8 mm ball pitch. This package supports industrial thermal dissipation requirements and is compatible with standard reflow profiles.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| PA0–PA31 | Parallel I/O Controller A | Primary LCD data bus (LCDDAT0–LCDDAT23), clock (LCDPCK), sync (LCDHSYNC/VSYNC), and display control - enables direct TFT panel driving |
| PB0–PB26 | Parallel I/O Controller B | GMAC physical layer interface (GTX0–GTX7, GRX0–GRX7, GTXCK, GRXCK) - supports full Gigabit Ethernet PHY connection without external transceiver |
| PC0–PC31 | Parallel I/O Controller C | EMAC (ETX0/ETX1, ERX0/ERX1), CAN0/CAN1 (CANTX0/CANRX0, CANTX1/CANRX1), and SPI1 signals - enables dual Ethernet + dual CAN coexistence |
| PD0–PD19 | Parallel I/O Controller D | MCI0/MCI1 interfaces for eMMC/SD card hosting, plus UART0/UART1 debug and control - supports local storage and field service access |
| PE0–PE31 | Parallel I/O Controller E | External Bus Interface (EBI) address/data (A0–A25, D0–D15), NAND control (NANDALE/NANDCLE), and wait signaling - enables legacy parallel NOR/NAND and FPGA interfacing |
| DDR_A0–DDR_A13, DDR_D0–DDR_D31 | DDR2/LPDDR2 Memory Interface | Dedicated 32-bit data and 14-bit address buses with DDR_VREF, DDR_CALP/N, and DQS strobes - ensures stable high-speed memory timing calibration |
Key Features
| Feature | Design Value |
|---|---|
| Gigabit + 10/100 Ethernet | Integrated GMAC and EMAC allow simultaneous high-speed backbone and legacy fieldbus connectivity - eliminates need for external Ethernet switches or PHYs |
| Hardware Crypto Engine | AES-256, SHA-512, and TRNG accelerate TLS handshake, firmware signature verification, and secure OTA updates - reduces CPU load by >90% vs software-only crypto |
| Resistive Touchscreen ADC | 12-channel 12-bit ADC with dedicated touch input pins (AD0UL–AD3LR) and internal voltage reference - enables direct 4-wire resistive panel interface without external analog front-end |
| Secure Boot | Immutable ROM-based bootloader validates signed firmware images before execution - prevents unauthorized code injection and ensures supply-chain integrity |
| Multi-Protocol Serial Hosts | Three High-Speed Multimedia Card Interfaces (HSMCI0–2) supporting eMMC 4.3, SD 2.0, and SDIO - allows concurrent local storage, Wi-Fi module, and cellular modem attachment |
| Low-Power Management | Shut-down controller, battery-backed registers, and software-programmable power states - extends runtime in battery-powered HMIs and portable gateways |
Applications
| Industrial HMI Panel | Secure IoT Gateway |
|---|---|
|
Use Scenario: Standalone operator interface in factory automation with 7-inch TFT display, touch input, and local PLC communication. IC Role / Device Role / Timing Role: Main application processor executing Linux-based UI stack, driving LCD controller, sampling resistive touchscreen, and managing CAN/EMAC fieldbus links. Use Value: Integrated LCD controller with alpha-blending and rotation offloads GPU-equivalent tasks; dual CAN enables direct connection to servo drives and I/O modules. |
Use Scenario: Edge gateway aggregating Modbus RTU, CANopen, and EtherNet/IP devices into encrypted TLS tunnels to cloud platforms. IC Role / Device Role / Timing Role: Secure application host running embedded Linux, performing protocol translation, cryptographic tunneling, and time-synchronized packet timestamping via IEEE 1588. Use Value: Hardware AES/SHA accelerators enable line-rate TLS 1.2 encryption on GMAC; IEEE 1588 hardware timestamping ensures sub-microsecond time alignment across distributed sensors. |
| Medical Device Controller | Energy Metering Hub |
|
Use Scenario: Portable diagnostic instrument with color display, touch navigation, biometric sensor interface, and wireless update capability. IC Role / Device Role / Timing Role: Central controller managing display rendering, ADC acquisition from analog biosensors, secure firmware updates over USB or Wi-Fi, and tamper-resistant logging. Use Value: Secure Boot and TRNG ensure regulatory compliance (IEC 62304); 128 KB on-chip SRAM enables deterministic real-time response for critical alarm handling. |
Use Scenario: Smart electricity meter hub collecting data from multiple sub-meters via RS-485 and M-Bus, then transmitting via LTE or PRIME PLC. IC Role / Device Role / Timing Role: Protocol concentrator with isolated serial interfaces, secure data aggregation, and encrypted reporting using AES-GCM authenticated encryption. Use Value: Hardware TDES/AES engines meet DLMS/COSEM security requirements; low-power shutdown mode extends battery backup life during grid outages. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar embedded MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP i.MX6ULL | Lacks IEEE 1588 hardware timestamping, no integrated GMAC (requires external PHY), no hardware SHA-512 or TRNG | Suitable for cost-sensitive non-time-critical gateways but requires external crypto IC for FIPS-level security | Select when budget constraints outweigh need for hardware time synchronization and full crypto acceleration |
| Renesas RZ/G1M | Includes 3D graphics accelerator and video codec, but only single CAN and no hardware SHA-512 or PMECC for NAND | Better suited for multimedia-rich HMIs than secure industrial gateways requiring dual CAN + ECC NAND | Select when display performance dominates over cryptographic throughput and NAND reliability requirements |
Compared with i.MX6ULL and RZ/G1M, ATSAMA5D35A-CUR uniquely combines IEEE 1588 hardware timestamping, dual CAN 2.0B, 24-bit NAND ECC, and FIPS-certifiable crypto engines - making it optimal for time-deterministic, secure, and storage-reliant industrial edge nodes.
Availability
ATSAMA5D35A-CUR is available at Aetrix Electronics and suitable for industrial HMI panels, secure IoT gateways, medical device controllers, and energy metering hubs requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for ATSAMA5D35A-CUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and toolchain continuity for the SAMA5D3 series.
The SAMA5D3 product line was designed specifically for high-reliability industrial and consumer applications demanding secure boot, hardware crypto acceleration, and rich peripheral integration - especially where Linux-based HMI and protocol gateway functionality must coexist on a single chip.
FAQ
What is the maximum operating frequency of the ATSAMA5D35A-CUR?
The ATSAMA5D35A-CUR operates at a maximum CPU frequency of 536 MHz. This speed is achieved using the ARM Cortex-A5 core with VFPv4 floating-point unit and is sustained under industrial temperature conditions with appropriate thermal design. The system bus runs up to 166 MHz, enabling high-throughput peripheral access without bottlenecking the core.
Does the ATSAMA5D35A-CUR support secure boot from NAND flash?
Yes, the ATSAMA5D35A-CUR supports secure boot from 8-bit NAND Flash using its embedded ROM bootloader. The boot process verifies digital signatures of firmware images using the on-chip cryptographic engine before execution, ensuring only authenticated code runs. This capability is part of Atmel's Secure Boot Solution and does not require external components.
Which Ethernet standards does the ATSAMA5D35A-CUR support natively?
The ATSAMA5D35A-CUR integrates two independent Ethernet MACs: a Gigabit Ethernet MAC (GMAC) compliant with IEEE 802.3ab and IEEE 1588-2008 for precision time protocol, and a 10/100 Mbps Ethernet MAC (EMAC) compliant with IEEE 802.3u. Both interfaces operate without external PHYs when paired with appropriate magnetics and layout.
Can the ATSAMA5D35A-CUR drive a TFT LCD panel directly?
Yes, the ATSAMA5D35A-CUR includes a full-featured LCD controller supporting RGB, YUV, and serial interfaces. It drives TFT panels directly via its 24-bit LCDDAT bus (PA0–PA23), with hardware overlays, alpha-blending, rotation, scaling, and color space conversion - eliminating the need for external display processors in most HMI designs.
What NAND Flash error correction capability does the ATSAMA5D35A-CUR provide?
The ATSAMA5D35A-CUR includes a Programmable Multi-Bit Error Correction Code (PMECC) engine supporting up to 24-bit correction per 512-byte sector for SLC and MLC NAND Flash. This enables reliable use of high-density, cost-effective NAND in industrial applications where bit errors accumulate over time and temperature cycles.
ATSAMA5D35A-CUR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 324-LFBGA
- Series:
- SAMA5D3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 536MHz
- Co-Processors/DSP:
- -
- RAM Controllers:
- LPDDR, LPDDR2, DDR2
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- Touchscreen
- Ethernet:
- 10/100/1000Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 (3)
- Voltage - I/O:
- 1.2V, 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- AES, SHA, TDES, TRNG
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 324-LFBGA (15x15)
- Additional Interfaces:
- CAN, I2C, MMC/SD/SDIO, SPI, SSC, UART, USART
ATSAMA5D35A-CUR FAQ
1.How can I place an order for ATSAMA5D35A-CUR through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D35A-CUR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D35A-CUR reliable?
The price and inventory of ATSAMA5D35A-CUR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D35A-CUR is usually 5 days.
3.What payment methods are accepted for ATSAMA5D35A-CUR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D35A-CUR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D35A-CUR?
ATSAMA5D35A-CUR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D35A-CUR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D35A-CUR?
For technical support, including ATSAMA5D35A-CUR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D35A-CUR requirements.
6.How does Aetrix verify that ATSAMA5D35A-CUR is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D35A-CUR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D35A-CUR meets industry standards.
7.What is the process for return or replacement of ATSAMA5D35A-CUR?
All ATSAMA5D35A-CUR units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D35A-CUR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D35A-CUR part is unused and in its original packaging.
Return procedure for ATSAMA5D35A-CUR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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