Microchip Technology ATSAMA5D36A-CNR
- Part No.:
- ATSAMA5D36A-CNR
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 324-LFBGA
- Datasheet:
-
ATSAMA5D36A-CNR.pdf
- Description:
- IC MPU SAMA5D3 536MHZ 324LFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ATSAMA5D36A-CNR from Microchip Technology is a high-performance, low-power Arm® Cortex®-A5-based microprocessor unit (MPU) operating at 536 MHz with integrated FPU, dual CAN controllers, Gigabit Ethernet with IEEE 1588 support, AES/SHA cryptographic engines, and 12-channel 12-bit ADC with resistive touchscreen interface - deployed in industrial HMI, battery-powered control panels, and secure connected edge devices.
For engineers reviewing the ATSAMA5D36A-CNR datasheet, ATSAMA5D36A-CNR pinout, ATSAMA5D36A-CNR application, or ATSAMA5D36A-CNR equivalent, key selection considerations include DDR2/LPDDR2 memory controller with 24-bit ECC, dual CAN 2.0B compliance, secure boot capability, and 324-ball LFBGA (15×15 mm, 0.8 mm pitch) package compatibility for industrial layout constraints.
Technical Context
The ATSAMA5D36A-CNR implements a multi-layer bus architecture with 39 DMA channels to sustain high-bandwidth data flow between its Cortex-A5 core, DDR2/LPDDR2 memory controller, and peripherals including GMAC, EMAC, dual CAN, LCD controller, and ISI image sensor interface. Its system clock runs up to 166 MHz, supported by dual PLLs (400–1000 MHz for system, 480 MHz for USB).
Security is embedded at silicon level: TRNG feeds AES-256/TDES and SHA-1/224/256/384/512 engines; secure boot enforces authenticated firmware loading; and PMECC provides hardware-accelerated 24-bit ECC for MLC NAND Flash. The device supports boot from eMMC, SD, NAND, or DataFlash with configurable order.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5, ARMv7-A Thumb-2 ISA, 536 MHz max frequency - enables Linux-capable real-time processing with VFPv4 floating-point unit. |
| Memory Interface | 32-bit DDR2/LPDDR2 controller supporting 512 MB; 24-bit PMECC for MLC NAND - ensures reliable high-speed external memory access with robust error correction. |
| Security | AES-256/TDES encryption + SHA-1/224/256/384/512 hash + TRNG + secure boot - delivers FIPS-compliant data protection and anti-cloning for firmware and external transfers. |
| Connectivity | Gigabit EMAC (IEEE 1588), 10/100 EMAC, dual CAN 2.0A/B (8 mailboxes each), 3x USB (1 device + 2 host), 3x HS MMC/SD/eMMC - supports deterministic industrial networking and multi-protocol fieldbus integration. |
| Analog & Touch | 12-channel 12-bit ADC with dedicated resistive touchscreen inputs (AD0UL–AD3LR, AD4PI) - enables direct integration of touch-enabled HMIs without external digitizer ICs. |
| Package | 324-ball LFBGA, 15 × 15 × 1.4 mm, 0.8 mm pitch - RoHS-compliant, thermally optimized for industrial PCB layouts with standard reflow profiles. |
Pinout & Package
The ATSAMA5D36A-CNR is housed in a 324-ball Low-Profile Fine-Pitch Ball Grid Array (LFBGA) package measuring 15 mm × 15 mm × 1.4 mm with 0.8 mm ball pitch, designed for thermal efficiency and high I/O density in space-constrained industrial applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PA0–PA31 | Parallel I/O Controller A | 32-bit general-purpose I/O bank with programmable pull-up/down, Schmitt trigger, and slew rate control - used for GPIO expansion, LCD data bus (LCDDAT0–23), and peripheral multiplexing. |
| PB0–PB31 | Parallel I/O Controller B | 32-bit I/O bank supporting GMAC signals (GTX0–GTX7, GRX0–GRX7), CAN1 (CANTX1/CANRX1), and MCI1 - enables direct Ethernet PHY interfacing and high-speed memory card control. |
| PC0–PC31 | Parallel I/O Controller C | 32-bit I/O bank with EMAC (ETX0/ETX1, ERX0/ERX1), SPI1, TWI1, and ISI_D8–D11 - supports RMII Ethernet, serial interfaces, and image sensor data capture. |
| PD0–PD31 | Parallel I/O Controller D | 32-bit analog/digital I/O bank hosting MCI0 (eMMC/SD), SPI0, UART0/1, and 12-channel ADC inputs (AD0–AD11) - integrates storage, serial comms, and touch sensing on one port. |
| PE0–PE31 | Parallel I/O Controller E | 32-bit EBI address/data bus controller (A0–A25, D0–D15, NCS0–NCS3, NWE/NRD) - drives external NOR/NAND/PSRAM with full 25-bit addressing and byte masking. |
Key Features
| Feature | Design Value |
|---|---|
| Floating Point Unit (VFPv4) | Hardware-accelerated single/double-precision arithmetic enables real-time signal processing and control algorithms without software emulation overhead. |
| Multi-layer Bus + 39 DMA Channels | Decouples CPU from high-bandwidth peripherals (GMAC, LCD, ISI), enabling concurrent data movement and deterministic latency for multimedia and industrial I/O. |
| Secure Boot + Cryptographic Engines | Ensures only signed firmware executes; AES/SHA offload reduces CPU load during encrypted OTA updates or TLS handshake operations in edge gateways. |
| Integrated LCD Controller | Supports TFT overlays, alpha-blending, rotation, scaling, and color space conversion - eliminates need for external graphics accelerator in HMI designs. |
| 12-bit ADC with Touchscreen Interface | Dedicated analog inputs (AD0UL–AD3LR) and internal touch sequencer enable precise 4-wire resistive touch detection with <1% linearity error, reducing BOM cost. |
Applications
| Industrial HMI Panels | Battery-Powered Edge Gateways |
|---|---|
Use Scenario: Touch-enabled control panel in factory automation with real-time status display, alarm logging, and Modbus TCP gateway functions. IC Role / Device Role / Timing Role: Main application processor running Linux with Qt-based GUI, managing LCD output, dual CAN for PLC communication, and Gigabit Ethernet for SCADA backhaul. Use Value: Integrated LCD controller and dual CAN eliminate external bridge ICs; 536 MHz Cortex-A5 + FPU handles multitasking and soft-PWM motor control simultaneously. | Use Scenario: Solar micro-inverter gateway collecting sensor data, performing local analytics, and transmitting encrypted telemetry via cellular/Ethernet. IC Role / Device Role / Timing Role: Secure edge node processor executing lightweight Linux, managing AES-encrypted MQTT payloads, and synchronizing time-critical events using IEEE 1588 PTP over GMAC. Use Value: Hardware TRNG and SHA-256 accelerate certificate validation; low-power modes (<0.5 mW shutdown) extend battery life in remote deployments. |
| Secure Medical Data Terminals | Smart Building Control Units |
Use Scenario: HIPAA-compliant patient kiosk handling biometric login, appointment scheduling, and encrypted EHR data upload. IC Role / Device Role / Timing Role: Trusted execution environment host with secure boot, AES-256 for local database encryption, and USB device mode for secure peripheral attachment (e.g., fingerprint reader). Use Value: On-chip cryptographic engines prevent side-channel leakage; 24-bit NAND ECC ensures firmware integrity across 10+ year product lifecycle. | Use Scenario: HVAC controller integrating BACnet/IP, KNX, and Modbus RTU while rendering occupancy dashboards on local LCD. IC Role / Device Role / Timing Role: Multi-protocol convergence hub running real-time OS, driving 800×480 LCD via LCDC, and managing dual CAN for legacy building systems. Use Value: Dual CAN controllers with 8-mailbox buffers handle concurrent BMS and lighting network traffic; integrated PWM supports fan speed regulation without external timers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D27C-CU | Arm Cortex-A5 @ 500 MHz, includes TrustZone security extension and LPDDR2/DDR3L support; lacks second EMAC and ISI interface. | Better suited for TrustZone-based secure partitioning (e.g., isolated RTOS + Linux); not ideal for dual-network industrial gateways requiring both GMAC and EMAC. | Select when hardware-enforced security isolation is required over dual Ethernet or image sensor support. |
| i.MX6ULL | Arm Cortex-A7 @ 900 MHz, single Ethernet MAC, no built-in CAN; uses external PMIC and lacks NAND ECC engine. | Targets cost-sensitive consumer IoT; requires additional ICs for CAN, NAND reliability, and power management - increasing BOM and layout complexity. | Choose for higher CPU throughput in non-industrial settings where CAN and hardware ECC are handled externally. |
Compared with ATSAMA5D27C-CU and i.MX6ULL, the ATSAMA5D36A-CNR uniquely combines dual CAN 2.0B, Gigabit + 10/100 Ethernet, 24-bit NAND ECC, and resistive touchscreen ADC in a single die - making it optimal for integrated industrial HMI and secure edge gateway designs without compromise on connectivity or data integrity.
Availability
ATSAMA5D36A-CNR is available at Aetrix Electronics and suitable for industrial HMI panels, battery-powered edge gateways, and secure medical terminals requiring stable component supply across extended product lifecycles.
Supply support for ATSAMA5D36A-CNR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog, FPGA, and security solutions, delivering scalable silicon and development tools for embedded control and connectivity.
The SAMA5D3 series targets high-integration industrial and consumer applications demanding rich peripheral sets, hardware security, and low-power operation - specifically engineered for HMI, control panels, and secure edge nodes.
FAQ
What is the maximum operating frequency of the ATSAMA5D36A-CNR processor core?
The ATSAMA5D36A-CNR features an Arm Cortex-A5 core rated for up to 536 MHz operation. This frequency is achieved under specified voltage and thermal conditions per the official Microchip datasheet DS60001609B. The ATSAMA5D36A-CNR maintains this performance while supporting full MMU, VFPv4 floating-point unit, and cache coherency - enabling Linux-capable real-time applications without throttling.
Does the ATSAMA5D36A-CNR support secure boot and cryptographic acceleration?
Yes, the ATSAMA5D36A-CNR includes hardware-enforced secure boot that validates digital signatures before firmware execution. It also integrates dedicated AES-256/TDES and SHA-1/224/256/384/512 engines, plus a True Random Number Generator (TRNG). These features allow the ATSAMA5D36A-CNR to perform cryptographic operations at line rate without CPU intervention - critical for secure OTA updates and TLS termination in edge devices.
Which memory types and interfaces does the ATSAMA5D36A-CNR support?
The ATSAMA5D36A-CNR supports DDR2, LPDDR, and LPDDR2 memory via its 32-bit dynamic RAM controller (up to 512 MB), and includes a static memory controller with SLC/MLC NAND Flash support featuring up to 24-bit PMECC. It also boots from eMMC 4.3, SD 2.0, serial DataFlash, and 8-bit NAND Flash. These capabilities make the ATSAMA5D36A-CNR suitable for applications requiring high-bandwidth RAM and robust, long-life nonvolatile storage.
How many CAN interfaces does the ATSAMA5D36A-CNR provide, and what protocol versions are supported?
The ATSAMA5D36A-CNR integrates two fully independent CAN controllers (CAN0 and CAN1), each compliant with ISO 11898-1:2003 (CAN 2.0 Part A and Part B). Each controller supports 8 message mailboxes with programmable priority and filtering. This dual-CAN capability allows the ATSAMA5D36A-CNR to serve as a protocol gateway between multiple CAN networks - such as vehicle diagnostics and industrial motion control buses - without external transceivers beyond physical layer drivers.
What package type and pin count does the ATSAMA5D36A-CNR use?
The ATSAMA5D36A-CNR is offered exclusively in a 324-ball Low-Profile Fine-Pitch Ball Grid Array (LFBGA) package measuring 15 mm × 15 mm × 1.4 mm with 0.8 mm ball pitch. This RoHS-compliant package supports standard PCB assembly processes and provides 160 user-configurable I/Os across five parallel I/O controllers (PIOA–PIOE), along with dedicated power, clock, reset, and debug pins as defined in Microchip's DS60001609B datasheet.
ATSAMA5D36A-CNR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 324-LFBGA
- Series:
- SAMA5D3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 536MHz
- Co-Processors/DSP:
- -
- RAM Controllers:
- LPDDR, LPDDR2, DDR2
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- LCD, Touchscreen
- Ethernet:
- 10/100/1000Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 (3)
- Voltage - I/O:
- 1.2V, 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- AES, SHA, TDES, TRNG
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 324-LFBGA (15x15)
- Additional Interfaces:
- CAN, I2C, MMC/SD/SDIO, SPI, SSC, UART, USART
ATSAMA5D36A-CNR FAQ
1.How can I place an order for ATSAMA5D36A-CNR through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D36A-CNR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D36A-CNR reliable?
The price and inventory of ATSAMA5D36A-CNR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D36A-CNR is usually 5 days.
3.What payment methods are accepted for ATSAMA5D36A-CNR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D36A-CNR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D36A-CNR?
ATSAMA5D36A-CNR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D36A-CNR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D36A-CNR?
For technical support, including ATSAMA5D36A-CNR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D36A-CNR requirements.
6.How does Aetrix verify that ATSAMA5D36A-CNR is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D36A-CNR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D36A-CNR meets industry standards.
7.What is the process for return or replacement of ATSAMA5D36A-CNR?
All ATSAMA5D36A-CNR units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D36A-CNR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D36A-CNR part is unused and in its original packaging.
Return procedure for ATSAMA5D36A-CNR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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