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Home > Products > Integrated Circuits (ICs) > Embedded > Microprocessors

Microchip Technology ATSAMA5D42B-CUR

Name: ATSAMA5D42B-CUR
Brand: Microchip Technology
SKU: ATSAMA5D42B-CUR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ATSAMA5D42B-CUR

Manufacturer:: Microchip Technology

Category:: Microprocessors

Package:: 361-TFBGA

Datasheet:: ATSAMA5D42B-CUR.pdf

Description:: IC MPU SAMA5D4 600MHZ 361TFBGA

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Product details

Overview

ATSAMA5D42B-CUR from Microchip Technology is a high-performance, power-efficient Arm® Cortex®-A5 microprocessor unit (MPU) operating at up to 600 MHz, featuring 128 KB L2 cache, Arm TrustZone® security, dual 10/100 Ethernet MACs with IEEE 1588 v2 support, and hardware-accelerated LCD controller for 720p displays. It targets industrial HMI, secure gateways, and IoT edge devices requiring robust connectivity and cryptographic acceleration.

For engineers reviewing the ATSAMA5D42B-CUR datasheet, ATSAMA5D42B-CUR pinout, ATSAMA5D42B-CUR application, or ATSAMA5D42B-CUR equivalent, key selection considerations include its TFBGA361 package, 32-bit DDR2/LPDDR2 memory interface, absence of integrated video decoder (vs. SAMA5D44), and dedicated public-key coprocessor supporting RSA/ECC/AES/SHA/TRNG for secure boot and data encryption.

Technical Context

The ATSAMA5D42B-CUR implements a full Armv7-A architecture with NEON SIMD engine and MMU, enabling Linux-capable embedded systems. Its multi-layer bus architecture sustains high bandwidth via 32 DMA channels and supports DDR2/LPDDR/LPDDR2 with 32-bit datapath and on-the-fly AES encryption/decryption.

Security is enforced through TrustZone isolation, Integrity Check Monitor (ICM) using SHA256, tamper-detection pins (PIOBU0–7), scrambled internal ROM/SRAM, and a dedicated Public Key Coprocessor (CPKCC) with Classical Public Key Cryptography Library (CPKCL) for RSA, DSA, ECC GF(2ⁿ)/GF(p), plus AESB bridge for automatic DDR port encryption/decryption.

Key Specifications

Parameter	Value and Actual Design Meaning
CPU Core	Arm Cortex-A5 @ 600 MHz, 945 MIPS in worst-case conditions, Thumb2 instruction set, TrustZone-enabled
Memory Interface	32-bit DDR2/LPDDR/LPDDR2 controller with 512 MB address space and partial-area AES encryption/decryption
L2 Cache	128 KB unified L2 cache for sustained system performance in high-bandwidth applications
Ethernet	Dual 10/100 Mbps GMACs with IEEE 1588 v2 precision time protocol support for synchronized industrial networks
Security Engine	Dedicated CPKCC coprocessor + AESB bridge + TRNG compliant with NIST SP 800-22 and FIPS 140-2/140-3
Peripherals	720p LCD controller with 4 overlays, 5-channel 10-bit ADC with resistive touchscreen, ISI camera interface, 3x HS USB ports
Low-Power Modes	Three software-selectable modes: Idle (CPU stopped, peripherals active at full speed), Ultra-low-power (CPU stopped, peripherals at min speed), Backup (RTC + backup SRAM only)

Pinout & Package

ATSAMA5D42B-CUR is housed in a 361-ball stubless TFBGA package (16×16 mm body, 0.8 mm pitch), compatible with standard PCB assembly processes and thermal management for industrial environments.

Pin/Terminal	Circuit Role	Design Meaning
PA0–PA31, PB0–PB31, PC0–PC31, PD8–PD31, PE0–PE31	Parallel I/O Controllers A–E	152 configurable GPIOs with slew rate control, Schmitt-trigger inputs, programmable pull-up/down, and interrupt-on-change capability
DDR_A0–DDR_A13, DDR_D0–DDR_D31, DDR_CS, DDR_CKE, DDR_RAS/CAS, DDR_CLK/CLKN	DDR2/LPDDR2 Memory Interface	32-bit wide, high-speed synchronous interface supporting 512 MB addressing and on-the-fly AES encryption/decryption
GMAC0/GMAC1 TX/RX signals (G0/G1_TX0–3, G0/G1_RX0–3, G0/G1_MDC/MDIO)	Dual Ethernet MAC Physical Layer Interface	IEEE 802.3-compliant 10/100 Mbps interfaces with IEEE 1588 v2 timestamping and MII/RMII support
LCDDAT0–23, LCDVSYNC, LCDHSYNC, LCDPCK, LCDDEN	LCD TFT Controller Interface	24-bit RGB parallel output supporting up to 2048×2048 resolution or 720p video format with alpha blending and rotation
ISI_D0–D11, ISI_HSYNC, ISI_VSYNC, ISI_PCK	Image Sensor Interface	ITU-R BT.601/656 compliant parallel interface for CMOS image sensors up to 12-bit depth and 133 MHz pixel clock

Key Features

Feature	Design Value
TrustZone Security Architecture	Hardware-enforced isolation between secure and non-secure worlds, enabling secure boot, encrypted firmware execution, and protected key storage
Public Key Cryptography Acceleration	CPKCC coprocessor with CPKCL library enables RSA-4096, ECC-521, and DSA operations in <10 ms - critical for TLS handshake and code signing
On-the-Fly DDR Encryption	AESB bridge performs real-time 128-bit AES encryption/decryption of DDR traffic without CPU overhead or latency penalty
Integrity Check Monitor (ICM)	SHA256-based memory integrity verification detects unauthorized runtime modifications to boot code or critical firmware sections
Resistive Touchscreen ADC	Integrated 5-channel 10-bit ADC with dedicated touch controller logic eliminates need for external touch IC in HMI designs

Applications

Industrial HMI Panels	Secure Industrial Gateways
Use Scenario: Factory-floor operator interface with 7-inch 720p TFT display, Ethernet backhaul, and local USB device connectivity. IC Role / Device Role / Timing Role: Main application processor executing Linux-based UI framework, driving LCD controller, managing dual Ethernet for PLC communication and cloud uplink. Use Value: Integrated LCD controller and dual IEEE 1588 Ethernet eliminate external timing ICs and PHYs, reducing BOM cost and board area by ~18% vs. discrete MPU+PHY solutions.	Use Scenario: Field-deployed edge gateway aggregating Modbus RTU sensor data and forwarding via TLS-secured MQTT to cloud platform. IC Role / Device Role / Timing Role: Secure root-of-trust processor handling certificate validation, AES-256 payload encryption, and secure boot chain verification before loading application firmware. Use Value: On-chip CPKCC and AESB enable full TLS 1.3 handshake in <120 ms and zero-copy encrypted data path - no external crypto co-processor required.
IoT Edge Video Analytics Node	Medical Device Control Unit
Use Scenario: Compact enclosure with CMOS camera input, local motion detection, and encrypted video streaming over Ethernet. IC Role / Device Role / Timing Role: Vision processing host interfacing directly to camera via ISI, running lightweight inference model on Cortex-A5 + NEON, encrypting stream with AESB before transmission. Use Value: ISI interface supports 133 MHz pixel clock and 12-bit data width, enabling 1080p30 capture; AESB ensures encrypted video never resides unencrypted in DDR memory.	Use Scenario: Patient monitor with resistive touchscreen UI, isolated CAN bus for medical equipment interconnect, and secure firmware update capability. IC Role / Device Role / Timing Role: Safety-critical control processor executing IEC 62304-compliant firmware, using TrustZone to isolate diagnostic services from UI stack, and validating updates via secure boot. Use Value: Tamper-detection pins (PIOBU0–7) and ICM provide hardware-level evidence of physical intrusion or memory corruption - satisfying IEC 62304 Class C traceability requirements.

Industrial HMI Panels

Secure Industrial Gateways

Use Scenario: Factory-floor operator interface with 7-inch 720p TFT display, Ethernet backhaul, and local USB device connectivity.

IC Role / Device Role / Timing Role: Main application processor executing Linux-based UI framework, driving LCD controller, managing dual Ethernet for PLC communication and cloud uplink.

Use Value: Integrated LCD controller and dual IEEE 1588 Ethernet eliminate external timing ICs and PHYs, reducing BOM cost and board area by ~18% vs. discrete MPU+PHY solutions.

Use Scenario: Field-deployed edge gateway aggregating Modbus RTU sensor data and forwarding via TLS-secured MQTT to cloud platform.

IC Role / Device Role / Timing Role: Secure root-of-trust processor handling certificate validation, AES-256 payload encryption, and secure boot chain verification before loading application firmware.

Use Value: On-chip CPKCC and AESB enable full TLS 1.3 handshake in <120 ms and zero-copy encrypted data path - no external crypto co-processor required.

IoT Edge Video Analytics Node

Medical Device Control Unit

Use Scenario: Compact enclosure with CMOS camera input, local motion detection, and encrypted video streaming over Ethernet.

IC Role / Device Role / Timing Role: Vision processing host interfacing directly to camera via ISI, running lightweight inference model on Cortex-A5 + NEON, encrypting stream with AESB before transmission.

Use Value: ISI interface supports 133 MHz pixel clock and 12-bit data width, enabling 1080p30 capture; AESB ensures encrypted video never resides unencrypted in DDR memory.

Use Scenario: Patient monitor with resistive touchscreen UI, isolated CAN bus for medical equipment interconnect, and secure firmware update capability.

IC Role / Device Role / Timing Role: Safety-critical control processor executing IEC 62304-compliant firmware, using TrustZone to isolate diagnostic services from UI stack, and validating updates via secure boot.

Use Value: Tamper-detection pins (PIOBU0–7) and ICM provide hardware-level evidence of physical intrusion or memory corruption - satisfying IEC 62304 Class C traceability requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar MPU applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ATSAMA5D44B-CUR	Includes hardware video decoder (VDEC) for MPEG-4/H.264/VP8/JPEG; same TFBGA361 package and 32-bit DDR interface	Required for local video playback or transcoding; not needed if only display rendering or camera capture is used	Select ATSAMA5D44B-CUR only when VDEC functionality is mandatory; ATSAMA5D42B-CUR offers identical security/performance at lower cost and power for non-video HMI/gateway use cases
ATSAMA5D36B-CUR	Lower-cost Arm926EJ-S core (536 MHz), no TrustZone, no CPKCC, single Ethernet MAC, 16-bit DDR interface	Suitable for cost-sensitive, non-security-critical applications like basic HMIs or legacy industrial controllers	ATSAMA5D36B-CUR lacks hardware security features and dual Ethernet; choose only when security certification (e.g., IEC 62443) is not required and bandwidth needs are ≤200 Mbps

Compared with ATSAMA5D44B-CUR, ATSAMA5D42B-CUR removes video decode logic to reduce die size, power, and cost while retaining identical security engines and dual Ethernet - making it optimal for secure gateways and display-only HMIs. Versus ATSAMA5D36B-CUR, it delivers TrustZone isolation, CPKCC acceleration, and dual IEEE 1588 Ethernet essential for modern industrial IoT deployments.

Availability

ATSAMA5D42B-CUR is available at Aetrix Electronics and suitable for industrial HMI panels, secure gateways, and IoT edge analytics nodes requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for ATSAMA5D42B-CUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a leading provider of microcontrollers, analog, FPGA, and security solutions, serving industrial, automotive, communications, and consumer markets with vertically integrated silicon and development tools.

The SAMA5D4 series was designed specifically for high-assurance embedded applications demanding Arm Cortex-A performance, hardware-enforced security, and rich peripheral integration - targeting industrial HMIs, secure gateways, and IoT edge nodes where Linux scalability meets safety and trust requirements.

FAQ

What distinguishes ATSAMA5D42B-CUR from other SAMA5D4 variants like ATSAMA5D44B-CUR?

The ATSAMA5D42B-CUR omits the hardware video decoder (VDEC) present in ATSAMA5D44B-CUR but retains identical security features (TrustZone, CPKCC, AESB), dual IEEE 1588 Ethernet MACs, 32-bit DDR interface, and 128 KB L2 cache. This makes ATSAMA5D42B-CUR ideal for display-driven HMIs and secure gateways where video playback is unnecessary - reducing cost, power, and thermal footprint without compromising security or connectivity.

Does ATSAMA5D42B-CUR support secure boot, and how is it implemented?

Yes, ATSAMA5D42B-CUR supports hardware-verified secure boot via its internal scrambled 128 KB ROM containing Microchip's secure boot loader. The process validates digital signatures of subsequent boot stages using the CPKCC coprocessor and enforces TrustZone isolation. Critical keys are stored in scrambled internal SRAM and protected by tamper-detection pins (PIOBU0–7), ensuring boot integrity from ROM through Linux kernel load.

What memory types and configurations does ATSAMA5D42B-CUR support?

ATSAMA5D42B-CUR supports DDR2, LPDDR, and LPDDR2 memory via its 32-bit wide controller with 512 MB address space. It also integrates a 16-bit NAND Flash controller with 24-bit PMECC error correction and an independent Static Memory Controller (SMC) for NOR/PSRAM. All DDR traffic can be encrypted/decrypted on-the-fly using the AESB bridge without CPU involvement.

Can ATSAMA5D42B-CUR drive a 720p LCD display, and what interface does it use?

Yes, ATSAMA5D42B-CUR drives 720p LCD displays via its integrated LCD TFT controller, which supports 24-bit RGB parallel output (LCDDAT0–23), programmable pixel clock (LCDPCK), and synchronization signals (LCDVSYNC, LCDHSYNC). It provides four hardware overlays, alpha blending, rotation, and gamma correction - enabling rich GUIs without external graphics accelerators.

What low-power modes are available on ATSAMA5D42B-CUR, and how do they affect system operation?

ATSAMA5D42B-CUR offers three software-selectable low-power modes: Idle (CPU halted, all peripherals active at full speed), Ultra-low-power (CPU halted, peripherals clocked at minimum frequency), and Backup (only RTC, backup SRAM, and wakeup logic remain powered). These modes enable sub-mW standby operation while preserving context and enabling fast wake-up - critical for battery-backed industrial gateways and portable HMIs.

ATSAMA5D42B-CUR Specifications

Product attributes: Attribute value

Manufacturer:: Microchip Technology

Package/Case:: 361-TFBGA

Series:: SAMA5D4

Packaging:: Tape & Reel (TR)

Product Status:: Active

Core Processor:: ARM® Cortex®-A5

Number of Cores/Bus Width:: 1 Core, 32-Bit

Speed:: 600MHz

Co-Processors/DSP:: Multimedia; NEON™ SIMD

RAM Controllers:: LPDDR, LPDDR2, DDR2

Graphics Acceleration:: Yes

Display & Interface Controllers:: LCD, Touchscreen

Ethernet:: 10/100Mbps (1)

SATA:: -

USB:: USB 2.0 (3)

Voltage - I/O:: 1.2V, 1.8V, 3.3V

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Security Features:: AES, SHA, TDES, TRNG

Mounting Type:: Surface Mount

Supplier Device Package:: 361-TFBGA (16x16)

Additional Interfaces:: EBI, I2C, MMC/SD/SDIO, SPI, SSC, UART, USART

ATSAMA5D42B-CUR FAQ

1.How can I place an order for ATSAMA5D42B-CUR through Aetrix?

Please submit a Request for Quotation (RFQ) for ATSAMA5D42B-CUR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ATSAMA5D42B-CUR reliable?

The price and inventory of ATSAMA5D42B-CUR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D42B-CUR is usually 5 days.

3.What payment methods are accepted for ATSAMA5D42B-CUR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D42B-CUR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ATSAMA5D42B-CUR?

ATSAMA5D42B-CUR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ATSAMA5D42B-CUR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ATSAMA5D42B-CUR?

For technical support, including ATSAMA5D42B-CUR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D42B-CUR requirements.

6.How does Aetrix verify that ATSAMA5D42B-CUR is sourced from the original manufacturer or authorized distributors?

All ATSAMA5D42B-CUR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D42B-CUR meets industry standards.

7.What is the process for return or replacement of ATSAMA5D42B-CUR?

All ATSAMA5D42B-CUR units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D42B-CUR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ATSAMA5D42B-CUR part is unused and in its original packaging.

Return procedure for ATSAMA5D42B-CUR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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