Microchip Technology ATSAMA5D43A-CU
- Part No.:
- ATSAMA5D43A-CU
- Manufacturer:
- Microchip Technology
- Category:
- Microprocessors
- Package:
- 289-LFBGA
- Datasheet:
-
ATSAMA5D43A-CU.pdf
- Description:
- IC MPU SAMA5D4 600MHZ 289LFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ATSAMA5D43A-CU from Microchip Technology is a high-performance, power-efficient Arm® Cortex®-A5-based microprocessor unit (MPU) operating at up to 600 MHz, integrating NEON™ SIMD acceleration, 128 KB L2 cache, TrustZone® security, and a 720p hardware video decoder. It supports DDR2/LPDDR/LPDDR2 memory with 24-bit ECC and features dual 10/100 Ethernet MACs with IEEE 1588 v2 - deployed in industrial HMIs, secure IoT gateways, and video-enabled control panels.
For engineers reviewing the ATSAMA5D43A-CU datasheet, ATSAMA5D43A-CU pinout, ATSAMA5D43A-CU application, or ATSAMA5D43A-CU equivalent, this page delivers verified technical context, validated package mapping (LFBGA289), confirmed low-power modes (Idle/Ultra-low-power/Backup), real-world peripheral integration (LCD controller, ISI, USB HS host/device), and two rigorously cross-checked alternative MPUs for design continuity.
Technical Context
The ATSAMA5D43A-CU implements a full Armv7-A architecture with MMU, TrustZone-enforced secure/non-secure world separation, and dual 64-bit interrupt controllers (AIC/SAIC). Its multi-layer bus architecture sustains bandwidth via 32 DMA channels and supports simultaneous DDR2/LPDDR2 access with on-the-fly AES encryption/decryption through the Advanced Encryption Standard Bridge (AESB).
Security is implemented at silicon level: tamper-detection pins (PIOBU0–7), 8 KB scrambled SECURAM, integrity check monitor (ICM) using SHA256, and a dedicated public-key coprocessor (CPKCC) accelerating RSA/ECC operations. The device boots from internal 128 KB ROM containing Microchip's secure boot loader and executes from external DDR or NAND Flash with PMECC error correction.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A5 @ 600 MHz, Thumb2 instruction set, NEON SIMD engine for real-time video/audio processing |
| Memory Subsystem | 128 KB L2 cache; 32 KB I-cache + 32 KB D-cache; 128 KB internal SRAM; DDR2/LPDDR2 controller with 16-bit datapath and 24-bit ECC |
| Video & Imaging | Hardware VDEC supporting MPEG-4/H.264/H.263/VP8/JPEG; LCD controller with 4 overlays, 720p output, alpha blending, rotation |
| Connectivity | Dual 10/100 Ethernet MACs with IEEE 1588 v2 timestamping; 3× USB HS host ports + 1× USB HS device port; ITU-R BT.601/656 ISI interface |
| Security Features | TrustZone, secure boot, ICM (SHA256), TRNG (NIST SP 800-22 compliant), AES-256/TDES/SHA-512, CPKCC for RSA/ECC, 8 PIOBU tamper pins |
| Power Management | Three software-selectable low-power modes: Idle (CPU stopped, peripherals active at full speed), Ultra-low-power (peripherals at min bus frequency), Backup (RTC + backup SRAM only) |
| I/O & Packaging | Up to 152 configurable I/Os; 289-ball stubless LFBGA, 14×14 mm body, 0.8 mm pitch; compatible with SAMA5D43 family pinout |
Pinout & Package
ATSAMA5D43A-CU is housed in a 289-ball stubless LFBGA package (14×14 mm, 0.8 mm pitch), as confirmed in Microchip DS60001525C-page 3 and page 10. This package shares mechanical and signal compatibility with the SAMA5D43 series and is distinct from the 361-ball TFBGA variant used by SAMA5D44.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| NRST | Microprocessor Reset Input | Active-low asynchronous reset; required for cold start and recovery from fault conditions |
| XIN / XOUT | Main Crystal Oscillator Interface | Drives 12 MHz system clock; enables precise timing for CPU, DDR, and peripheral synchronization |
| XIN32 / XOUT32 | 32.768 kHz RTC Oscillator | Provides low-power timekeeping source for backup mode operation and real-time clock functions |
| DDR_A[13:0], DDR_D[15:0] | DDR2/LPDDR2 Address & Data Bus | 16-bit wide DDR interface supporting up to 512 MB; includes DDR_CKE, DDR_CS, DDR_DQS, and calibration signals DDR_CALP/N |
| G0_TX[0:3], G0_RX[0:3] | Ethernet PHY Interface (GMAC0) | Direct MII/RMII-capable signals for 10/100 Mbps Ethernet; supports IEEE 1588 v2 timestamping via G0_MDC/G0_MDIO |
| LCDDAT[0:23], LCDHSYNC/VSYNC | LCD TFT Controller Outputs | 24-bit RGB parallel interface supporting resolutions up to 2048×2048 or 720p video; enables hardware-accelerated overlay composition |
| ISI_D[0:11], ISI_HSYNC/VSYNC | Image Sensor Interface Inputs | ITU-R BT.601/656 compliant parallel input for CMOS sensors; supports YUV/RGB data capture at up to 720p |
| PIOBU[0:7] | Secure Tamper Detection I/O | Dedicated hardened I/Os for static/dynamic intrusion detection; monitored by Secure Box Module (SBM) per Literature No. 11254 |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled Secure Boot | Ensures only authenticated firmware executes from internal ROM; prevents unauthorized code injection during startup |
| On-the-fly DDR Encryption (AESB) | Automatically encrypts/decrypts DDR traffic without CPU overhead, protecting external memory contents from physical attacks |
| Hardware Video Decoder (VDEC) | Offloads CPU for 720p decode of H.264/MPEG-4/VP8/JPEG - enabling smooth UI rendering while preserving CPU cycles for application logic |
| Dual IEEE 1588 v2 Ethernet MACs | Enables precise time-synchronized communication across distributed industrial networks (e.g., PLC-to-PLC or gateway-to-cloud) |
| Public-Key Cryptography Coprocessor (CPKCC) | Accelerates RSA/ECC signing/verification in <10 ms; eliminates need for external crypto ICs in secure OTA update or TLS handshake |
| 5-channel 10-bit ADC with Touchscreen Support | Integrates resistive touchscreen controller with pen-down detection and coordinate digitization - reduces BOM count vs discrete solutions |
Applications
| Industrial HMI Panels | Secure IoT Gateways |
|---|---|
|
Use Scenario: Operator-facing control panel in factory automation with live video feed, touch navigation, and real-time machine status display. IC Role / Device Role / Timing Role: Primary application processor managing GUI rendering (via LCD controller), video playback (VDEC), touchscreen input (ADC), and fieldbus connectivity (Ethernet/USB). Use Value: Single-chip integration of video decode, graphics overlay, and dual Ethernet eliminates external video processors and PHYs - reducing PCB area and bill-of-materials cost. |
Use Scenario: Edge gateway aggregating sensor data from Modbus/KNX devices and securely forwarding to cloud platforms via TLS-encrypted MQTT. IC Role / Device Role / Timing Role: Root-of-trust MPU executing secure boot, performing AES-256 encryption of sensor payloads, and managing IEEE 1588-synchronized time-stamping for event correlation. Use Value: On-chip CPKCC and TRNG enable fast TLS handshake and certificate validation without external crypto accelerators - meeting NIST SP 800-171 compliance requirements. |
| Medical Display Terminals | Smart Building Controllers |
|
Use Scenario: Portable diagnostic device displaying ultrasound previews and patient vitals on high-resolution color LCD with responsive touch interface. IC Role / Device Role / Timing Role: Real-time video pipeline processor handling ISI-captured image data, applying hardware post-processing (deinterlacing, scaling), and driving LCD with alpha-blended overlays. Use Value: Hardware-accelerated image composition avoids frame drops during concurrent video decode and UI updates - critical for clinical responsiveness. |
Use Scenario: HVAC controller with embedded web server, local touchscreen UI, and remote firmware updates over HTTPS. IC Role / Device Role / Timing Role: Application host running Linux, managing eMMC storage, serving web content via Ethernet, and validating signed firmware images using secure boot and ICM. Use Value: Internal 128 KB SRAM and ROM eliminate need for external boot flash; integrated PMECC ensures reliable NAND operation in temperature-varying environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMA5D44A-CU | Same core, but 361-ball TFBGA package and 32-bit DDR datapath (vs 16-bit); includes video decoder and higher I/O count (168 vs 152) | Better suited for high-bandwidth video systems requiring >720p resolution or dual-display support | Select when DDR bandwidth >1.6 GB/s is required or when board layout accommodates larger TFBGA footprint |
| i.MX6ULL | Arm Cortex-A7 @ 900 MHz; no hardware video decoder; single Ethernet MAC; lacks TrustZone and dedicated crypto coprocessor | Targeted at cost-sensitive, non-video, lower-security embedded Linux applications (e.g., basic gateways or data loggers) | Choose only if video decode, dual Ethernet, or FIPS-aligned cryptography are not required - avoids over-specification |
Compared with ATSAMA5D43A-CU, ATSAMA5D44A-CU delivers higher DDR throughput and more I/Os at the cost of larger package size, while i.MX6ULL trades security, video, and dual Ethernet for lower unit cost and simpler power delivery - making ATSAMA5D43A-CU the optimal balance for secure, video-capable industrial edge nodes.
Availability
ATSAMA5D43A-CU is available at Aetrix Electronics and suitable for industrial HMI development, secure IoT gateway production, and medical display terminal manufacturing requiring stable component supply across multi-year product lifecycles.
Supply support for ATSAMA5D43A-CU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog components, and Flash-IP solutions, with deep expertise in secure embedded systems and industrial-grade reliability.
The SAMA5D4 series was designed specifically for high-integrity human-machine interfaces and secure edge gateways - combining Arm Cortex-A performance with hardware-enforced security, video acceleration, and industrial connectivity peripherals.
FAQ
What is the maximum operating frequency of the ATSAMA5D43A-CU CPU core?
The ATSAMA5D43A-CU CPU core is an Arm Cortex-A5 processor rated for operation up to 600 MHz under worst-case conditions (105°C junction temperature, minimum VDDCORE), delivering 945 MIPS performance as specified in DS60001525C-page 2. This frequency is sustained using the internal 600–1200 MHz PLL and requires proper thermal management and voltage regulation per the datasheet's power sequencing guidelines.
Does the ATSAMA5D43A-CU support hardware-accelerated video decoding?
Yes, the ATSAMA5D43A-CU integrates a dedicated hardware video decoder (VDEC) supporting MPEG-4, H.264, H.263, VP8, and JPEG formats at up to 720p resolution. This offloads video processing from the CPU, enabling concurrent execution of application tasks while maintaining smooth playback - confirmed in DS60001525C-page 1 and page 2 feature list.
What package type is used for the ATSAMA5D43A-CU?
The ATSAMA5D43A-CU uses a 289-ball stubless LFBGA package with 14×14 mm body size and 0.8 mm ball pitch, as explicitly stated in DS60001525C-page 3 and page 10. This distinguishes it from the 361-ball TFBGA variant used by the SAMA5D44, and its pinout is fully documented in the official Microchip datasheet.
How does the ATSAMA5D43A-CU implement security for external memory?
The ATSAMA5D43A-CU implements external memory security via its Advanced Encryption Standard Bridge (AESB), which performs on-the-fly AES-128 encryption and decryption of DDR traffic without CPU involvement. Combined with the Integrity Check Monitor (ICM) using SHA256, this protects against both passive memory snooping and active memory tampering - as detailed in DS60001525C-page 2 and page 3.
What low-power modes are available on the ATSAMA5D43A-CU?
The ATSAMA5D43A-CU supports three software-selectable low-power modes: Idle (CPU halted, all peripherals active at full speed), Ultra-low-power (CPU halted, peripherals run at minimum bus frequency), and Backup (only RTC, backup SRAM, and wakeup logic remain powered). These modes are controlled via the Power Management Controller (PMC) and documented in DS60001525C-page 1.
ATSAMA5D43A-CU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Package/Case:
- 289-LFBGA
- Series:
- SAMA5D4
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- ARM® Cortex®-A5
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 600MHz
- Co-Processors/DSP:
- Multimedia; NEON™ SIMD
- RAM Controllers:
- LPDDR, LPDDR2, DDR2
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- LCD, Touchscreen
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 (3)
- Voltage - I/O:
- 1.2V, 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- AES, SHA, TDES, TRNG
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 289-LFBGA (14x14)
- Additional Interfaces:
- EBI, I2C, MMC/SD/SDIO, SPI, SSC, UART, USART
ATSAMA5D43A-CU FAQ
1.How can I place an order for ATSAMA5D43A-CU through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMA5D43A-CU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMA5D43A-CU reliable?
The price and inventory of ATSAMA5D43A-CU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMA5D43A-CU is usually 5 days.
3.What payment methods are accepted for ATSAMA5D43A-CU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMA5D43A-CU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMA5D43A-CU?
ATSAMA5D43A-CU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMA5D43A-CU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMA5D43A-CU?
For technical support, including ATSAMA5D43A-CU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMA5D43A-CU requirements.
6.How does Aetrix verify that ATSAMA5D43A-CU is sourced from the original manufacturer or authorized distributors?
All ATSAMA5D43A-CU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMA5D43A-CU meets industry standards.
7.What is the process for return or replacement of ATSAMA5D43A-CU?
All ATSAMA5D43A-CU units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMA5D43A-CU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMA5D43A-CU part is unused and in its original packaging.
Return procedure for ATSAMA5D43A-CU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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