Microchip Technology ATSAMR34J16B-I/7JX
- Part No.:
- ATSAMR34J16B-I/7JX
- Manufacturer:
- Microchip Technology
- Category:
- RF Transceiver ICs
- Package:
- 64-TFBGA
- Datasheet:
-
ATSAMR34J16B-I/7JX.pdf
- Description:
- IC RF TXRX+MCU 802.15.4 64TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ATSAMR34J16B-I/7JX from Microchip Technology is an ultra-low-power System-in-Package (SiP) combining a 32-bit ARM Cortex-M0+ MCU (48 MHz, 2.46 CoreMark/MHz) with integrated LoRa® and FSK sub-GHz transceiver (137–1020 MHz), 64 KB Flash, 8 KB SRAM, and 4 KB low-power SRAM - designed for battery-powered remote sensors and industrial telemetry endpoints.
For engineers reviewing the ATSAMR34J16B-I/7JX datasheet, ATSAMR34J16B-I/7JX pinout, ATSAMR34J16B-I/7JX application, or ATSAMR34J16B-I/7JX equivalent, key selection criteria include tri-band LoRa RF coverage, +20 dBm TX power capability, SleepWalking peripheral wake-up, USB 2.0 interface (SAM R34 variant), and 64-ball 6×6 mm TFBGA package compatibility with industrial temperature range (−40°C to +85°C).
Technical Context
The ATSAMR34J16B-I/7JX integrates a Cortex-M0+ core with dedicated SERCOM4 hardware interface directly connected to the transceiver for LoRa/FSK packet handling, supporting automatic frequency control (AFC), preamble detection, and CRC-verified payloads up to 256 bytes. Its RF subsystem includes dual-path PA (RFO_HF/PA_BOOST) and high-sensitivity receiver (−136 dBm LoRaWAN™, −148 dBm proprietary modes) with 168 dB link budget.
Power management features include four software-selectable sleep modes (Idle, Standby, Backup, Off), hardware-gated power domains, and SleepWalking peripherals that autonomously process sensor data and trigger CPU wake-up only on threshold events - enabling multi-year operation on coin-cell batteries in LPWAN node designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0+, 48 MHz max - delivers deterministic real-time response with 2.46 CoreMark/MHz efficiency for embedded LoRa stack execution. |
| Memory | 64 KB Flash / 8 KB SRAM / 4 KB LP SRAM - sufficient for compact LoRaWAN Class A firmware with retained context during deep sleep. |
| RF Bands | 137–175 MHz, 410–525 MHz, 862–1020 MHz - supports global sub-GHz ISM bands without external band-switching components. |
| TX Output Power | +20 dBm (100 mW) max - enables long-range node deployment compliant with ETSI EN 300 220 and FCC Part 15.247 limits. |
| RX Sensitivity | −136 dBm (LoRaWAN™) / −148 dBm (narrowband) - achieves >160 km urban / >500 km rural link budget in optimal conditions. |
| USB Interface | Full-speed USB 2.0 (12 Mbps) with host/device support - enables field firmware updates via USB dongle or direct PC connection. |
| Package | 64-ball 6×6 mm TFBGA (7JX) - surface-mount SiP with integrated RF matching and antenna interface, reducing BOM count and layout complexity. |
Pinout & Package
ATSAMR34J16B-I/7JX uses a 64-ball 6×6 mm TFBGA (7JX) package with 27 programmable I/O pins, integrated RF front-end (RFO_HF, RFI_HF, PA_BOOST, RXTX), and dedicated power domains (VDDANA, VDDCORE, VSW, VBAT_RF). Pin functions are multiplexed across SERCOM, TC/TCC, ADC, AC, PTC, and USB interfaces per datasheet Figure 4-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RFO_HF | High-frequency RF output | Drives antenna path in 410–525 MHz and 862–1020 MHz bands; requires external matching network per band. |
| RFI_HF | High-frequency RF input | Receives signals in same bands as RFO_HF; shares common RF switch path with RXTX control. |
| PA_BOOST | High-power amplifier enable | Activates +20 dBm output stage; must be asserted before TX and deasserted post-transmission to minimize quiescent current. |
| RXTX | Transmit/receive antenna switch control | Controls internal RF switch polarity to isolate RX/TX paths; synchronized with transceiver state machine. |
| VBAT_RF | RF section battery supply | Independent 1.8–3.6 V rail for RF analog blocks; decoupling critical for phase noise and sensitivity stability. |
| USB_DM / USB_DP | USB 2.0 differential data pair | Full-speed (12 Mbps) interface supporting device enumeration and firmware update without external PHY. |
Key Features
| Feature | Design Value |
|---|---|
| SleepWalking Peripheral Engine | Enables ADC sampling, DMA transfers, or event-triggered wake-up while CPU remains in Standby mode - cuts average system current to µA range in sensor polling cycles. |
| Integrated LoRa Transceiver | Single-die SiP eliminates discrete RF IC, matching network, and crystal oscillator - reduces PCB area by >40% vs. discrete MCU + SX127x solutions. |
| Dual-Path PA Architecture | Separate RFO_HF and PA_BOOST outputs allow optimized efficiency at +13 dBm (high-efficiency) or +20 dBm (long-range) - selectable per regional regulatory requirements. |
| Hardware CRC-32 & Packet Engine | Offloads LoRaWAN MAC layer CRC calculation and 256-byte payload buffering - ensures deterministic timing for Class A uplink/downlink windows. |
| USB Bootloader Support | Enables field firmware upgrades via standard USB cable without JTAG/SWD debug probe - accelerates OTA deployment in distributed sensor networks. |
Applications
| Smart Utility Metering | Industrial Predictive Maintenance |
|---|---|
Use Scenario: Battery-powered water/gas meters transmitting hourly consumption data over 5–15 km to gateway clusters in suburban infrastructure. IC Role / Device Role / Timing Role: Primary SoC executing LoRaWAN stack, managing ultrasonic flow sensing ADC, and scheduling autonomous transmissions using RTC alarm wake-up. Use Value: 10+ year battery life achieved via SleepWalking-triggered ADC reads and Standby-mode packet assembly - eliminating external microcontroller and RF controller. | Use Scenario: Vibration and temperature monitoring nodes on rotating machinery in oil refineries, reporting anomalies every 6 hours via private LoRa network. IC Role / Device Role / Timing Role: Edge AI inference accelerator (via lightweight neural net on Cortex-M0+) with integrated RF for local feature extraction and compressed telemetry upload. Use Value: On-chip 12-bit 1 Msps ADC oversampling (to 16-bit) captures high-fidelity vibration spectra without external signal conditioning - reducing sensor node BOM by 3 components. |
| Agricultural Soil Monitoring | Asset Tracking in Logistics |
Use Scenario: Solar-recharged soil moisture/nitrate sensors deployed across 500-hectare farms, transmitting daily aggregated data to LoRa gateway on barn roof. IC Role / Device Role / Timing Role: Sub-GHz transceiver co-processor managing channel activity detection (CAD), adaptive data rate (ADR), and duty-cycle compliance per regional regulations. Use Value: Tri-band RF coverage allows single hardware SKU for EU (868 MHz), US (915 MHz), and AU (920 MHz) deployments - cutting inventory SKUs by 66%. | Use Scenario: Reusable cargo container trackers logging GPS location and door-open events, transmitting alerts only upon geofence breach or tamper detection. IC Role / Device Role / Timing Role: Event-driven LoRa node using External Interrupt Controller (EIC) to wake from Backup mode on GPIO edge (door switch) or RTC periodic check. Use Value: <1 µA Backup mode current with full SRAM retention enables 5-year operation on primary CR2032 - no battery replacement required during container lifecycle. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LoRa SiP applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMR35J16B-I/7JX | No USB interface; identical RF, memory, and MCU specs; same 64-ball TFBGA package. | Used where firmware updates occur via UART/SPI instead of USB; lower BOM cost due to omitted USB PHY circuitry. | Select when USB is unnecessary and design prioritizes lowest possible BoM cost and RF-only functionality. |
| STM32WL55JC | ARM Cortex-M4 core (48 MHz), 256 KB Flash, dual-core LoRa/FSK transceiver, QFN48 package (7×7 mm), no integrated USB. | Higher compute headroom for complex edge processing; smaller footprint but requires external RF matching; lacks SleepWalking peripheral automation. | Select when application demands floating-point math or concurrent protocol stacks (LoRa + BLE), and layout space is constrained. |
Compared with ATSAMR34J16B-I/7JX, ATSAMR35J16B-I/7JX removes USB but retains identical RF performance and power architecture, while STM32WL55JC trades SleepWalking automation and USB convenience for higher CPU performance and smaller package - making each suitable for distinct trade-offs between firmware update flexibility, peripheral autonomy, and computational load.
Availability
ATSAMR34J16B-I/7JX is available at Aetrix Electronics and suitable for smart metering, industrial telemetry, agricultural IoT, and asset tracking applications requiring stable component supply across multi-year production cycles.
Supply support for ATSAMR34J16B-I/7JX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog devices, and secure authentication ICs, with emphasis on industrial, automotive, and IoT markets.
The SAM R34 family was designed specifically as a certified LoRa SiP solution targeting ultra-low-power, regulatory-compliant sub-GHz wireless nodes - integrating RF, MCU, and power management into a single validated package.
FAQ
What is the maximum transmit power supported by the ATSAMR34J16B-I/7JX?
The ATSAMR34J16B-I/7JX supports up to +20 dBm (100 mW) output power in high-power mode when VDDANA exceeds 2.4 VDC. This is achieved using the PA_BOOST path and complies with ETSI EN 300 220 and FCC Part 15.247 limits in applicable bands. Lower-power modes (+17 dBm regulated, +13 dBm high-efficiency) are also available for optimized battery life.
Does the ATSAMR34J16B-I/7JX include a USB interface?
Yes, the ATSAMR34J16B-I/7JX includes a full-speed USB 2.0 interface (12 Mbps) with embedded host and device functionality, eight endpoints, and integrated USB PHY - enabling direct firmware updates, virtual COM port communication, and USB dongle implementations without external transceivers.
What RF frequency bands does the ATSAMR34J16B-I/7JX support?
The ATSAMR34J16B-I/7JX supports three licensed and license-exempt sub-GHz bands: 137–175 MHz, 410–525 MHz, and 862–1020 MHz. Band selection is configured in firmware and validated per regional regulatory requirements; no hardware modification is needed to support EU (868 MHz), US (915 MHz), or AS (920 MHz) deployments.
How does SleepWalking work on the ATSAMR34J16B-I/7JX?
SleepWalking on the ATSAMR34J16B-I/7JX allows peripherals like the ADC, DMAC, or event system to operate autonomously in Standby mode - triggering wake-up only when predefined conditions occur (e.g., threshold crossing, conversion complete). This eliminates continuous CPU polling and reduces average current to sub-µA levels in sensor applications.
Is the ATSAMR34J16B-I/7JX pin-compatible with other SAM R34/R35 variants?
Yes, all SAM R34 and SAM R35 devices share the identical 64-ball 6×6 mm TFBGA (7JX) package and pinout - including ATSAMR34J16B-I/7JX, ATSAMR34J17B-I/7JX, and ATSAMR35J18B-I/7JX. This enables hardware reuse across Flash/SRAM variants and R34/R35 families, simplifying platform scalability and migration.
ATSAMR34J16B-I/7JX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 64-TFBGA
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- TxRx + MCU
- RF Family/Standard:
- 802.15.4
- Protocol:
- LoRa™
- Modulation:
- FSK, GFSK, GMSK, MSK, OOK
- Frequency:
- 137MHz ~ 175MHz, 410MHz ~ 525MHz, 862MHz ~ 1.02GHz
- Data Rate (Max):
- -
- Power - Output:
- 20dBm
- Sensitivity:
- -148dBm
- Memory Size:
- 64kB Flash, 8kB SRAM
- Serial Interfaces:
- I2S, SPI, USART, USB
- GPIO:
- 27
- Voltage - Supply:
- 1.8V ~ 3.63V
- Current - Receiving:
- 14.8mA ~ 15.8mA
- Current - Transmitting:
- 32.5mA ~ 94.5mA
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 64-TFBGA (6x6)
ATSAMR34J16B-I/7JX FAQ
1.How can I place an order for ATSAMR34J16B-I/7JX through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMR34J16B-I/7JX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMR34J16B-I/7JX reliable?
The price and inventory of ATSAMR34J16B-I/7JX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMR34J16B-I/7JX is usually 5 days.
3.What payment methods are accepted for ATSAMR34J16B-I/7JX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMR34J16B-I/7JX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMR34J16B-I/7JX?
ATSAMR34J16B-I/7JX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMR34J16B-I/7JX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMR34J16B-I/7JX?
For technical support, including ATSAMR34J16B-I/7JX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMR34J16B-I/7JX requirements.
6.How does Aetrix verify that ATSAMR34J16B-I/7JX is sourced from the original manufacturer or authorized distributors?
All ATSAMR34J16B-I/7JX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMR34J16B-I/7JX meets industry standards.
7.What is the process for return or replacement of ATSAMR34J16B-I/7JX?
All ATSAMR34J16B-I/7JX units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMR34J16B-I/7JX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMR34J16B-I/7JX part is unused and in its original packaging.
Return procedure for ATSAMR34J16B-I/7JX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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