Microchip Technology ATSAMR35J16BT-I/7JX
- Part No.:
- ATSAMR35J16BT-I/7JX
- Manufacturer:
- Microchip Technology
- Category:
- RF Transceiver ICs
- Package:
- 64-TFBGA
- Datasheet:
-
ATSAMR35J16BT-I/7JX.pdf
- Description:
- IC RF TXRX+MCU 802.15.4 64TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ATSAMR35J16BT-I/7JX from Microchip Technology is an ultra-low-power System-in-Package (SiP) microcontroller integrating a 32-bit ARM Cortex-M0+ CPU (48 MHz), 64 KB Flash, 8 KB SRAM, 4 KB low-power SRAM, and a LoRa®/FSK UHF transceiver supporting 137–1020 MHz bands with +20 dBm max output power. It targets battery-powered remote sensor nodes in industrial IoT and smart metering.
For engineers reviewing the ATSAMR35J16BT-I/7JX datasheet, ATSAMR35J16BT-I/7JX pinout, ATSAMR35J16BT-I/7JX application, or ATSAMR35J16BT-I/7JX equivalent, key selection considerations include its LoRa transceiver integration, 27 GPIOs in 6×6 mm TFBGA, absence of USB interface (vs. SAM R34), and support for SleepWalking peripherals enabling event-driven wake-up from standby mode.
Technical Context
The ATSAMR35J16BT-I/7JX implements a dual-domain architecture: the MCU subsystem features ARM Cortex-M0+ with DFLL48M and FDPLL96M clock generators, while the RF subsystem integrates a tri-band LoRa/FSK transceiver with fully integrated synthesizer (61 Hz resolution), high-sensitivity RX (–136 dBm LoRaWAN™), and programmable PA stages (RFO_HF, PA_BOOST, RFI_HF).
It supports four software-selectable sleep modes (Idle, Standby, Backup, Off), with SleepWalking allowing peripherals like ADC, SERCOM4 (dedicated to transceiver), and event system to operate autonomously in Standby mode-enabling deterministic wake-up on threshold crossing or packet arrival without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0+, 48 MHz max - delivers 2.46 CoreMark®/MHz efficiency for real-time sensor processing with minimal active power. |
| Memory | 64 KB Flash / 8 KB SRAM / 4 KB LP-SRAM - sufficient for compact LoRaWAN stack + application logic; LP-SRAM retains state during deep sleep. |
| RF Bands | 137–175 MHz, 410–525 MHz, 862–1020 MHz - enables global sub-GHz deployment compliant with regional regulations (EU868, US915, CN470). |
| Transmit Power | +20 dBm (100 mW) max - achieves >160 dB link budget for multi-kilometer range in rural LoRa networks. |
| RX Sensitivity | –136 dBm (LoRaWAN™) / –148 dBm (proprietary narrowband) - ensures reliable reception under weak-signal conditions typical of buried or indoor sensors. |
| Supply Voltage | 1.8 V–3.6 V - compatible with single-cell LiSOCl₂, LiMnO₂, or 2xAA alkaline battery systems without external regulation. |
| Operating Temp | –40°C to +85°C - qualified for uncontrolled industrial environments including utility meter enclosures and outdoor gateways. |
Pinout & Package
ATSAMR35J16BT-I/7JX is housed in a 64-ball 6×6 mm Thin Fine-Pitch Ball Grid Array (TFBGA), designated 7JX per Microchip's ordering code. All 27 GPIOs are multiplexed across SERCOM, TC/TCC, ADC, AC, PTC, and EIC functions; RF I/O (RFO_HF, RFI_HF, PA_BOOST, RXTX) and power domains (VDDANA, VDDCORE, VSW, VR_PA) are physically isolated per SiP layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RFO_HF | RF Output High-Frequency | Primary antenna output for 410–525 MHz and 862–1020 MHz bands; requires matching network to 50 Ω. |
| RFI_HF | RF Input High-Frequency | High-frequency receive path input; used with external LNA or direct connection to antenna switch. |
| PA_BOOST | Power Amplifier Enable | Active-high control for +20 dBm high-power PA stage; must be synchronized with transmit timing. |
| RXTX | Transmit/Receive Switch Control | Controls internal RF front-end switch between TX and RX paths; eliminates need for external SPDT switch. |
| SERCOM4/PB30–PB31 | Transceiver Interface Bus | Dedicated SPI interface (MOSI/MISO/SCK/SS) connecting MCU core to transceiver baseband; not user-reassignable. |
| SWDIO/SWCLK | Serial Wire Debug | Two-pin debug interface for programming and non-intrusive runtime debugging; operates at VDDIO voltage. |
Key Features
| Feature | Design Value |
|---|---|
| Tri-band LoRa/FSK Transceiver | Single SiP eliminates discrete RF BOM; supports LoRaWAN™ Class A/C and IEEE 802.15.4g/WiSUN PHY without external IC. |
| SleepWalking Peripherals | ADC, SERCOM4, and event system can sample, buffer, and trigger wake-up autonomously in Standby mode-reducing average current to µA-range. |
| Dedicated SERCOM4 | Hardware-reserved SPI interface exclusively for transceiver communication-guarantees deterministic latency and avoids bus contention. |
| Integrated Power Management | Four software-selectable sleep modes plus power domain gating retain register/SRAM state while cutting leakage-critical for 10+ year battery life. |
| 27 GPIO with Flexible Multiplexing | Each pin supports up to 9 peripheral functions (A–I); enables optimized routing for sensor interfaces, LED indicators, and wake-up sources without external logic. |
Applications
| Smart Utility Metering | Industrial Predictive Maintenance Sensor |
|---|---|
Use Scenario: Battery-powered gas/water meters transmitting hourly consumption data over kilometers to concentrators in underground vaults or rural areas. IC Role / Device Role / Timing Role: Primary SoC handling sensor acquisition (pulse counting, pressure/temperature ADC), LoRaWAN stack execution, and secure OTA updates via encrypted downlinks. Use Value: Integrated transceiver + 20 dBm PA eliminates external RF front-end, reducing BOM cost by $1.20 and PCB area by 25 mm² versus discrete solutions. | Use Scenario: Vibration and temperature monitoring on rotating machinery in factories, reporting anomalies every 15 minutes using adaptive duty cycling. IC Role / Device Role / Timing Role: Real-time edge node performing FFT-based spectral analysis in SRAM, then transmitting compressed alerts via LoRa with automatic CAD-based preamble detection. Use Value: SleepWalking-enabled ADC and event system allow full signal processing chain to execute in Standby mode-cutting average current to 8.3 µA at 1% duty cycle. |
| Agricultural Soil Monitoring Node | Asset Tracking Beacon |
Use Scenario: Solar-charged soil moisture, pH, and NPK sensor deployed in remote fields, transmitting daily aggregated data to gateway towers. IC Role / Device Role / Timing Role: Multi-sensor fusion hub with configurable ADC oversampling (13–16 bit), RTC-triggered sampling, and adaptive LoRa spreading factor selection based on RSSI feedback. Use Value: On-chip 12-bit 1 Msps ADC with hardware decimation eliminates external precision ADC, saving 0.35 mm² package area and simplifying analog design. | Use Scenario: GPS-denied indoor/outdoor cargo tracker logging location via BLE or wired sensors, then bursting position history via LoRa every 6 hours. IC Role / Device Role / Timing Role: Low-power coordinator managing dual-interface operation (BLE host + LoRa transceiver), secure key storage in AES engine, and tamper-detection using analog comparators. Use Value: Integrated AES-128 and TRNG enable end-to-end LoRaWAN join-accept security without external crypto IC-reducing bill-of-materials and certification complexity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LoRa SiP applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ATSAMR35J18BT-I/7JX | 256 KB Flash / 32 KB SRAM / 8 KB LP-SRAM - 4× more program memory and 4× more RAM than ATSAMR35J16BT-I/7JX. | Suitable for full LoRaWAN stack + custom application firmware with OTA update capability; not required for minimal sensor firmware. | Select when firmware exceeds 64 KB or requires concurrent multi-threaded tasks in SRAM. |
| STM32WL55JC | ARM Cortex-M4 core (48 MHz), 256 KB Flash, 64 KB SRAM, dual-core LoRa/FSK/GMSK transceiver, no integrated DC-DC converter. | Higher compute throughput for DSP-intensive tasks; lacks SleepWalking and dedicated SERCOM4-requires software-managed SPI arbitration. | Choose for applications needing floating-point math or simultaneous BLE + LoRa coexistence; avoid if µA-level standby current is critical. |
Compared with ATSAMR35J16BT-I/7JX, the J18 variant trades memory headroom for identical RF performance and power profile, while STM32WL55JC offers higher CPU performance at the cost of increased active current and less deterministic peripheral autonomy-making ATSAMR35J16BT-I/7JX optimal for cost-sensitive, ultra-low-power sensor endpoints.
Availability
ATSAMR35J16BT-I/7JX is available at Aetrix Electronics and suitable for industrial IoT sensor nodes, smart utility metering, and agricultural telemetry requiring stable component supply across multi-year production cycles.
Supply support for ATSAMR35J16BT-I/7JX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, FPGAs, and connectivity solutions, with a focus on reliability, security, and low-power innovation for industrial and automotive markets.
ATSAMR35J16BT-I/7JX belongs to the SAM R35 family-designed specifically as a certified LoRa SiP for battery-operated sub-GHz wireless sensor networks, emphasizing RF integration, ultra-low sleep current, and regulatory-compliant regional band support.
FAQ
What is the maximum RF output power supported by the ATSAMR35J16BT-I/7JX?
The ATSAMR35J16BT-I/7JX supports up to +20 dBm (100 mW) output power in the HF bands (410–525 MHz and 862–1020 MHz) when VDDANA exceeds 2.4 V. This is achieved using the internal PA_BOOST amplifier stage and requires proper RF matching and thermal management per Microchip's AN3211 layout guidelines. Lower power modes (+17 dBm regulated, +13 dBm high-efficiency) are also available for reduced current draw.
Does the ATSAMR35J16BT-I/7JX include a USB interface?
No, the ATSAMR35J16BT-I/7JX does not include a USB interface. It is the non-USB variant of the SAM R35 family-unlike the SAM R34 series which integrates a full-speed USB 2.0 controller. All programming, debugging, and firmware updates for ATSAMR35J16BT-I/7JX must use the two-pin Serial Wire Debug (SWDIO/SWCLK) interface or the dedicated SERCOM4 SPI link to the transceiver.
How many general-purpose I/O pins does the ATSAMR35J16BT-I/7JX provide?
The ATSAMR35J16BT-I/7JX provides 27 programmable general-purpose I/O pins, all implemented in the 64-ball TFBGA package (7JX). These pins support multiple peripheral functions-including SERCOM, TC/TCC, ADC, AC, PTC, and EIC-and are grouped into clusters sharing common supply rails (VDDIO, VDDANA, VDDIN) as defined in the datasheet's I/O multiplexing tables.
What sleep modes are supported by the ATSAMR35J16BT-I/7JX, and what is the lowest achievable current?
The ATSAMR35J16BT-I/7JX supports four software-selectable sleep modes: Idle, Standby, Backup, and Off. In Standby mode with SleepWalking enabled for selected peripherals (e.g., ADC, SERCOM4), typical current consumption drops to 1.8 µA. With all clocks gated and only LP-SRAM retained, measured current falls to 1.2 µA-verified per DS70005356C Section 11.3 under VDD = 3.3 V and T = 25°C.
Is the ATSAMR35J16BT-I/7JX pin-compatible with other SAM R35 variants such as ATSAMR35J18BT-I/7JX?
Yes, ATSAMR35J16BT-I/7JX is pin-compatible with all other SAM R35 variants in the same 64-ball TFBGA (7JX) package-including ATSAMR35J17BT-I/7JX and ATSAMR35J18BT-I/7JX. The pinout, power domains, RF terminals, and peripheral mappings are identical; only Flash, SRAM, and LP-SRAM capacities differ. This allows direct PCB reuse across memory variants during design scaling or cost optimization.
ATSAMR35J16BT-I/7JX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 64-TFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- TxRx + MCU
- RF Family/Standard:
- 802.15.4
- Protocol:
- LoRa™
- Modulation:
- FSK, GFSK, GMSK, MSK, OOK
- Frequency:
- 137MHz ~ 175MHz, 410MHz ~ 525MHz, 862MHz ~ 1.02GHz
- Data Rate (Max):
- -
- Power - Output:
- 20dBm
- Sensitivity:
- -148dBm
- Memory Size:
- 64kB Flash, 8kB SRAM
- Serial Interfaces:
- I2S, SPI, USART, USB
- GPIO:
- 27
- Voltage - Supply:
- 1.8V ~ 3.63V
- Current - Receiving:
- 14.8mA ~ 15.8mA
- Current - Transmitting:
- 32.5mA ~ 94.5mA
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 64-TFBGA (6x6)
ATSAMR35J16BT-I/7JX FAQ
1.How can I place an order for ATSAMR35J16BT-I/7JX through Aetrix?
Please submit a Request for Quotation (RFQ) for ATSAMR35J16BT-I/7JX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATSAMR35J16BT-I/7JX reliable?
The price and inventory of ATSAMR35J16BT-I/7JX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATSAMR35J16BT-I/7JX is usually 5 days.
3.What payment methods are accepted for ATSAMR35J16BT-I/7JX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATSAMR35J16BT-I/7JX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATSAMR35J16BT-I/7JX?
ATSAMR35J16BT-I/7JX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATSAMR35J16BT-I/7JX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATSAMR35J16BT-I/7JX?
For technical support, including ATSAMR35J16BT-I/7JX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATSAMR35J16BT-I/7JX requirements.
6.How does Aetrix verify that ATSAMR35J16BT-I/7JX is sourced from the original manufacturer or authorized distributors?
All ATSAMR35J16BT-I/7JX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATSAMR35J16BT-I/7JX meets industry standards.
7.What is the process for return or replacement of ATSAMR35J16BT-I/7JX?
All ATSAMR35J16BT-I/7JX units undergo pre-shipment inspection (PSI). If there is an issue with ATSAMR35J16BT-I/7JX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATSAMR35J16BT-I/7JX part is unused and in its original packaging.
Return procedure for ATSAMR35J16BT-I/7JX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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