Microchip Technology ATSTK600-RC09

Overview

ATSTK600-RC09 from Microchip Technology (formerly Atmel) is a production-ready evaluation and development kit for the AT32UC3L064/032/016 family of 32-bit AVR UC microcontrollers. It provides full hardware access to all I/O, debug interfaces (JTAG/aWire), power domains (VDDCORE/VDDIO/VDDANA), and peripheral subsystems including PWM, ADC, TWI, USART, SPI, capacitive touch (CAT), and real-time clock (AST). Designed for low-power embedded applications requiring secure firmware execution, capacitive touch UI, and multi-channel timing control - such as battery-powered industrial sensors and smart home HMI modules.

For engineers reviewing the ATSTK600-RC09 datasheet, ATSTK600-RC09 pinout, ATSTK600-RC09 application, or ATSTK600-RC09 equivalent, this page delivers verified hardware configuration details, supported target MCU variants (AT32UC3L064/032/016), debug interface mapping (JTAG + aWire), power domain routing, and validated peripheral bring-up paths - enabling rapid prototyping of ultra-low-power (165 µA/MHz active, 9 nA standby) 32-bit AVR UC designs with QTouch® capacitive sensing and secure FlashVault™ libraries.

Technical Context

The ATSTK600-RC09 implements a modular, socketed target board architecture compatible with the AT32UC3L series in 48-pin TQFP/QFN/TLLGA packages. It integrates dedicated voltage regulation (1.62–3.6 V input → 1.8 V VDDCORE, 3.3 V VDDIO, 1.8 V VDDANA), configurable oscillator support (32 kHz crystal, 3–16 MHz main crystal, DFLL tuning), and direct-access debug headers for JTAG Class 2+ and single-pin aWire trace. All 36 GPIO pins are routed to expansion headers with per-pin power/ground isolation and configurable pull-ups.

Hardware features include on-board USB-to-serial bridge (FTDI), programmable reset/sleep/wake controls, LED indicators for power and status, and jumper-selectable peripheral enable/disable (e.g., CAT module, AST, WDT). The board supports SleepWalking™ peripheral event wake-up, secure MPU/SAU memory partitioning verification, and FlashVault™ library execution testing via pre-programmed secure boot sequences.

Key Specifications

Availability

ATSTK600-RC09 is available at Aetrix Electronics and suitable for low-power embedded development, capacitive touch UI prototyping, and secure firmware validation requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial OEMs and IoT device manufacturers.

Supply support for ATSTK600-RC09 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology acquired Atmel in 2016 and maintains full technical support, documentation, and toolchain compatibility for the AVR32 UC product line, including legacy AT32UC3L devices and associated development kits.

The ATSTK600-RC09 belongs to Microchip's AVR STK600 ecosystem - designed specifically to accelerate evaluation and firmware development for ultra-low-power 32-bit AVR UC microcontrollers targeting battery-operated HMI, sensor edge nodes, and secure embedded control applications.

FAQ

What MCU variants does the ATSTK600-RC09 officially support?

The ATSTK600-RC09 is qualified for the AT32UC3L064, AT32UC3L032, and AT32UC3L016 microcontrollers in 48-pin TQFP, QFN, and TLLGA packages. All three variants share identical pinouts, power domains, and peripheral mappings - enabling seamless firmware portability across flash sizes (16 KB to 64 KB) and SRAM configurations (8 KB to 16 KB) without hardware modification. The ATSTK600-RC09 board itself contains no MCU; it serves exclusively as a carrier and interface platform for these target devices.

Does the ATSTK600-RC09 support both JTAG and aWire debugging simultaneously?

No - the ATSTK600-RC09 supports JTAG and aWire debugging, but not simultaneously. JTAG uses dedicated pins (PA00/TCK, PA01/TMS, PA02/TDO, PA03/TDI), while aWire shares the RESET_N pin for bidirectional communication. When aWire is enabled, the RESET_N pin is reserved for debug traffic and cannot be used for system reset assertion. Switching between interfaces requires firmware reconfiguration and may involve jumper settings or bootloader mode selection depending on the target AT32UC3L device state.

Can the ATSTK600-RC09 be used to validate FlashVault™ secure library execution?

Yes - the ATSTK600-RC09 enables full validation of FlashVault™ functionality on AT32UC3L target MCUs. It provides direct access to the secure boot sequence, MPU/SAU configuration registers, and secure/non-secure memory regions via JTAG or aWire. Engineers can load pre-encrypted secure libraries into protected Flash sectors, configure SAU regions to restrict non-secure code access, and verify runtime execution integrity using NanoTrace trace data captured through the board's debug headers.

How is the capacitive touch (CAT) module tested on the ATSTK600-RC09?

The ATSTK600-RC09 routes all CAT signals - CSA[16:0], CSB[16:0], SMP, SYNC, DIS, and VDIVEN - to dedicated test points and expansion headers. It supports QTouch Library v5.x firmware validation using external PCB-mounted touch electrodes or off-board QMatrix® sensor arrays. The board includes configurable discharge current control (DIS) and voltage divider enable (VDIVEN) paths, allowing precise tuning of sensitivity and noise immunity during touch acquisition - critical for robust operation in noisy industrial environments.

What power management features can be evaluated using the ATSTK600-RC09?

The ATSTK600-RC09 enables hands-on evaluation of all AT32UC3L power management features: SleepWalking™ peripheral wake-up (via AST, EIC, or peripheral events), dynamic voltage scaling (VDDCORE adjustment), multiple sleep modes (IDLE, STANDBY, BACKUP), and ultra-low-leakage states (9 nA retention with backup registers). On-board current measurement test points allow direct µA-level monitoring of active and sleep currents, while jumper-controlled oscillator gating validates DFLL, RCSYS, and RC32K power trade-offs under real firmware control.