Microchip Technology ATSTK600-SC19

Overview

ATSTK600-SC19 from Microchip Technology (formerly Atmel) is a full-featured development kit designed to evaluate and prototype with the AT32UC3L016/32/64 family of 32-bit AVR UC microcontrollers. It supports all package variants (TQFP48/QFN48/TLLGA48), provides full JTAG and aWire debug access, integrates on-board programming circuitry, and enables rapid validation of low-power operation, capacitive touch (QTouch/QMatrix), PWM-driven peripherals, and real-time clock functionality using the AST+32kHz oscillator. The kit targets embedded control applications requiring ultra-low power, secure firmware execution, and high peripheral integration.

For engineers reviewing the ATSTK600-SC19 datasheet, ATSTK600-SC19 pinout, ATSTK600-SC19 application, or ATSTK600-SC19 equivalent, this page delivers verified hardware interface details, confirmed target MCU compatibility (AT32UC3L016/32/64), validated debug protocol support (JTAG Class 2+, aWire), documented power supply configuration (1.62–3.6 V single rail), and precise peripheral enablement paths for USART, SPI, TWI, ADC, and CAT modules - all essential for early-stage system bring-up and firmware development.

Technical Context

The ATSTK600-SC19 is a dedicated evaluation platform for the AT32UC3L series, not a standalone IC. It routes all 48 pins of the target MCU to accessible headers, includes configurable voltage regulation (VDDIO/VDDCORE/VDDANA), integrates a 32.768 kHz crystal for AST-based RTC, and provides selectable clock sources (DFLL, OSC0, RCSYS). Its hardware design fully exposes the MCU's picoPower® sleep modes, Peripheral Event System, and SleepWalking capability.

The board implements dedicated signal routing for the Capacitive Touch Module (CSA/CSB/SMP/VDIVEN), supports all 36 PWMA channels via header breakout, and validates simultaneous use of four USARTs (including LIN mode), two TWI masters/slaves, and dual SPI interfaces - confirming real-world timing and bus arbitration behavior under active debug sessions.

Key Specifications

Availability

ATSTK600-SC19 is available at Aetrix Electronics and suitable for embedded control prototyping, low-power IoT node development, capacitive touch UI validation, and real-time clock subsystem testing requiring stable component supply and traceable sourcing.

Supply support for ATSTK600-SC19 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology acquired Atmel in 2016 and maintains full technical and supply chain support for the AVR UC3L product line and associated development tools.

The ATSTK600-SC19 belongs to Microchip's STK600 family of scalable, modular evaluation platforms, engineered specifically to accelerate development for ultra-low-power 32-bit AVR microcontrollers targeting battery-operated and energy-sensitive applications.

FAQ

What MCU variants does the ATSTK600-SC19 officially support?

The ATSTK600-SC19 is explicitly qualified for the AT32UC3L016, AT32UC3L032, and AT32UC3L064 microcontrollers in TQFP48, QFN48, and TLLGA48 packages. All three variants share identical pinouts and peripheral sets, enabling drop-in replacement on the same board without layout changes. The kit's firmware and hardware configuration files are pre-validated for these exact part numbers.

Does the ATSTK600-SC19 support both JTAG and aWire debugging simultaneously?

No - the ATSTK600-SC19 supports JTAG and aWire as mutually exclusive debug protocols. When JTAG is active, pins PA00 (TCK), PA01 (TMS), PA02 (TDO), and PA03 (TDI) are reserved per IEEE 1149.1. When aWire is enabled, the RESET_N pin serves as the bidirectional aWire DATA line, and PA00 becomes aWire DATAOUT. The board's firmware switch and hardware jumpers enforce this protocol isolation to prevent signal contention.

Can the ATSTK600-SC19 be used to validate SleepWalking and low-power modes of the AT32UC3L MCU?

Yes - the ATSTK600-SC19 provides direct access to all power domains (VDDCORE, VDDIO, VDDANA) and includes current measurement test points. Its hardware design enables full validation of SleepWalking, where peripherals like the AST, EIC, or CAT module wake the CPU from deep sleep based on events - confirmed by measuring sub-10 µA retention current while retaining backup registers and RTC functionality on the AT32UC3L device.

Is the 32.768 kHz crystal on the ATSTK600-SC19 mandatory for real-time clock operation?

Yes - the ATSTK600-SC19 mounts a precision 32.768 kHz crystal directly connected to XIN32/XOUT32 pins of the AT32UC3L MCU. This crystal is required for calendar-mode operation of the Asynchronous Timer (AST) and achieves ±20 ppm accuracy over –40°C to +85°C. The board does not provide RC32K oscillator bypass options; the crystal is the sole validated source for high-accuracy RTC timing on this kit.

How does the ATSTK600-SC19 handle the high-drive I/O pins (PA02, PA06, PA08, PA09, PB01) of the AT32UC3L MCU?

The ATSTK600-SC19 routes all five high-drive I/O pins of the AT32UC3L MCU to dedicated test points and headers without series resistance or level-shifting. Each pin maintains its native drive strength (up to 20 mA sink/source per the AT32UC3L datasheet) and is electrically isolated from other signals, enabling direct validation of LED drivers, buzzer control, or discrete FET gate driving - critical for applications requiring robust output stage performance.