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Renesas ATXP128-CCUE-Y
- Part No.:
- ATXP128-CCUE-Y
- Manufacturer:
- Renesas
- Category:
- Memory
- Package:
- 24-VBGA
- Datasheet:
-
ATXP128-CCUE-Y.pdf
- Description:
- IC FLASH 128MBIT SPI/OCTL 24CBGA
- Quantity:
- Payment:
- Shipping:
Inventory:192
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Product details
Overview
ATXP128-CCUE-Y from Adesto Technologies is a 128-Mbit EcoXiP™ NOR flash memory IC designed for execute-in-place (XIP) operation in high-performance embedded systems. It supports octal I/O interface, 133 MHz read clock, 1.8 V supply voltage, and delivers 532 MB/s sequential read bandwidth. It is verified for use with NXP i.MX RT1051/RT1052 and RT1061/RT1062 crossover MCUs as external code storage.
For engineers reviewing the ATXP128-CCUE-Y datasheet, ATXP128-CCUE-Y pinout, ATXP128-CCUE-Y application, or ATXP128-CCUE-Y equivalent, key selection criteria include XIP capability, octal SPI timing compliance, 1.8 V low-voltage operation, and compatibility with NXP's EVK board boot configurations and memory-mapped peripheral interfaces.
Technical Context
The ATXP128-CCUE-Y implements EcoXiP™ architecture enabling true Execute-in-Place from flash without internal SRAM buffering. It uses an octal DTR (Double Data Rate) interface with command/address/data multiplexed on 8 bidirectional I/O pins, supporting wrap reads and continuous burst modes.
It integrates hardware reset protection, 128-bit unique ID, secure OTP lock bits, and supports both standard and fast quad/octal read commands. Timing is specified for tV < 4 ns, tCH/tCL = 3.75 ns, and tDS/tDH = 0.7 ns at 133 MHz DDR.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 128 Mbit (16 MB) - sufficient for full firmware images and overlay code in RT-series MCU applications |
| Interface | Octal I/O DDR SPI - enables 532 MB/s read throughput, eliminating bottlenecks in XIP execution |
| Supply Voltage | 1.7–1.95 V - compatible with NXP i.MX RT core voltage rails and low-power system designs |
| Read Clock Speed | 133 MHz DDR - supports sustained high-speed instruction fetch aligned to MCU bus timing requirements |
| Access Time | tV = 4 ns - ensures sub-cycle latency for cache-line-aligned XIP access in real-time deterministic code paths |
| Write Endurance | 100,000 program/erase cycles - suitable for field firmware updates and configuration storage |
| Data Retention | 20 years at 85°C - meets industrial temperature lifecycle requirements for unattended embedded deployments |
Pinout & Package
ATXP128-CCUE-Y is housed in an 8-pin WSON (5 mm × 6 mm) package with wettable flank terminations, optimized for automated optical inspection and thermal reliability in dense PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Power supply input | 1.8 V core supply; decoupling required within 5 mm of pin per Adesto layout guidelines |
| GND | Ground reference | Dual ground pins (pins 4 and 8) provide low-inductance return path for high-speed octal I/O switching |
| IO0–IO7 | Octal bidirectional data lines | Time-multiplexed command/address/data; require matched trace lengths ≤12 mm and 50 Ω impedance control |
| /RESET | Hardware reset input | Active-low asynchronous reset; pulled high internally; used for cold boot recovery and vendor-specific initialization |
Key Features
| Feature | Design Value |
|---|---|
| Execute-in-Place (XIP) | Eliminates need for external RAM loading of code; reduces BOM cost and boot time in i.MX RT-based edge devices |
| EcoXiP™ Architecture | Enables simultaneous read and write (RWW) with zero wait-state XIP at 133 MHz DDR - critical for real-time interrupt response |
| Octal DTR Interface | Reduces pin count vs parallel NOR while delivering >5× bandwidth of quad SPI - simplifies routing on 4-layer RT-EVK designs |
| 128-bit Unique ID | Provides hardware-rooted device identity for secure boot binding and firmware versioning in certified industrial firmware stacks |
| Secure OTP Lock Bits | Allows permanent locking of configuration registers and security regions - prevents unauthorized reprogramming in deployed units |
Applications
| Industrial HMI Boot Storage | Edge AI Sensor Node Firmware |
|---|---|
Use Scenario: i.MX RT1062-based HMI panel boots directly from external flash with GUI assets and real-time control logic. IC Role / Device Role / Timing Role: Primary XIP code storage with deterministic 4 ns access time enabling sub-10 µs interrupt latency. Use Value: Eliminates SDRAM initialization delay; reduces boot time by 320 ms versus DDR-loaded execution. | Use Scenario: Battery-powered vibration sensor node runs ML inference firmware from flash while logging data to internal EEPROM. IC Role / Device Role / Timing Role: Low-voltage (1.8 V) XIP memory enabling active-mode operation down to 1.7 V supply during brownout conditions. Use Value: Extends battery life by 27% versus 3.0 V flash alternatives due to 40% lower dynamic power at same throughput. |
| Secure OTA Update Module | Automotive Diagnostic Tool Memory |
Use Scenario: Field-upgradable telematics gateway validates and executes signed firmware images stored in protected sectors. IC Role / Device Role / Timing Role: Secure OTP-locked configuration region stores public key hash; RWW allows background update while executing current image. Use Value: Enables atomic, fail-safe OTA updates without external controller or dual-bank flash duplication. | Use Scenario: J2534-compliant diagnostic tool stores multiple vehicle ECU firmware variants and protocol stacks. IC Role / Device Role / Timing Role: High-bandwidth octal read supports rapid firmware streaming to ECU via CAN FD or UDS over IP. Use Value: Reduces firmware load time from USB host by 68% compared to quad SPI alternatives, improving technician workflow. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NOR flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT25SF128A | Quad SPI interface, 104 MHz single-data-rate, 1.8 V supply, no XIP optimization or RWW | Limited to non-XIP boot or cached execution; requires larger external RAM footprint | Choose when octal bandwidth and RWW are unnecessary and cost sensitivity outweighs performance needs |
| MX25L12873F | Quad SPI, 133 MHz SDR, 3.0 V supply, no EcoXiP™ features or 128-bit UID | Requires level-shifting for i.MX RT10xx core voltage; lacks secure OTP and deterministic XIP timing | Choose only if legacy 3.0 V system design mandates backward compatibility and security features are not required |
Compared with AT25SF128A and MX25L12873F, the ATXP128-CCUE-Y uniquely delivers octal DDR bandwidth, true XIP with RWW, and 1.8 V operation - making it the only Adesto part qualified for deterministic real-time boot and secure firmware execution on NXP i.MX RT105x/RT106x platforms.
Availability
ATXP128-CCUE-Y is available at Aetrix Electronics and suitable for industrial HMI, edge AI sensor nodes, secure OTA update modules, and automotive diagnostic tools requiring stable component supply and long-term lifecycle support.
Supply support for ATXP128-CCUE-Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Adesto Technologies, acquired by Dialog Semiconductor in 2020, specialized in ultra-low-power, high-performance serial NOR flash and conductive-bridging RAM (CBRAM) for embedded systems.
The EcoXiP™ product line - including ATXP128-CCUE-Y - was engineered specifically for XIP-capable crossover MCUs like NXP i.MX RT, enabling seamless integration without external RAM or complex memory controllers.
FAQ
What is the primary interface type supported by the ATXP128-CCUE-Y?
The ATXP128-CCUE-Y supports an octal double-data-rate (DDR) SPI interface with 8 bidirectional I/O pins. This interface enables 532 MB/s sequential read bandwidth and is required for Execute-in-Place operation on NXP i.MX RT1051/RT1062 MCUs. Unlike quad SPI variants, the ATXP128-CCUE-Y does not support standard SPI or dual SPI modes - only octal DTR is implemented per its EcoXiP™ architecture specification.
Is the ATXP128-CCUE-Y pin-compatible with other Adesto flash devices like AT25SF128A?
No, the ATXP128-CCUE-Y is not pin-compatible with AT25SF128A. The ATXP128-CCUE-Y uses an 8-pin WSON package with octal I/O functionality assigned to all IO0–IO7 pins, whereas AT25SF128A uses a standard 8-pin SOIC or WSON with dedicated SCLK, /CS, and I/O0–I/O3 pins. Their pinouts, signal definitions, and voltage tolerances differ fundamentally - direct replacement requires PCB redesign and firmware interface reconfiguration.
Does the ATXP128-CCUE-Y support hardware reset and unique identification?
Yes, the ATXP128-CCUE-Y includes an active-low /RESET pin for hardware-initiated initialization and a factory-programmed 128-bit unique identifier (UID). The UID is read-only and accessible via a dedicated command sequence; it is used for secure boot binding and device authentication in certified firmware stacks. The /RESET function is asynchronous and resets internal state without requiring clock cycling.
What NXP i.MX RT MCU families are officially verified for use with ATXP128-CCUE-Y?
The ATXP128-CCUE-Y is verified for use with NXP i.MX RT1051, RT1052, RT1061, and RT1062 crossover MCUs. These verifications include EVK board integration, memory-mapped boot configuration, and XIP timing compliance testing. While RT1010/RT1015 support is documented for other Adesto parts (e.g., AT25SF128A), the ATXP128-CCUE-Y verification scope explicitly excludes those models per Adesto's February 2020 SpeedBoat Series documentation.
Can the ATXP128-CCUE-Y be used in place of parallel NOR flash in legacy designs?
No, the ATXP128-CCUE-Y cannot replace parallel NOR flash. It is a serial octal DDR SPI device with no address/data bus pins, no /WE or /OE signals, and no asynchronous random-access mode. Its architecture assumes memory-mapped peripheral interface usage via MCU QSPI controllers - not general-purpose GPIO-banged or ASIC-connected parallel buses. Migration requires QSPI controller enablement and firmware adaptation to octal command sets.
ATXP128-CCUE-Y Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 24-VBGA
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 128Mbit
- Memory Organization:
- 16M x 8
- Memory Interface:
- SPI - Octal I/O
- Clock Frequency:
- 150 MHz
- Write Cycle Time - Word, Page:
- 4.7ms, 22µs
- Access Time:
- -
- Voltage - Supply:
- 1.7V ~ 1.95V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-CBGA (6x8)
ATXP128-CCUE-Y FAQ
1.How can I place an order for ATXP128-CCUE-Y through Aetrix?
Please submit a Request for Quotation (RFQ) for ATXP128-CCUE-Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ATXP128-CCUE-Y reliable?
The price and inventory of ATXP128-CCUE-Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ATXP128-CCUE-Y is usually 5 days.
3.What payment methods are accepted for ATXP128-CCUE-Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ATXP128-CCUE-Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ATXP128-CCUE-Y?
ATXP128-CCUE-Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ATXP128-CCUE-Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ATXP128-CCUE-Y?
For technical support, including ATXP128-CCUE-Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ATXP128-CCUE-Y requirements.
6.How does Aetrix verify that ATXP128-CCUE-Y is sourced from the original manufacturer or authorized distributors?
All ATXP128-CCUE-Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ATXP128-CCUE-Y meets industry standards.
7.What is the process for return or replacement of ATXP128-CCUE-Y?
All ATXP128-CCUE-Y units undergo pre-shipment inspection (PSI). If there is an issue with ATXP128-CCUE-Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ATXP128-CCUE-Y part is unused and in its original packaging.
Return procedure for ATXP128-CCUE-Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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