Infineon Technologies AUIRS1170STR

Overview

AUIRS1170STR from Infineon Technologies is an automotive-qualified secondary-side synchronous rectification (SR) controller IC for isolated flyback, forward, and half-bridge DC-DC converters. It drives N-channel MOSFETs with 10.7 V gate clamp, 60 ns turn-off propagation delay, 6 A peak sink current, and operates up to 500 kHz in CCM/DCM modes with SYNC-controlled turn-off - deployed in ASIL-D-compliant automotive SMPS.

For engineers reviewing the AUIRS1170STR datasheet, AUIRS1170STR pinout, AUIRS1170STR application, or AUIRS1170STR equivalent, key selection criteria include its differential V_DS-sensing architecture, MOT-based false-trigger suppression, 11–18 V V_CC range, micropower start-up (<200 µA), and PSOP8L package compatibility with high-noise automotive power rails.

Technical Context

The AUIRS1170STR implements dual-threshold differential V_DS sensing (–150 mV turn-on, –11 mV turn-off) with programmable blanking (7.8–25 µs) and cycle-by-cycle MOT monitoring to prevent multiple gate pulses during transient events. Its internal 10.7 V gate driver clamp ensures safe N-MOSFET gate bias under varying V_CC.

SYNC input enables primary-controller-synchronized forced turn-off in CCM mode, while EN pin provides system-level enable control with 20 µs on-delay and 300 ns off-delay. The IC integrates UVLO (9.4 V turn-on, 8.2 V turn-off), anti-bounce logic, and operates across –40°C to +125°C ambient with junction rating up to +150°C.

Key Specifications

Pinout & Package

Package: PSOP8L (Plastic Small Outline Package, 8-lead, exposed pad, RoHS-compliant, moisture sensitivity level 3).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar secondary-side synchronous rectification controller applications.

Compared with UCC24612DR and MP6908GJ-Z, the AUIRS1170STR uniquely delivers 200 V drain sensing, programmable MOT timing, and integrated ASIL-D enablers - making it the only option qualified for safety-critical 48 V automotive DC-DC and OBC auxiliary supplies.

Availability

AUIRS1170STR is available at Aetrix Electronics and suitable for automotive DC-DC converters, onboard charger auxiliary supplies, and EV traction inverter gate driver bias circuits requiring stable component supply across extended temperature and long product lifecycles.

Supply support for AUIRS1170STR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive electronics, and industrial control ICs, with global manufacturing and automotive qualification infrastructure.

The AUIRS1170STR belongs to Infineon's automotive-grade high-voltage IC product line, designed specifically to replace Schottky diodes in safety-critical isolated power supplies meeting ASIL-D requirements.

FAQ

What is the purpose of the MOT pin on the AUIRS1170STR?

The MOT (Minimum On-Time) pin connects to an external resistor that sets the hardware-enforced shortest duration the gate driver remains active. This prevents false triggering from noise or ringing during light-load or transient conditions. Values from 5 kΩ to 75 kΩ configure minimum on-time between 100 ns and 3.9 µs, directly tuning noise immunity without firmware changes.

Can the AUIRS1170STR operate without the SYNC signal?

Yes - the AUIRS1170STR functions autonomously using differential V_DS sensing in DCM and light-load CCM. SYNC is optional and only required for precise forced turn-off during heavy-load CCM operation. When SYNC is left unconnected or held high, the IC reverts to self-timed operation with built-in blanking and MOT protection.

How does the AUIRS1170STR achieve ASIL-D compliance support?

The AUIRS1170STR integrates hardware-level safety mechanisms including cycle-by-cycle MOT monitoring, UVLO with hysteresis, anti-bounce logic, double-pulse suppression, and dedicated EN pin timing - all documented in Infineon's ISO 26262-ready safety manual. These features reduce external monitoring circuitry and enable systematic fault coverage analysis for ASIL-D system architectures.

What is the recommended layout practice for V_D and V_S connections?

V_D and V_S must be routed as a tightly coupled differential pair with matched trace length and minimal loop area, directly adjacent to the MOSFET source and drain pads. Avoid sharing return paths with power or gate traces. Place a 100 pF capacitor between V_D and V_S near the IC to suppress RF coupling, and ensure Kelvin connection to the MOSFET source to eliminate PCB trace resistance error in sensing.