NXP Semiconductors BF1105WR,115
- Part No.:
- BF1105WR,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Single FETs, MOSFETs
- Package:
- SC-82A, SOT-343
- Datasheet:
-
BF1105WR,115.pdf
- Description:
- RF MOSFET 5V CMPAK-4
- Quantity:
- Payment:

- Shipping:

Inventory:6,122
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
BF1105WR,115 from NXP Semiconductors is an enhancement-type N-channel dual-gate MOSFET designed for RF amplification in VHF/UHF tuner front-ends. It features 31 mS typical forward transfer admittance, 2.2 pF input capacitance at gate 1, 1.7 dB typical noise figure at 800 MHz, and operates with 5 V supply voltage in television tuners and professional communications equipment.
For engineers reviewing the BF1105WR,115 datasheet, BF1105WR,115 pinout, BF1105WR,115 application, or BF1105WR,115 equivalent, key selection criteria include its dual-gate self-biasing architecture, low-noise gain-controlled performance up to 1 GHz, cross-modulation immunity under AGC, and SOT343R surface-mount package compatibility.
Technical Context
The BF1105WR,115 integrates source-substrate interconnection and internal protection diodes between both gates and source to withstand input voltage surges. Its dual-gate structure enables independent control of transconductance and bias stability, supporting high linearity in automatic gain control (AGC) paths.
Designed for common-source RF amplification, it delivers 38 dB power gain at 200 MHz and 20 dB at 800 MHz under specified matching conditions (GS = 2–3.3 mS, GL = 0.5–1 mS), with thermal resistance of 350 K/W junction-to-ambient in free air.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 7 V maximum drain-source voltage - defines safe DC operating ceiling for 5 V supply designs |
| |yfs| | 31 mS typical forward transfer admittance - enables high small-signal gain in narrowband RF amplifier stages |
| Cig1-ss | 2.2 pF typical input capacitance at gate 1 - sets input impedance and tuning range in VHF/UHF resonant circuits |
| F | 1.7 dB typical noise figure at 800 MHz - ensures minimal signal degradation in sensitive receiver front-ends |
| Xmod | 100 dBµV input level for 1% cross-modulation at 40 dB AGC - guarantees robust multi-channel interference rejection |
| Tj | 150 °C maximum operating junction temperature - supports continuous operation in compact tuner modules |
| Ptot | 200 mW total power dissipation at Tamb ≤ 80 °C - constrains thermal design for PCB layout and copper pour |
Pinout & Package
SOT343R plastic surface-mounted package (4 leads, reverse pinning); dimensions: 2.2 × 1.35 × 0.9 mm (D × E × A), lead pitch 0.5 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Source | Common reference node for both gates and drain; internally connected to substrate - requires low-impedance RF ground |
| 2 | Drain | RF output node; connects to tuned load or next stage - must be isolated from gate traces to minimize feedback |
| 4 | Gate 2 | DC bias control terminal; sets self-biasing current (8–16 mA) and stabilizes operating point during AGC |
| 3 | Gate 1 | RF input terminal; protected by integrated diode to source - accepts AC-coupled signals up to 50 MHz bandwidth |
Key Features
| Feature | Design Value |
|---|---|
| Dual-gate self-biasing architecture | Enables stable DC operating point without external bias resistors, reducing component count in tuner IF/RF stages |
| Integrated gate-source protection diodes | Prevents damage from ESD or transient overvoltage during handling or signal surges in antenna-connected circuits |
| High yfs/Cig1 ratio | Delivers superior gain-per-capacitance performance - critical for miniaturized VHF/UHF amplifier matching networks |
| Low 1.7 dB noise figure at 800 MHz | Meets stringent sensitivity requirements in digital TV and broadband communication receivers |
| Cross-modulation suppression at 40 dB AGC | Maintains >100 dBµV interference threshold under strong adjacent-channel signals - essential for multi-standard tuners |
Applications
| Television Tuner Front-End | Professional UHF Transceiver LNA |
|---|---|
Use Scenario: Amplifying weak terrestrial or cable TV signals in analog/digital broadcast receivers before mixer stage. IC Role / Device Role / Timing Role: Low-noise RF amplifier with dual-gate AGC interface - gate 2 receives DC control voltage while gate 1 handles RF input. Use Value: Achieves 1.7 dB noise figure and 38 dB gain at 200 MHz, enabling reliable reception of low-SNR DVB-T signals with minimal added noise. | Use Scenario: First-stage amplification in portable UHF two-way radios operating at 400–500 MHz. IC Role / Device Role / Timing Role: High-linearity, self-biased LNA where gate 2 provides AGC tracking and gate 1 isolates input from bias variations. Use Value: Delivers 100 dBµV cross-modulation threshold at 40 dB AGC, preventing intermodulation distortion from co-located transmitters. |
| FM Radio Receiver RF Amplifier | Wireless Microphone Preselector |
Use Scenario: Boosting weak FM band (88–108 MHz) signals prior to ceramic filter and mixer in consumer audio receivers. IC Role / Device Role / Timing Role: Tuned common-source amplifier with gate 1 as RF input and gate 2 as fixed DC bias node. Use Value: Provides 31 mS forward admittance and 2.2 pF Cig1, enabling sharp selectivity and high gain in compact LC-tuned circuits. | Use Scenario: Input-stage amplification in battery-powered wireless microphones operating at 174–216 MHz VHF band. IC Role / Device Role / Timing Role: Low-power, low-noise preselector amplifier with integrated surge protection on both gates. Use Value: Operates reliably at 5 V supply with 200 mW power budget and 150 °C junction rating - suitable for sealed, thermally constrained enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-gate MOSFET amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| BF1105R,115 | SOT143R package (3.0 × 1.4 mm), standard pinout (1=source, 2=drain, 3=gate2, 4=gate1), identical electrical specs | Requires PCB layout revision due to different footprint and pin order - not drop-in compatible | Select when legacy board space allows larger SOT143R or when sourcing constraints limit BF1105WR,115 availability |
| BF998,115 | Higher 35 mS |yfs | Better noise/gain trade-off for demanding 800 MHz+ applications; higher IDSS may require bias adjustment | Choose for upgraded performance in new designs targeting improved SNR in digital TV tuners or LTE band edge receivers |
Compared with BF1105R,115, the BF1105WR,115 offers identical RF performance in a smaller SOT343R footprint with reverse pinning - simplifying high-density tuner layouts. Against BF998,115, it trades 4 mS lower |yfs| and +0.2 dB noise for proven reliability in cost-sensitive broadcast applications.
Availability
BF1105WR,115 is available at Aetrix Electronics and suitable for television tuner front-ends, professional UHF transceivers, and FM radio receiver RF amplifiers requiring stable component supply across long-lifecycle consumer electronics programs.
Supply support for BF1105WR,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in high-performance RF, analog, and mixed-signal solutions for automotive, industrial, and consumer applications.
The BF1105WR,115 belongs to NXP's legacy RF transistor product line, engineered specifically for low-noise, dual-gate VHF/UHF amplification in broadcast and communications equipment with 5 V supply constraints.
FAQ
What is the maximum drain-source voltage rating for BF1105WR,115?
The BF1105WR,115 has a maximum drain-source voltage (VDS) rating of 7 V, as specified in the Absolute Maximum Ratings table. This rating applies under all operating conditions and must not be exceeded to prevent permanent device damage. The BF1105WR,115 is intended for use with 5 V supply rails in tuner applications, leaving 2 V headroom for transient spikes.
Does BF1105WR,115 require external bias resistors?
No, the BF1105WR,115 incorporates an internal self-biasing circuit that establishes stable DC operating conditions without external bias resistors. Gate 2 is used for DC bias control, and the device delivers 8–16 mA self-biasing drain current (IDSX) at VG2-S = 4 V and VDS = 5 V. This feature simplifies schematic design and improves AGC response in tuner applications using BF1105WR,115.
What is the noise figure of BF1105WR,115 at 800 MHz?
The BF1105WR,115 exhibits a typical noise figure (F) of 1.7 dB at 800 MHz, measured under YS = YS opt conditions. The datasheet specifies a maximum of 2.5 dB, confirming its suitability for low-noise amplification in UHF digital TV and professional communications receivers. This value is directly measured and verified for the BF1105WR,115 in its SOT343R package.
Which package type does BF1105WR,115 use?
The BF1105WR,115 is encapsulated in the SOT343R plastic surface-mounted package - a 4-lead outline with reverse pinning (pin 1 = source, pin 2 = drain, pin 4 = gate 2, pin 3 = gate 1). Its dimensions are 2.2 mm × 1.35 mm × 0.9 mm, with 0.5 mm lead pitch. This compact footprint supports high-density RF layout in modern tuner modules using BF1105WR,115.
Can BF1105WR,115 replace BF1105,115 in existing designs?
No, BF1105WR,115 cannot directly replace BF1105,115 without PCB modification. While electrically identical, BF1105,115 uses the SOT143B package with standard pinout (1=source, 2=drain, 3=gate2, 4=gate1), whereas BF1105WR,115 uses SOT343R with reverse pinning (1=source, 2=drain, 4=gate2, 3=gate1). Layout redesign is required to accommodate the different footprint and pin order of BF1105WR,115.
BF1105WR,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- SC-82A, SOT-343
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Technology:
- MOSFET (Metal Oxide)
- Configuration:
- N-Channel Dual Gate
- Frequency:
- 800MHz
- Gain:
- 20dB
- Voltage - Test:
- 5 V
- Current Rating (Amps):
- 30mA
- Noise Figure:
- 1.7dB
- Current - Test:
- -
- Power - Output:
- -
- Voltage - Rated:
- 7 V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- CMPAK-4
BF1105WR,115 FAQ
1.How can I place an order for BF1105WR,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for BF1105WR,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for BF1105WR,115 reliable?
The price and inventory of BF1105WR,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for BF1105WR,115 is usually 5 days.
3.What payment methods are accepted for BF1105WR,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for BF1105WR,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for BF1105WR,115?
BF1105WR,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your BF1105WR,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for BF1105WR,115?
For technical support, including BF1105WR,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your BF1105WR,115 requirements.
6.How does Aetrix verify that BF1105WR,115 is sourced from the original manufacturer or authorized distributors?
All BF1105WR,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that BF1105WR,115 meets industry standards.
7.What is the process for return or replacement of BF1105WR,115?
All BF1105WR,115 units undergo pre-shipment inspection (PSI). If there is an issue with BF1105WR,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The BF1105WR,115 part is unused and in its original packaging.
Return procedure for BF1105WR,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
BF1105WR,115 Tags

-
3SK294(TE85L,F)
Toshiba Semiconductor and Storage
-
SAV-551+
Mini-Circuits

-
TAV2-501+
Mini-Circuits

-
CE3514M4-C2
CEL

-
AFT05MS004NT1
NXP USA Inc.
-
SAV-541+
Mini-Circuits

-
CE3512K2-C1
CEL

-
AFM907NT1
NXP Semiconductors

-
SKY65050-372LF
Skyworks Solutions Inc.

-
CE3520K3-C1
CEL

-
AFT09MS007NT1
NXP USA Inc.

-
AFT09MS015NT1
NXP USA Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
