NXP Semiconductors BF1206,115
- Part No.:
- BF1206,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Single FETs, MOSFETs
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
BF1206,115.pdf
- Description:
- RF MOSFET 5V 6TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:7,993
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Product details
Overview
BF1206 from NXP Semiconductors is a dual N-channel dual-gate MOSFET in SOT363 package, integrating two independent low-noise amplifiers with shared source and gate-2 leads. It delivers 38 mS forward transfer admittance (amp. a), 1.3 dB noise figure at 400 MHz, and 105 dBμV cross-modulation performance at 40 dB AGC - optimized for VHF/UHF gain-controlled tuner stages in 5 V digital/analog TV receivers.
For engineers reviewing the BF1206 datasheet, BF1206 pinout, BF1206 application, or BF1206 equivalent, this page provides verified pin functions, amplifier-specific RF parameters (yfs, Crss, NF), thermal resistance (240 K/W), and real-world AGC behavior - all critical for tuner front-end design, impedance matching, and AGC loop stability validation.
Technical Context
The BF1206 implements two discrete dual-gate MOSFET amplifiers (Amp A and Amp B) sharing physical source and gate-2 terminals, enabling compact dual-path VHF/UHF signal conditioning. Each amplifier features internal DC bias stabilization and integrated gate-source protection diodes against voltage surges.
Amplifier A operates at ID = 18 mA with yfs = 38 mS and NF = 1.3 dB @ 400 MHz; Amplifier B operates at ID = 12 mA with yfs = 34 mS and NF = 1.4 dB @ 800 MHz. Both support AGC via gate-2 voltage control, delivering >100 dBμV cross-modulation rejection across 0–40 dB gain reduction.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS max | 6 V - defines absolute maximum drain-source voltage before breakdown; sets 5 V supply headroom for tuner applications. |
| ID max | 30 mA per MOSFET - limits continuous DC current handling; aligns with typical 12–18 mA operating points for low-noise biasing. |
| |yfs| (Amp A) | 38 mS typical - determines small-signal transconductance and gain potential; enables high gain with minimal external components. |
| NF (Amp A @ 400 MHz) | 1.3 dB typical - quantifies added noise in VHF tuner LNA stage; critical for maintaining C/N ratio in weak-signal reception. |
| Xmod (Amp A @ 40 dB AGC) | 105 dBμV typical - measures intermodulation suppression under strong AGC; ensures clean channel separation in multi-carrier environments. |
| Ciss (Amp A) | 2.4 pF typical at gate-1 - defines input capacitance for impedance matching networks at UHF frequencies. |
| Rth j-s | 240 K/W - junction-to-solder-point thermal resistance; informs PCB copper area requirements for 180 mW total dissipation. |
Pinout & Package
Encapsulated in SOT363 - a 6-lead plastic surface-mounted package (2.2 × 1.35 × 1.15 mm) with standard SC-88 footprint compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Drain (B) | Output terminal for amplifier B; connects to tuned load or next-stage input; requires RF decoupling and impedance matching. |
| 2 | Source | Common source node for both amplifiers; tied to substrate and serves as RF ground reference point for bias and signal return. |
| 3 | Gate 1 (B) | Signal input for amplifier B; high-impedance RF input requiring controlled-impedance trace and ESD protection. |
| 4 | Gate 1 (A) | Signal input for amplifier A; electrically isolated from Gate 1 (B); enables independent RF path routing on PCB. |
| 5 | Gate 2 | Common AGC control input for both amplifiers; voltage-controlled gain adjustment node (0.35–1 V threshold). |
| 6 | Drain (A) | Output terminal for amplifier A; used for primary VHF/UHF signal path; shares thermal pad with Pin 2 (source). |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent amplifiers | Two matched dual-gate MOSFETs in one SOT363 package - reduces board space and component count in dual-tuner or diversity architectures. |
| Integrated gate protection | On-chip diodes between each gate and source - eliminates need for external ESD clamps in tuner front-end designs. |
| DC-stabilized bias | Internal bias circuitry maintains stable quiescent current over temperature - avoids manual trim resistors and improves production yield. |
| High yfs/Cig1-s ratio | 15.8 mS/pF typical (Amp A) - enables high gain with low input capacitance, easing matching into 50 Ω systems at UHF. |
| Superior cross-modulation | 105 dBμV at 40 dB AGC - ensures minimal distortion when multiple adjacent channels are present in broadcast spectrum. |
Applications
| Digital TV Tuner Front-End | Analog TV Tuner IF Stage |
|---|---|
Use Scenario: Low-noise amplification of VHF/UHF antenna signals prior to mixer in ATSC/DVB-T receiver. IC Role / Device Role / Timing Role: Dual-gate MOSFET LNA with AGC-controlled gain staging for dynamic signal range compression. Use Value: 1.3 dB NF at 400 MHz preserves signal integrity; 105 dBμV Xmod prevents ghosting and co-channel interference in dense urban RF environments. |
Use Scenario: Gain-controlled IF amplification in NTSC/PAL tuners operating at 45.75 MHz (video) and 41.25 MHz (audio). IC Role / Device Role / Timing Role: Dual-path amplifier supporting simultaneous video/audio IF processing with shared AGC control. Use Value: Matched yfs (38/34 mS) and NF (1.3/1.4 dB) across amps ensure consistent SNR; 5 V operation simplifies power architecture. |
| Cable TV Set-Top Box Tuner | Terrestrial Broadcast Diversity Receiver |
Use Scenario: First-stage LNA in QAM64/256 demodulator front-end handling 54–1000 MHz CATV spectrum. IC Role / Device Role / Timing Role: Dual-gate amplifier providing broadband gain control and low-noise amplification up to 800 MHz. Use Value: 27 dB power gain @ 800 MHz (Amp B) and Crss = 15 fF minimize feedback; enables stable wideband operation without neutralization. |
Use Scenario: Independent RF paths for main/diversity antenna inputs in DVB-T/H mobile receivers. IC Role / Device Role / Timing Role: Two isolated amplifiers sharing AGC line - allows correlated gain adjustment while preserving path independence. Use Value: Shared gate-2 and source reduce layout complexity; 2.4/1.7 pF input capacitance enables compact matching networks for portable form factors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-gate MOSFET amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| BF1106 | Single dual-gate MOSFET (not dual); lower yfs (30 mS typ), higher NF (1.8 dB @ 400 MHz), same SOT363 package. | Lacks second amplifier path - requires two devices for dual-path designs; less suitable for space-constrained tuners. | Select BF1106 only when single-path amplification suffices and board area permits duplication. |
| BF998 | Single dual-gate MOSFET in SOT143; yfs = 45 mS typ, NF = 1.1 dB @ 400 MHz, but no shared gate-2 or source topology. | No built-in dual-amplifier integration - cannot replicate BF1206's AGC correlation or footprint efficiency. | Choose BF998 for highest-performance single-path LNA where ultimate NF and gain outweigh integration benefits. |
Compared with BF1106 and BF998, the BF1206 uniquely delivers dual-path amplification with correlated AGC in a single SOT363 footprint - reducing component count by 50% versus dual-BF1106 solutions and eliminating inter-device gain mismatch in tuner front-ends.
Availability
BF1206 is available at Aetrix Electronics and suitable for digital TV tuners, analog TV IF stages, and cable set-top box front-ends requiring stable component supply, long-term obsolescence management, and RoHS-compliant packaging.
Supply support for BF1206 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in high-performance RF, analog, and mixed-signal solutions for consumer, automotive, and industrial markets.
The BF1206 belongs to NXP's legacy RF transistor product line, engineered specifically for low-noise, gain-controlled amplification in broadcast television tuner applications operating from VHF through low-UHF bands.
FAQ
What is the maximum drain-source voltage rating for the BF1206?
The BF1206 has a maximum drain-source voltage (VDS) rating of 6 V, as specified in the Absolute Maximum Ratings table. This limit applies per MOSFET and must not be exceeded during operation or transient conditions. The BF1206 is designed for 5 V supply systems, leaving 1 V margin for safe operation under worst-case voltage spikes or ripple.
How does the BF1206 implement AGC control across both amplifiers?
The BF1206 implements AGC control via a shared Gate 2 (Pin 5) terminal that connects to both internal MOSFETs. Applying a variable DC voltage (0.35–1 V threshold) to Pin 5 modulates the transconductance of both amplifiers simultaneously, enabling correlated gain reduction without separate control lines - a key feature confirmed in the device description and Fig.13/Fig.29.
What is the thermal resistance from junction to soldering point for the BF1206?
The BF1206 has a thermal resistance from junction to soldering point (Rth j-s) of 240 K/W, as stated in the Thermal Characteristics section. This value assumes soldering at the source lead (Pin 2) and guides PCB copper pour sizing to maintain junction temperature ≤150 °C under 180 mW total power dissipation.
Can the BF1206 be used in 800 MHz LTE front-end designs?
The BF1206 supports operation up to 800 MHz, with measured 27 dB power gain and 1.4 dB noise figure for Amplifier B at that frequency. However, it lacks LTE-specific features like harmonic filtering or integrated switch control, and its 6 V VDS rating and 30 mA ID limit require careful biasing - making it suitable only for narrowband, low-power LTE receive paths where legacy tuner-grade performance is acceptable.
What package type is used for the BF1206 and what are its key dimensions?
The BF1206 uses the SOT363 package - a 6-lead plastic surface-mount outline also known as SC-88. Its dimensions are 2.2 mm × 1.35 mm × 1.15 mm (L × W × H), with 0.65 mm lead pitch and 0.25 mm maximum thickness, as defined in the Package Outline drawing on page 19 of the datasheet.
BF1206,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Technology:
- MOSFET (Metal Oxide)
- Configuration:
- N-Channel Dual Gate
- Frequency:
- 400MHz
- Gain:
- 30dB
- Voltage - Test:
- 5 V
- Current Rating (Amps):
- 30mA
- Noise Figure:
- 1.3dB
- Current - Test:
- 18 mA
- Power - Output:
- -
- Voltage - Rated:
- 6 V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
BF1206,115 FAQ
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6.How does Aetrix verify that BF1206,115 is sourced from the original manufacturer or authorized distributors?
All BF1206,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that BF1206,115 meets industry standards.
7.What is the process for return or replacement of BF1206,115?
All BF1206,115 units undergo pre-shipment inspection (PSI). If there is an issue with BF1206,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The BF1206,115 part is unused and in its original packaging.
Return procedure for BF1206,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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