Infineon Technologies BF2040E6814HTSA1

Overview

BF2040E6814HTSA1 from NXP Semiconductors is a silicon N-channel tetrode MOSFET designed for low-noise, high-gain RF input stages up to 1 GHz. It features dual gates (G1/G2), 8 V drain-source voltage rating, 40 mA continuous drain current, and 1.6–2.2 dB noise figure at 800 MHz - deployed in VHF/UHF receiver front-ends requiring precise gain control and minimal signal degradation.

For engineers reviewing the BF2040E6814HTSA1 datasheet, BF2040E6814HTSA1 pinout, BF2040E6814HTSA1 application, or BF2040E6814HTSA1 equivalent, key selection criteria include verified 800 MHz power gain (20–23 dB), gate-controlled transconductance tuning (gfs = 37–42 mS), dual-gate biasing flexibility (VG1S(p) = 0.3–0.6 V, VG2S(p) = 0.3–0.7 V), and SOT143 thermal resistance (≤370 K/W).

Technical Context

This tetrode MOSFET uses independent gate control: Gate 2 (G2) sets channel conduction level (V_G2S(p) = 0.3–0.7 V), while Gate 1 (G1) provides high-impedance RF signal input with sub-3 pF input capacitance (C_g1ss = 2.9–3.4 pF). Its dual-gate architecture enables simultaneous AGC and amplification without external feedback networks.

It operates at 5 V supply with 200 mW total power dissipation (T_S ≤ 76 °C), supports DC-coupled bias via external 100 kΩ G1 resistor, and delivers 45–50 dB gain control range (∆G_p) across 800 MHz - confirmed under V_DS = 5 V, I_D = 15 mA, V_G2S = 4 V conditions.

Key Specifications

Pinout & Package

SOT143 package: 4-pin surface-mount plastic package with exposed drain pad for thermal management; footprint compatible with JEDEC MS-012 standards; moisture sensitivity level (MSL) 1.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-gate RF amplifier applications.

Compared with BFP181 and MRF901, BF2040E6814HTSA1 uniquely integrates dual-gate control in a 5 V, SOT143 package - enabling monolithic AGC implementation without external attenuators or bias sequencing circuitry.

Availability

BF2040E6814HTSA1 is available at Aetrix Electronics and suitable for FM radio tuners, UHF wireless microphones, VHF airband receivers, and ISM-band 433 MHz transceivers requiring stable component supply across production lifecycles.

Supply support for BF2040E6814HTSA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer applications.

BF2040E6814HTSA1 belongs to NXP's RF transistor product line, engineered specifically for low-noise, dual-gate amplification in VHF/UHF receiver front-ends where gain stability and noise performance are critical.

FAQ

What is the recommended gate bias configuration for optimal noise figure?

For minimum noise figure (1.6 dB), set VG2S = 4 V and bias VG1S using a 100 kΩ resistor to achieve ID ≈ 15 mA. Maintain VDS = 5 V and ensure source is solidly grounded with short, low-inductance traces. Avoid floating G1 - even 100 pF stray capacitance degrades NF by >0.3 dB at 800 MHz.

Can BF2040E6814HTSA1 be used in 900 MHz ISM band applications?

Yes - its 800 MHz power gain (20–23 dB) and noise figure (1.6–2.2 dB) remain effective at 900 MHz, with measured Gp = 18 dB and F = 1.9 dB in NXP's application note AN10852. Derate Ptot to 180 mW at TS = 70 °C for continuous 900 MHz operation.

Is the SOT143 package lead-free and RoHS compliant?

Yes - BF2040E6814HTSA1 uses a fully Pb-free SOT143 package conforming to RoHS Directive 2011/65/EU. The device carries the "E6814" marking suffix indicating RoHS-compliant plating and mold compound; no exemption codes apply.

How does gain control work between Gate 1 and Gate 2?

Gate 2 (G2) sets the channel's DC conduction level - varying VG2S from 0 to 4 V changes ID from near-zero to 15 mA, thereby adjusting transconductance and gain. Gate 1 (G1) remains at fixed DC bias (e.g., 0.6 V) and accepts the RF signal; its isolation from G2 prevents signal leakage into the AGC path.