NXP Semiconductors BF245C,112
- Part No.:
- BF245C,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Single FETs, MOSFETs
- Package:
- TO-226-3, TO-92-3 (TO-226AA) Formed Leads
- Datasheet:
-
BF245C,112.pdf
- Description:
- RF MOSFET JFET 15V TO92-3
- Quantity:
- Payment:

- Shipping:

Inventory:8,289
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Product details
Overview
BF245C,112 from NXP Semiconductors is a general-purpose N-channel symmetrical junction field-effect transistor (JFET) in TO-92 variant package, rated for ±30 V drain-source voltage, 12–25 mA zero-gate drain current (IDSS), and 700 MHz cut-off frequency (fgfs). It operates as a low-noise, high-frequency amplifying device in RF and audio signal paths, commonly used in HF receiver front-ends and tunable oscillator stages.
For engineers reviewing the BF245C,112 datasheet, BF245C,112 pinout, BF245C,112 application, or BF245C,112 equivalent, key selection criteria include gate-source cut-off voltage range (−3.2 to −7.5 V), forward transfer admittance (3–6.5 mS), reverse transfer capacitance (1.1 pF), and thermal resistance (200 K/W at PCB mount), all critical for bias stability and high-frequency gain matching.
Technical Context
The BF245C,112 employs a symmetrical JFET structure enabling interchangeable drain and source terminals, simplifying layout in bidirectional analog signal paths. Its silicon junction design delivers stable DC transfer characteristics with gate leakage below 5 nA at −20 V and junction temperature up to 150 °C.
Dynamic performance is defined by 1.1 pF reverse transfer capacitance (Crs), 6 mS forward transfer admittance at 200 MHz, and 1.5 dB noise figure at 100 MHz - confirming suitability for low-noise amplification where input impedance matching and minimal capacitive feedback are essential.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | ±30 V - supports rail-to-rail operation in ±15 V amplifier supplies without breakdown risk. |
| IDSS | 12–25 mA - defines maximum transconductance range and sets DC bias point for linear amplification. |
| VGSoff | −3.2 to −7.5 V - determines gate bias voltage required to fully pinch off channel; critical for setting quiescent current. |
| fgfs | 700 MHz - indicates usable small-signal bandwidth limit; enables HF amplification up to 30 MHz with margin. |
| Crs | 1.1 pF - limits Miller effect in common-source configurations; enables stable gain above 50 MHz. |
| F (noise figure) | 1.5 dB @ 100 MHz - confirms low-noise capability for sensitive RF front-end stages with 1 kΩ source impedance. |
| Rth j-a | 200 K/W (PCB mounted) - defines thermal derating slope; requires ≥10 mm × 10 mm copper pad for full 300 mW dissipation at 75 °C ambient. |
Pinout & Package
BF245C,112 is housed in a plastic TO-92 variant (SOT54) through-hole package with 3 leads. Mounting requires minimum 3 mm lead length and a 10 mm × 10 mm copper pad on the drain lead for thermal compliance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Drain (d) | Main current output terminal; electrically interchangeable with source in symmetrical JFET operation. |
| 2 | Source (s) | Main current input terminal; tied to ground or bias network; interchangeable with drain per design flexibility. |
| 3 | Gate (g) | High-impedance control terminal; must be protected from static discharge (±30 V max); sets channel conduction via reverse-biased PN junction. |
Key Features
| Feature | Design Value |
|---|---|
| Symmetrical drain/source terminals | Enables bidirectional signal routing and simplified PCB layout in analog switch or phase-invariant amplifier topologies. |
| 700 MHz cut-off frequency | Supports stable small-signal amplification in HF bands (3–30 MHz) with predictable gain roll-off. |
| 1.5 dB noise figure @ 100 MHz | Meets low-noise requirements for AM/SW receiver RF preamplifiers and crystal oscillator buffer stages. |
| ±30 V VDS rating | Allows operation across dual ±12 V or ±15 V supply rails without derating or external clamping. |
| TO-92 variant (SOT54) package | Provides industry-standard through-hole mounting with proven thermal performance on FR-4 PCBs. |
Applications
| HF Receiver Front-End | Crystal Oscillator Buffer |
|---|---|
|
Use Scenario: First-stage amplification of weak shortwave signals (3–30 MHz) before mixer stage in communications receivers. IC Role / Device Role / Timing Role: Low-noise JFET amplifier operating in common-source configuration with tuned input network. Use Value: 1.5 dB noise figure and 700 MHz fgfs ensure minimal degradation of signal-to-noise ratio while maintaining gain flatness across HF band. |
Use Scenario: Isolation and drive amplification of 1–30 MHz crystal oscillator outputs to multiple downstream logic or mixer inputs. IC Role / Device Role / Timing Role: High-input-impedance buffer stage preventing oscillator load pulling and frequency drift. Use Value: Symmetrical drain/source and low Crs (1.1 pF) minimize capacitive loading and maintain oscillator Q-factor and stability. |
| Audio Preamp Stage | RF Signal Switch |
|
Use Scenario: High-fidelity microphone or phono preamplifier requiring ultra-low input current noise and wide dynamic range. IC Role / Device Role / Timing Role: Discrete JFET configured as common-source voltage amplifier with source degeneration for linearity. Use Value: Gate leakage <5 nA and IDSS tolerance (12–25 mA) enable precise DC bias setting and minimal offset drift over temperature. |
Use Scenario: Analog RF path switching in test equipment or multi-band transceivers using simple gate-control logic. IC Role / Device Role / Timing Role: Voltage-controlled resistive switch leveraging JFET's ohmic region behavior under low VDS. Use Value: Interchangeable drain/source and guaranteed RDSon <10 kΩ at VGS = −1 V allow bidirectional RF signal routing without polarity constraints. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar JFET amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| J310 | Higher IDSS (24–60 mA), lower VGSoff (−0.5 to −4.0 V), smaller Crs (0.8 pF), but no symmetrical drain/source specification. | Better suited for broadband video amplifiers; less ideal for HF oscillator buffering due to asymmetry and higher gate leakage. | Select J310 only when higher transconductance and tighter Crs tolerance are prioritized over terminal interchangeability. |
| 2N5457 | Lower IDSS (1–5 mA), wider VGSoff (−0.5 to −5.0 V), identical Crs (1.1 pF), same TO-92 package and symmetrical construction. | Preferred for low-current, high-impedance sensor interfaces or mic preamps where lower bias current reduces power consumption. | Choose 2N5457 when circuit requires sub-5 mA quiescent drain current and maintains need for symmetrical pinout and HF capability. |
Compared with J310 and 2N5457, BF245C,112 uniquely balances mid-range IDSS (12–25 mA), verified symmetrical terminal operation, and 700 MHz fgfs - making it optimal for HF amplification where bias stability, noise, and layout flexibility are jointly critical.
Availability
BF245C,112 is available at Aetrix Electronics and suitable for HF receiver front-ends, crystal oscillator buffers, and audio preamplifier circuits requiring stable component supply and long-term obsolescence management.
Supply support for BF245C,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in high-performance mixed-signal, RF, and standard analog products, with roots in Philips Semiconductor.
The BF245C,112 belongs to NXP's legacy discrete JFET family designed for general-purpose RF and audio amplification - emphasizing low noise, symmetrical operation, and robust through-hole manufacturability.
FAQ
What is the maximum drain-source voltage rating for BF245C,112?
The BF245C,112 has a maximum drain-source voltage (VDS) rating of ±30 V, as specified in the Absolute Maximum Ratings table. This allows safe operation in dual-supply circuits up to ±15 V and single-supply configurations with appropriate DC blocking. Exceeding ±30 V risks permanent junction breakdown. The rating assumes proper PCB thermal management per datasheet note 1.
Does BF245C,112 support interchangeable drain and source connections?
Yes, BF245C,112 is explicitly designed as a symmetrical junction FET, and the datasheet confirms interchangeability of drain and source terminals. This feature simplifies PCB layout in analog switches and bidirectional amplifier stages. Pin 1 (drain) and Pin 2 (source) may be swapped without functional impact, provided gate bias remains correctly referenced.
What is the typical noise figure of BF245C,112 and under what conditions is it measured?
The BF245C,112 exhibits a typical noise figure (F) of 1.5 dB at 100 MHz, measured with VDS = 15 V, VGS = 0 V, RG = 1 kΩ in common-source configuration, and input tuned for minimum noise. This value is confirmed in Figure 21 of the datasheet and reflects its suitability for low-noise RF amplification where signal integrity is critical.
How does the gate-source cut-off voltage (VGSoff) vary across BF245C,112 units?
BF245C,112 has a specified VGSoff range of −3.2 V to −7.5 V at ID = 200 µA and VDS = 15 V. This variation reflects process tolerances within the N-channel JFET fabrication. Designers must accommodate this spread in bias networks - typically using source degeneration resistors or adjustable gate bias to ensure consistent IDSS operation across production lots.
What thermal resistance does BF245C,112 exhibit when mounted on a standard PCB?
When mounted on a printed-circuit board with minimum 3 mm lead length and a 10 mm × 10 mm copper pad on the drain lead, BF245C,112 achieves a thermal resistance from junction to ambient (Rth j-a) of 200 K/W. This value enables full 300 mW power dissipation at 75 °C ambient, as stated in the Thermal Characteristics section - critical for reliability in continuous-wave amplifier applications.
BF245C,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- TO-226-3, TO-92-3 (TO-226AA) Formed Leads
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Technology:
- JFET
- Configuration:
- N-Channel
- Frequency:
- 100MHz
- Gain:
- -
- Voltage - Test:
- 15 V
- Current Rating (Amps):
- 25mA
- Noise Figure:
- 1.5dB
- Current - Test:
- -
- Power - Output:
- -
- Voltage - Rated:
- 30 V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- TO-92-3
BF245C,112 FAQ
1.How can I place an order for BF245C,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for BF245C,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for BF245C,112 reliable?
The price and inventory of BF245C,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for BF245C,112 is usually 5 days.
3.What payment methods are accepted for BF245C,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for BF245C,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for BF245C,112?
BF245C,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your BF245C,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for BF245C,112?
For technical support, including BF245C,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your BF245C,112 requirements.
6.How does Aetrix verify that BF245C,112 is sourced from the original manufacturer or authorized distributors?
All BF245C,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that BF245C,112 meets industry standards.
7.What is the process for return or replacement of BF245C,112?
All BF245C,112 units undergo pre-shipment inspection (PSI). If there is an issue with BF245C,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The BF245C,112 part is unused and in its original packaging.
Return procedure for BF245C,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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