Texas Instruments BQ2205LYPWRG4
- Part No.:
- BQ2205LYPWRG4
- Manufacturer:
- Texas Instruments
- Category:
- Controllers
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
BQ2205LYPWRG4.pdf
- Description:
- IC CTRLR SRAM NONVOLITL 16-TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
BQ2205LYPWRG4 from Texas Instruments is a CMOS SRAM non-volatile controller with integrated reset, designed to convert standard CMOS SRAM into battery-backed non-volatile memory. It supports one or two banks of SRAM, provides 3.3-V operation with 3-V primary cell backup, delivers <20-ns chip-enable propagation delay, and features dual conditioned CE outputs (CECON1/CECON2) for hardware write-protection during power failure - used in NVSRAM modules and medical instrumentation.
For engineers reviewing the BQ2205LYPWRG4 datasheet, BQ2205LYPWRG4 pinout, BQ2205LYPWRG4 application, or BQ2205LYPWRG4 equivalent, key selection criteria include VPFD = 2.9 V (typ), tCER = 30–85 ms write-protect hold time after power-up, VOUT switching between VCC and BCP, open-drain RST/BW outputs, and TSSOP-16 package compatibility with industrial temperature range (−20°C to 70°C).
Technical Context
The BQ2205LYPWRG4 implements autonomous power-fail detection using a precision comparator monitoring VCC against VPFD (2.9 V typ); when VCC falls below VPFD, it forces CECON1 and CECON2 inactive and switches VOUT from VCC to the backup cell (BCP) to maintain SRAM retention. During power-up, VOUT transitions back to VCC once VCC exceeds VPFD, and CECONx outputs remain disabled for tCER (30–85 ms) to ensure microprocessor stabilization before memory access resumes.
Bank selection is performed via input A, which routes the active-low CE signal to either CECON1 (A = L) or CECON2 (A = H), enabling hardware-based decoding of dual-SRAM banks without external logic. The RST output provides synchronized power-on/power-fail reset (open-drain, 0.4 V max at 1 mA), while BW latches battery voltage status (VBW = 0.677×VCC) at tCER after power-valid detection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VPFD | 2.9 V (typ) - precise power-fail detection threshold triggering automatic SRAM write-protection and VOUT source switch |
| tCER | 30–85 ms - guaranteed write-protect hold time after VCC rises above VPFD, ensuring CPU reset stability before memory access |
| tCED | 15–25 ns - low-latency chip-enable propagation delay preserving SRAM timing integrity during valid-power operation |
| VOUT Switching | Automatic VCC ↔ BCP switchover - maintains continuous SRAM supply during brownout or main power loss |
| RST Output | Open-drain, 0.4 V max at 1 mA - directly interfaces with standard microprocessor reset inputs without level-shifting |
| BW Output | Open-drain battery warning - latched low if BCP voltage < 0.677×VCC at power-up, enabling system-level battery health reporting |
| ICC(VCC) | 210–500 µA - ultra-low quiescent current during active 3.3-V operation, minimizing impact on host power budget |
Pinout & Package
Package: 16-pin TSSOP (PW), JEDEC MO-153 compliant, 4.4 mm × 5.0 mm footprint, 1.2 mm max height, lead pitch 0.65 mm, NIPDAU finish, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A | SRAM bank select input | Logic level selects CE routing: A = L → CE to CECON1; A = H → CE to CECON2; enables dual-bank memory expansion |
| BCP | Backup cell input | Accepts 2.0–4.0 V primary lithium cell; powers VOUT and internal circuitry when VCC fails |
| BW | Battery warning output | Open-drain output latched low if BCP < 0.677×VCC at power-up; requires external pull-up for system alert signaling |
| CE | Chip enable input | Active-low control signal passed through to CECONx only during power-valid operation; ignored during power transition |
| CECON1 / CECON2 | Conditioned chip enable outputs | Active-low outputs forced inactive during power fail; drive SRAM CE pins with <25 ns delay and full VOUT rail swing |
| RST | Power-on/power-fail reset output | Open-drain output held low for tRST (30–85 ms) after VCC crosses VPFD; resets connected microprocessor reliably |
| VCC | Main supply input | 3.0–3.6 V nominal; monitored for VPFD detection; powers internal logic and drives VOUT during normal operation |
| VOUT | SRAM supply output | Switched output sourcing up to 80 mA; automatically transitions between VCC and BCP to sustain SRAM VDD during outage |
| VSS | Ground | Three dedicated ground pins (pins 4, 5, 8) - support low-noise grounding strategy separating signal and power return paths |
Key Features
| Feature | Design Value |
|---|---|
| Dual bank SRAM control | Hardware-decoded CE routing via A input eliminates need for external address decoder logic in multi-bank NVSRAM designs |
| Autonomous power switchover | VOUT seamlessly transitions between VCC and BCP without software intervention or external FETs, ensuring zero-interruption SRAM retention |
| Guaranteed write-protection window | tCER (30–85 ms) enforces mandatory SRAM write-disable period after power restoration, preventing corruption during CPU boot |
| Integrated power-on reset | RST output provides deterministic, voltage-monitored reset pulse synchronized to VPFD crossing - no external RC network required |
| Battery health monitoring | BW pin delivers latched low-voltage warning based on measured BCP vs. VCC ratio, enabling firmware-triggered battery replacement alerts |
Applications
| Point-of-Sale Terminals | Medical Data Loggers |
|---|---|
|
Use Scenario: Transaction data must survive instantaneous AC power loss during credit card swipe or receipt printing. IC Role / Device Role / Timing Role: BQ2205LYPWRG4 acts as SRAM power supervisor and write-protect enforcer, switching VOUT to backup cell and disabling CECONx within 2.9 V detection window. Use Value: Prevents transaction data corruption by guaranteeing SRAM write-disable before VCC decay compromises memory integrity. |
Use Scenario: Patient vital signs are continuously logged to SRAM; power interruption must not erase last 72 hours of waveform history. IC Role / Device Role / Timing Role: BQ2205LYPWRG4 provides battery-backed VOUT and synchronized RST to initialize logging firmware only after stable VCC is confirmed. Use Value: Enables >10-year SRAM data retention using single 3-V lithium cell, with tCER ensuring CPU reset completes before buffer writes resume. |
| Industrial PLC Memory Modules | Network Router Configuration Storage |
|
Use Scenario: Programmable logic controller retains I/O state and ladder logic in SRAM during factory floor power dips. IC Role / Device Role / Timing Role: BQ2205LYPWRG4 monitors VCC, asserts CECON1/CECON2 inactive on VPFD breach, and sustains VOUT from BCP until mains restore. Use Value: Eliminates need for supercapacitors or complex PMICs - single-chip solution meets IEC 61000-4-11 immunity for 10-ms dips. |
Use Scenario: Enterprise router stores routing tables and ACLs in SRAM; unexpected reboot must preserve configuration across power cycles. IC Role / Device Role / Timing Role: BQ2205LYPWRG4 conditions CE signals and gates SRAM writes during boot, while BW reports battery depletion to SNMP management agent. Use Value: Reduces BOM count by replacing discrete reset IC + backup switch + voltage monitor with one TSSOP-16 device. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar SRAM non-volatile controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6900APL+ | Single-bank only; no A-input bank selection; uses external MOSFET for VOUT switching; higher ICC(VCC) = 1.2 mA | Lacks dual-SRAM bank support and autonomous VOUT switchover; requires additional FET and gate driver | Select when cost sensitivity outweighs dual-bank capability and board space permits discrete switch design |
| DS1230YP-120+ | Legacy NVSRAM IC (integrated SRAM + controller); 120 ns CE delay; no CECONx conditioning; no BW output | Replaces SRAM entirely rather than supervising external SRAM; fixed 128 KB density; no battery health monitoring | Choose only for drop-in replacement of obsolete DS1230-based designs where memory size and latency are acceptable |
Compared with MAX6900APL+ and DS1230YP-120+, the BQ2205LYPWRG4 uniquely combines dual-bank hardware decoding, sub-25 ns CE propagation, integrated VOUT switching, and battery warning latching - enabling compact, high-reliability NVSRAM modules without external components or firmware dependency.
Availability
BQ2205LYPWRG4 is available at Aetrix Electronics and suitable for point-of-sale systems, medical instrumentation, and industrial PLCs requiring stable component supply with long-term lifecycle support and traceable sourcing.
Supply support for BQ2205LYPWRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and digital signal technologies, with over 90 years of innovation in power management and interface solutions.
The BQ2205LYPWRG4 belongs to TI's legacy non-volatile memory controller product line, engineered specifically for industrial and medical applications demanding robust, zero-software SRAM backup with deterministic power-fail response.
FAQ
What is the primary function of the BQ2205LYPWRG4 in an SRAM-based system?
The BQ2205LYPWRG4 serves as a hardware-based SRAM non-volatile controller that autonomously manages power switchover, write-protection, and system reset. It converts standard CMOS SRAM into battery-backed memory by monitoring VCC, switching VOUT between main and backup supplies, forcing CECON1/CECON2 inactive during power failure, and asserting RST for processor initialization - all without firmware involvement. Its core value lies in deterministic, sub-millisecond response to voltage anomalies.
Does the BQ2205LYPWRG4 support dual-bank SRAM configurations, and how is bank selection implemented?
Yes, the BQ2205LYPWRG4 natively supports dual-bank SRAM via its A input pin and dual CECON outputs (CECON1 and CECON2). When A = low, the active-low CE signal passes to CECON1; when A = high, it routes to CECON2. This hardware decoding eliminates external logic, allowing scalable NVSRAM designs using lower-density SRAM devices. The truth table in the datasheet confirms this behavior is independent of power state - functional only during VCC-valid operation.
What is the role of the BW pin on the BQ2205LYPWRG4, and how is its threshold determined?
The BW (Battery Warning) pin on the BQ2205LYPWRG4 is an open-drain output that latches low when the backup cell voltage (BCP) falls below 0.677×VCC during power-up. This threshold is internally generated and fixed - not user-adjustable. The latched state persists until next power cycle, enabling host systems to detect weak batteries before critical power loss. External pull-up is required; TI specifies ≤10 kΩ for reliable logic-level interpretation.
How does the BQ2205LYPWRG4 handle power-up sequencing, and what is the significance of tCER?
During power-up, the BQ2205LYPWRG4 holds CECON1 and CECON2 inactive for tCER (30–85 ms) after VCC crosses VPFD (2.9 V), regardless of CE input state. This enforced write-protection window ensures the connected microprocessor completes reset and initialization before SRAM access begins - preventing data corruption from premature writes. tCER is guaranteed across temperature and voltage, making it a deterministic design parameter for system timing budgets.
Can the BQ2205LYPWRG4 operate with rechargeable backup cells, or is it limited to primary lithium cells?
The BQ2205LYPWRG4 is specified for use with 3-V primary (non-rechargeable) lithium cells only, as stated in the Functional Description: "Backup energy source, BCP, input is provided [...] for use with an external primary cell." Its BCP input rating (2.0–4.0 V) and lack of charge control circuitry make it unsuitable for rechargeable chemistries like Li-ion or NiMH. Using rechargeables risks overvoltage damage or uncontrolled charging; TI explicitly designs this device for single-use lithium coin or cylindrical cells.
BQ2205LYPWRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Controller Type:
- Nonvolatile SRAM
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -20°C ~ 70°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
BQ2205LYPWRG4 FAQ
1.How can I place an order for BQ2205LYPWRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for BQ2205LYPWRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for BQ2205LYPWRG4 reliable?
The price and inventory of BQ2205LYPWRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for BQ2205LYPWRG4 is usually 5 days.
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Once your BQ2205LYPWRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for BQ2205LYPWRG4?
For technical support, including BQ2205LYPWRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your BQ2205LYPWRG4 requirements.
6.How does Aetrix verify that BQ2205LYPWRG4 is sourced from the original manufacturer or authorized distributors?
All BQ2205LYPWRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that BQ2205LYPWRG4 meets industry standards.
7.What is the process for return or replacement of BQ2205LYPWRG4?
All BQ2205LYPWRG4 units undergo pre-shipment inspection (PSI). If there is an issue with BQ2205LYPWRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The BQ2205LYPWRG4 part is unused and in its original packaging.
Return procedure for BQ2205LYPWRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
BQ2205LYPWRG4 Tags

-
BQ2201SN-N
Texas Instruments

-
DS1314S+
Analog Devices Inc./Maxim Integrated
-
BQ2205LYPW
Texas Instruments
-
MXD1210CSA+
Analog Devices Inc./Maxim Integrated

-
MXD1210CPA+
Analog Devices Inc./Maxim Integrated

-
4RCD0232KC1ATG
Renesas
-
DS1312S-2+
Analog Devices Inc./Maxim Integrated
-
DS1314S-2+T&R
Analog Devices Inc./Maxim Integrated

-
DS1321S+
Analog Devices Inc./Maxim Integrated

-
DS1312S+
Analog Devices Inc./Maxim Integrated
-
MXD1210ESA+
Analog Devices Inc./Maxim Integrated

-
DS1321E+
Analog Devices Inc./Maxim Integrated
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