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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Voltage Regulators - Linear, Low Drop Out (LDO) Regulators

onsemi CAT6243DCADJ-RKG

Name: CAT6243DCADJ-RKG
Brand: onsemi
SKU: CAT6243DCADJ-RKG
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: CAT6243DCADJ-RKG

Manufacturer:: onsemi

Category:: Voltage Regulators - Linear, Low Drop Out (LDO) Regulators

Package:: TO-252-6, DPAK (5 Leads + Tab)

Datasheet:: CAT6243DCADJ-RKG.pdf

Description:: IC REG LINEAR POS ADJ 1A DPAK-5

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Product details

Overview

CAT6243DCADJ-RKG from onsemi is an adjustable low-dropout CMOS voltage regulator delivering up to 1 A output current with 350 mV typical dropout at full load, ±2.0% output voltage accuracy at room temperature, and stable operation with ceramic output capacitors - used for powering DSP cores, FPGA I/O rails, and mobile device subsystems.

For engineers reviewing the CAT6243DCADJ-RKG datasheet, pinout, applications, or equivalent options, key selection criteria include adjustable 0.8 V–5.0 V output range, DPAK-5 package thermal performance (R_JT = 4.3 °C/W), shutdown ground current ≤5 µA, and compatibility with low-ESR ceramic capacitors down to 2.2 µF.

Technical Context

The CAT6243DCADJ-RKG implements a CMOS-based LDO architecture with internal error amplifier, precision bandgap reference (0.8 V at ADJ), and P-channel pass transistor enabling low dropout and fast transient response. It integrates under-voltage lockout (1.65–1.75 V threshold), thermal shutdown (145 °C), and current limiting (900 mA short-circuit protection).

Its enable logic is active-high with built-in 2.5 MΩ pull-down resistor; the BYP pin accepts 100–470 pF capacitor to reduce output noise by improving PSRR (54 dB @ 1 kHz) without requiring external compensation. The ADJ pin draws only 100 nA, supporting high-impedance resistor dividers for precise voltage setting.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Current	1000 mA continuous - supports high-current digital loads like FPGA I/O banks without derating at TA ≤ 85°C.
Output Voltage Range	0.8 V to 5.0 V adjustable - set via external resistor divider on ADJ pin; enables single BOM reuse across multiple rail voltages.
Dropout Voltage	350 mV typical at 1 A and VOUT = 2.5 V - allows operation from 3.3 V input to 2.5 V output with margin for line sag.
Output Accuracy	±2.0% at room temperature - ensures reliable power-on reset timing and logic-level compliance for 1.8 V/2.5 V/3.3 V interfaces.
Ground Current	70 µA no-load / 140 µA full-load - minimizes quiescent power in battery-backed systems and always-on subsystems.
PSRR	54 dB @ 1 kHz - suppresses switching noise from upstream DC-DC converters feeding the LDO input.
Thermal Resistance	R_JT = 4.3 °C/W (DPAK-5) - enables >1 W power dissipation with minimal PCB copper area when tab is soldered to ground plane.

Pinout & Package

Package: DPAK-5 (TO-252-5), 5-lead surface-mount package with exposed thermal tab (internally connected to GND). Requires soldering of tab to PCB ground plane for thermal performance.

Pin/Terminal	Circuit Role	Design Meaning
1 (VIN)	Positive Power Input	Supplies input power; must be decoupled with ≥1 µF ceramic capacitor adjacent to pin to maintain stability during line transients.
2 (GND)	Power Ground / Substrate	Reference node for all circuitry; center tab is electrically tied to GND and must be connected to PCB ground plane for heat sinking.
3 (BYP)	Bypass Input	Accepts 100–470 pF capacitor to ground to reduce output noise; floating or open is allowed, but grounding disables regulation.
4 (VOUT)	Regulated Output	Delivers adjusted output voltage; includes reverse-current blocking and active discharge transistor (ON during shutdown) to ensure clean power-down.
5 (EN)	Enable Control	Active-high logic input; 1.6 V min high threshold and 0.4 V max low threshold; internal 2.5 MΩ pull-down holds OFF if left unconnected.

Key Features

Feature	Design Value
Adjustable output voltage	0.8 V–5.0 V via two-resistor divider on ADJ pin - eliminates need for multiple fixed-output variants and simplifies BOM management.
Ultra-low ground current	70 µA no-load / 140 µA full-load - extends battery life in portable devices and reduces standby power in always-on applications.
Zero-current shutdown mode	≤5 µA shutdown current - enables true power gating for subsystems requiring deep sleep states.
Ceramic capacitor stability	Stable with 2.2 µF–22 µF ceramic COUT (ESR 5–500 mΩ) - avoids costly tantalum or electrolytic capacitors and improves reliability.
Integrated protection	Current limit (900 mA), thermal shutdown (145 °C), UVLO (1.65–1.75 V), and reverse-current blocking - reduces need for external protection components.

Applications

Mobile Baseband Power	FPGA I/O Rail Regulation
Use Scenario: Powering application processor core and memory interface in smartphones and tablets where input voltage varies between 3.3 V and 4.2 V from Li-ion battery. IC Role / Device Role / Timing Role: Primary LDO supplying 1.2 V or 1.8 V core voltage with fast load transient response to handle burst-mode CPU activity. Use Value: 350 mV dropout ensures regulation remains active down to 2.0 V battery voltage; 1 A capability supports multi-core SoC peak currents.	Use Scenario: Generating configurable I/O supply for Xilinx or Intel FPGAs where interface voltage must match peripheral standards (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V). IC Role / Device Role / Timing Role: Adjustable post-regulator after main DC-DC converter, providing clean, low-noise voltage for high-speed SerDes and memory interfaces. Use Value: ±2.0% accuracy guarantees setup/hold timing margins; 54 dB PSRR suppresses switching noise from upstream converter affecting signal integrity.
DSP Core Supply	Hard Disk Drive Logic Power
Use Scenario: Delivering 1.2 V or 1.5 V to TI or Analog Devices DSPs in audio processing, motor control, or industrial sensing modules. IC Role / Device Role / Timing Role: Low-noise, high-PSRR LDO ensuring analog-to-digital conversion accuracy and minimizing clock jitter in mixed-signal systems. Use Value: 45 µV_rms output noise (10 Hz–100 kHz) preserves SNR in ADC front-ends; ADJ pin bias <100 nA enables high-resistance dividers to minimize power loss.	Use Scenario: Providing regulated 3.3 V or 5.0 V to HDD controller ASICs and buffer memory in consumer and enterprise storage systems. IC Role / Device Role / Timing Role: Secondary LDO isolating sensitive logic from noisy motor drive circuits and ensuring clean POR sequencing. Use Value: Active discharge transistor pulls VOUT to 0 V within microseconds upon EN deactivation - prevents latch-up and ensures deterministic reset behavior.

Mobile Baseband Power

FPGA I/O Rail Regulation

Use Scenario: Powering application processor core and memory interface in smartphones and tablets where input voltage varies between 3.3 V and 4.2 V from Li-ion battery.

IC Role / Device Role / Timing Role: Primary LDO supplying 1.2 V or 1.8 V core voltage with fast load transient response to handle burst-mode CPU activity.

Use Value: 350 mV dropout ensures regulation remains active down to 2.0 V battery voltage; 1 A capability supports multi-core SoC peak currents.

Use Scenario: Generating configurable I/O supply for Xilinx or Intel FPGAs where interface voltage must match peripheral standards (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V).

IC Role / Device Role / Timing Role: Adjustable post-regulator after main DC-DC converter, providing clean, low-noise voltage for high-speed SerDes and memory interfaces.

Use Value: ±2.0% accuracy guarantees setup/hold timing margins; 54 dB PSRR suppresses switching noise from upstream converter affecting signal integrity.

DSP Core Supply

Hard Disk Drive Logic Power

Use Scenario: Delivering 1.2 V or 1.5 V to TI or Analog Devices DSPs in audio processing, motor control, or industrial sensing modules.

IC Role / Device Role / Timing Role: Low-noise, high-PSRR LDO ensuring analog-to-digital conversion accuracy and minimizing clock jitter in mixed-signal systems.

Use Value: 45 µV_rms output noise (10 Hz–100 kHz) preserves SNR in ADC front-ends; ADJ pin bias <100 nA enables high-resistance dividers to minimize power loss.

Use Scenario: Providing regulated 3.3 V or 5.0 V to HDD controller ASICs and buffer memory in consumer and enterprise storage systems.

IC Role / Device Role / Timing Role: Secondary LDO isolating sensitive logic from noisy motor drive circuits and ensuring clean POR sequencing.

Use Value: Active discharge transistor pulls VOUT to 0 V within microseconds upon EN deactivation - prevents latch-up and ensures deterministic reset behavior.

Equivalent & Alternatives

The following parts are listed as comparable options for similar adjustable LDO regulator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
NCP1117DTADJG	Fixed 1.25 V reference; higher 1.2 V typical dropout at 1 A; TO-252-3 package (no EN pin); R_JA = 65 °C/W.	Lacks enable control and BYP noise-reduction pin; less suitable for battery-powered or noise-sensitive designs.	Choose when cost sensitivity outweighs need for shutdown control or ultra-low noise.
TPS7A4701RGWR	Lower 20 µV_rms noise; 200 mA output; WQFN-20 package; requires external compensation capacitor.	Not pin-compatible; lower current rating limits use to low-power analog rails, not digital I/O or core supplies.	Prefer for ultra-low-noise analog subsystems where 1 A output is unnecessary.

Compared with NCP1117DTADJG and TPS7A4701RGWR, CAT6243DCADJ-RKG uniquely balances 1 A output, integrated enable/shutdown, ceramic-capacitor stability, and DPAK-5 thermal performance - making it optimal for space-constrained, high-current embedded systems requiring both flexibility and robustness.

Availability

CAT6243DCADJ-RKG is available at Aetrix Electronics and suitable for FPGA power delivery, mobile baseband subsystems, and industrial DSP applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for CAT6243DCADJ-RKG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor manufacturer specializing in energy-efficient power management, analog, sensor, and connectivity solutions for automotive, industrial, cloud, and consumer markets.

CAT6243DCADJ-RKG belongs to onsemi's high-performance LDO regulator product line, designed specifically for demanding portable and embedded applications where low dropout, low quiescent current, and ceramic-capacitor compatibility are critical.

FAQ

What is the minimum input voltage required for CAT6243DCADJ-RKG to regulate a 1.2 V output?

The minimum input voltage for CAT6243DCADJ-RKG is the greater of 1.8 V or (VOUT + VDO). For a 1.2 V output, typical dropout is 600 mV at 300 mA (per Table 5), so VIN must be ≥1.8 V. At 1 A and VOUT = 1.2 V, dropout rises to ~625 mV, still satisfying VIN ≥ 1.8 V. Thus, CAT6243DCADJ-RKG can regulate 1.2 V from a 1.8 V input source, provided load current stays within safe operating area.

Can CAT6243DCADJ-RKG operate without a bypass capacitor on the BYP pin?

Yes, CAT6243DCADJ-RKG operates fully functional without a BYP capacitor. The BYP pin may be left open or floating; grounding it will disrupt regulation. Omitting the BYP capacitor increases output noise (e.g., 45 µV_rms becomes higher) and reduces PSRR, but does not affect basic voltage regulation. Use of 100–470 pF on BYP is optional and recommended only for noise-sensitive analog rails.

How does the thermal performance of CAT6243DCADJ-RKG compare between DPAK-5 and WDFN-6 packages?

CAT6243DCADJ-RKG uses the DPAK-5 package (R_JT = 4.3 °C/W), offering significantly better thermal resistance than the WDFN-6 variant (R_JL = 10 °C/W). With identical PCB layout (tab soldered to ground plane), DPAK-5 dissipates >1 W at TA = 25°C before reaching TJ = 125°C, whereas WDFN-6 reaches thermal limit at ~0.8 W. This makes CAT6243DCADJ-RKG ideal for higher-power applications where board space permits DPAK-5 mounting.

What is the purpose of the ADJ pin on CAT6243DCADJ-RKG, and how is it connected for a 3.3 V output?

The ADJ pin on CAT6243DCADJ-RKG sets output voltage via a resistor divider between VOUT and GND. For 3.3 V output, use Equation 3 from the datasheet: R1 = R2 × (VOUT − 0.8 V)/0.8 V. With R2 = 8 kΩ (to ensure ≥100 µA divider current), R1 = 8 kΩ × (3.3 − 0.8)/0.8 = 25 kΩ. The ADJ pin draws only 100 nA, so resistor values can be scaled upward to reduce power loss while maintaining accuracy.

Does CAT6243DCADJ-RKG provide reverse-current protection, and how is it implemented?

Yes, CAT6243DCADJ-RKG includes inherent reverse-current protection. When VOUT exceeds VIN, the internal P-channel pass transistor turns OFF, blocking current flow from output to input. This prevents backfeeding into upstream power sources - critical in systems with multiple regulators or battery backup paths. Unlike external diode solutions, this feature adds no forward voltage drop or power loss during normal operation.

CAT6243DCADJ-RKG Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: -

Package/Case:: TO-252-6, DPAK (5 Leads + Tab)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Output Configuration:: Positive

Output Type:: Adjustable

Number of Regulators:: 1

Voltage - Input (Max):: 5.5V

Voltage - Output (Min/Fixed):: 0.8V

Voltage - Output (Max):: 5V

Voltage Dropout (Max):: 0.275V @ 1A

Current - Output:: 1A

Current - Quiescent (Iq):: 100 µA

Current - Supply (Max):: 250 µA

PSRR:: 54dB ~ 42dB (1kHz ~ 20kHz)

Control Features:: Enable

Protection Features:: Over Current, Over Temperature, Under Voltage Lockout (UVLO)

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: TO-252 (DPAK)

CAT6243DCADJ-RKG FAQ

1.How can I place an order for CAT6243DCADJ-RKG through Aetrix?

Please submit a Request for Quotation (RFQ) for CAT6243DCADJ-RKG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for CAT6243DCADJ-RKG reliable?

The price and inventory of CAT6243DCADJ-RKG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CAT6243DCADJ-RKG is usually 5 days.

3.What payment methods are accepted for CAT6243DCADJ-RKG?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CAT6243DCADJ-RKG transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for CAT6243DCADJ-RKG?

CAT6243DCADJ-RKG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your CAT6243DCADJ-RKG order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for CAT6243DCADJ-RKG?

For technical support, including CAT6243DCADJ-RKG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CAT6243DCADJ-RKG requirements.

6.How does Aetrix verify that CAT6243DCADJ-RKG is sourced from the original manufacturer or authorized distributors?

All CAT6243DCADJ-RKG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CAT6243DCADJ-RKG meets industry standards.

7.What is the process for return or replacement of CAT6243DCADJ-RKG?

All CAT6243DCADJ-RKG units undergo pre-shipment inspection (PSI). If there is an issue with CAT6243DCADJ-RKG, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The CAT6243DCADJ-RKG part is unused and in its original packaging.

Return procedure for CAT6243DCADJ-RKG:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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