NXP Semiconductors CBT3126PW,112

Overview

CBT3126PW,112 from NXP Semiconductors is a quad FET bus switch with independent line control, designed for high-speed bidirectional signal routing in 5 V TTL-compatible digital systems. It features four independent A-B switches, each enabled by a dedicated OE input, 5 Ω typical ON resistance at 4.5 V, sub-0.25 ns propagation delay, and operation across −40 °C to +85 °C - used in address/data bus isolation and hot-swap I/O buffering.

For engineers reviewing the CBT3126PW,112 datasheet, CBT3126PW,112 pinout, CBT3126PW,112 application, or CBT3126PW,112 equivalent, key selection criteria include guaranteed 5 Ω R_ON at 4.5 V, 4.5–5.5 V supply compliance, TSSOP14 package footprint, and OE-controlled per-channel switching without direction pins or level translation.

Technical Context

The CBT3126PW,112 implements four independent single-pole single-throw (SPST) FET switches using NMOS pass transistors with integrated gate drive circuitry. Each channel connects A and B terminals bidirectionally when its OE input is HIGH, with no internal pull-ups or direction logic.

Switching is controlled solely by TTL-compatible OE inputs (V_IL ≤ 0.8 V, V_IH ≥ 2.0 V), and the device draws only 3 µA typical ICC with all OEs inactive. It provides latch-up immunity >500 mA and ESD protection exceeding 2000 V HBM, enabling robust use in board-level signal gating applications.

Key Specifications

Pinout & Package

TSSOP14 package (SOT402-1): plastic thin shrink small outline, 14 leads, 4.4 mm body width, 0.65 mm lead pitch, exposed pad not present.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad bus switch applications.

Compared with SN74CBT3126PWR, the CBT3126PW,112 offers tighter R_ON tolerance and higher HBM ESD rating; versus 74LVC1G126GW,125, it delivers true quad integration in one TSSOP14 footprint with guaranteed 5 V operation and lower ON resistance - making it optimal for industrial 5 V bus gating where reliability and layout efficiency are primary.

Availability

CBT3126PW,112 is available at Aetrix Electronics and suitable for memory bus isolation, hot-swap I/O buffering, FPGA configuration interfaces, test access port multiplexing, and industrial backplane signal routing requiring stable component supply and long-term manufacturability.

Supply support for CBT3126PW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The CBT3126PW,112 belongs to NXP's legacy logic and interface portfolio, engineered specifically for high-speed, low-distortion signal gating in 5 V digital systems - targeting applications where minimal propagation delay, predictable ON resistance, and industrial temperature operation are essential.

FAQ

What is the maximum continuous current per switch in the CBT3126PW,112?

The CBT3126PW,112 supports up to 128 mA continuous current through each individual A-B switch path, as specified in Table 4 (Limiting Values) of the NXP datasheet. This rating applies across the full −40 °C to +85 °C operating temperature range and is validated under steady-state conditions with proper PCB thermal design. Exceeding this current may increase R_ON and risk thermal overstress.

Does the CBT3126PW,112 require external pull-up or pull-down resistors on its OE inputs?

No, the CBT3126PW,112 does not require external pull-up or pull-down resistors on its OE inputs. The device specifies TTL-compatible input thresholds (V_IL ≤ 0.8 V, V_IH ≥ 2.0 V) and has negligible input leakage (±1 µA), allowing direct connection to 5 V logic outputs or open-drain drivers. Unused OE inputs must be held at V_CC or GND per Table 5 to ensure deterministic switch state.

Can the CBT3126PW,112 operate reliably at 3.3 V supply voltage?

No, the CBT3126PW,112 is not characterized or guaranteed for 3.3 V operation. Its recommended operating conditions specify V_CC = 4.5 V to 5.5 V (Table 5), and R_ON performance degrades significantly below 4.5 V. For 3.3 V systems, consider NXP's 74LVC series or compatible alternatives explicitly rated for 3.3 V logic levels and R_ON.

Is the CBT3126PW,112 pin-compatible with the CBT3126D (SO14) variant?

Yes, the CBT3126PW,112 (TSSOP14/SOT402-1) shares identical pin numbering and function mapping with the CBT3126D (SO14/SOT108-1) variant, as confirmed in Table 2 (Pin description) and Figures 3–4 of the datasheet. Both use the same 1OE–4OE, 1A–4A, 1B–4B, V_CC, and GND assignment on pins 1–14, enabling direct PCB footprint substitution with only package size and soldering process adjustments.

What is the off-state capacitance (C_io(off)) of the CBT3126PW,112, and why does it matter?

The CBT3126PW,112 exhibits 3.4 pF typical off-state input/output capacitance (C_io(off)) per switch, measured with OE = V_CC and VO = 3 V or 0 V (Table 6). This low value minimizes capacitive loading on adjacent signal lines when the switch is disabled, preserving signal integrity and reducing crosstalk in high-density routing - especially critical in DDR memory buses and high-speed serial interfaces.