Nexperia USA Inc. CBTD3384D,118

Overview

CBTD3384D,118 from Nexperia is a dual 5-pole, single-throw bus switch IC designed for bidirectional 5 V to 3.3 V level shifting, featuring two active-low output enables (1OE, 2OE), 5 Ω typical ON resistance, IOFF partial power-down support, and operation from –40 °C to +85 °C in TSSOP24 packaging. It enables isolated control of two independent 5-bit data paths in mixed-voltage memory or peripheral buses.

For engineers reviewing the CBTD3384D,118 datasheet, CBTD3384D,118 pinout, CBTD3384D,118 application, or CBTD3384D,118 equivalent, this device serves as a low-latency, latch-up-resistant bus switch for voltage-domain bridging in industrial controllers, FPGA I/O expansion, and legacy-to-modern interface adapters where TTL-compatible switching and thermal robustness are required.

Technical Context

The CBTD3384D implements two independent 5-channel analog bus switches with separate enable inputs (1OE, 2OE), each controlling bidirectional signal flow between A-port (1A1–1A5 / 2A1–2A5) and B-port (1B1–1B5 / 2B1–2B5) pins. Switch conduction occurs only when the corresponding nOE is LOW; HIGH places the channel in high-impedance OFF-state (Z).

Its IOFF circuitry ensures leakage current remains below ±1 μA when VCC = 0 V, enabling safe partial power-down in multi-rail systems. The device uses no internal level-shifting circuitry-voltage translation arises inherently from its pass-transistor architecture, allowing direct interfacing between 5 V TTL and 3.3 V CMOS logic domains without external biasing.

Key Specifications

Pinout & Package

TSSOP24 package (SOT355-1), plastic thin shrink small outline, 24-pin, body width 4.4 mm, lead pitch 0.65 mm, maximum height 1.1 mm.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar bus switch applications.

Compared with SN74CBT3384CPWR and 74LVC1G3157GW, CBTD3384D,118 uniquely delivers dual independent 5-bit switching with IOFF-enabled partial power-down in a single TSSOP24 package - making it the only option that simultaneously satisfies high-density level shifting, rail isolation, and industrial temperature compliance without design compromises.

Availability

CBTD3384D,118 is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, FPGA-to-microcontroller interface, and legacy memory adapter applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing from authorized channels.

Supply support for CBTD3384D,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer headquartered in Nijmegen, Netherlands, specializing in high-performance, high-reliability logic, analog, and discrete components for industrial, automotive, and computing markets.

CBTD3384D,118 belongs to Nexperia's CBT-family of bus switches, engineered specifically for low-latency, low-RON bidirectional signal routing in mixed-voltage digital systems - emphasizing robustness, ESD resilience, and seamless integration into legacy-to-modern interface bridges.

FAQ

Can CBTD3384D,118 operate with 3.3 V on VCC?

No. CBTD3384D,118 is specified only for 4.5 V to 5.5 V VCC operation. Its internal pass transistor threshold and timing characteristics are optimized for 5 V rail use. Applying 3.3 V to VCC will result in undefined switching behavior, excessive RON (>100 Ω), and failure to meet propagation delay or enable-time specifications.

Does CBTD3384D,118 support unidirectional signal flow?

Yes - though inherently bidirectional, unidirectional operation is achieved by holding one port (e.g., all 1Bn pins) at static logic levels while driving the other (1An). The device does not require direction control pins; signal direction is determined solely by external driver/receiver placement and OE state.

What is the maximum capacitive load the CBTD3384D,118 can drive?

The device is characterized up to 50 pF load capacitance (per channel) with guaranteed 0.25 ns propagation delay and 7.0 ns enable time. Driving loads >50 pF increases propagation delay nonlinearly and may violate timing margins in high-speed buses; external buffering is recommended beyond this limit.

How does IOFF protect the device during partial power-down?

When VCC = 0 V, the IOFF circuit disables all internal switch transistors and clamps I/O pins to prevent current flow between powered and unpowered sections. Measured leakage remains ≤±1 μA per pin, eliminating risk of back-powering, latch-up, or damage to downstream 3.3 V logic during system sleep or hot-swap sequences.