NXP Semiconductors CBTS3384PW,112
- Part No.:
- CBTS3384PW,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 24-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
CBTS3384PW,112.pdf
- Description:
- IC BUS SWITCH 5 X 1:1 24TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CBTS3384PW,112 from NXP Semiconductors (formerly Philips) is a 10-bit TTL-compatible bus switch with dual 5-bit sections, 5 Ω on-resistance, 250 ps propagation delay at 5 V, and Schottky undershoot protection. It operates from -40 to +85 °C and supports high-speed data routing in backplane and memory interface applications.
For engineers reviewing the CBTS3384PW,112 datasheet, CBTS3384PW,112 pinout, CBTS3384PW,112 application, or CBTS3384PW,112 equivalent, key selection criteria include output-enable timing (tPZH/tPHZ ≤ 5.7 ns), low input/output capacitance (CIN = 4 pF, COUT = 10 pF), latch-up immunity (>500 mA), and TSSOP-24 package compatibility with high-density PCB layouts.
Technical Context
The CBTS3384PW,112 implements two independent 5-bit bidirectional bus switches, each controlled by a dedicated OE input (1OE and 2OE). Its low on-resistance (5–7 Ω typical) enables minimal signal degradation across A-B paths, while TTL-compatible control thresholds (VIL ≤ 0.8 V, VIH ≥ 2.0 V) ensure seamless integration with legacy logic families.
Undershoot protection is implemented via integrated Schottky clamps on all I/O pins, limiting negative excursions to -1.2 V under 400 µA fault current. The device features high-impedance isolation when OE is HIGH and supports hot-swap capable operation with power-off leakage <10 pF and ICCZ ≤ 3 µA at 5.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| On-resistance (ron) | 5–7 Ω typical - ensures minimal voltage drop and signal attenuation in high-speed data paths |
| Propagation delay (tPD) | 250 ps max at CL = 50 pF - supports >1 GHz switching in short trace applications |
| Output enable/disable time | 1.0–6.6 ns - enables precise timing control for burst-mode bus arbitration |
| Input capacitance (CIN) | 4 pF - reduces loading on driving logic and preserves edge integrity |
| Supply voltage range | 4.5–5.5 V - compatible with standard 5 V TTL and LVTTL systems |
| ESD protection | 2000 V HBM / 200 V MM / 1000 V CDM - meets industrial handling requirements |
| Operating temperature | -40 to +85 °C - qualified for extended industrial environment deployment |
Pinout & Package
CBTS3384PW,112 is housed in a 24-pin TSSOP package (SOT355-1), 4.4 mm body width, 0.65 mm lead pitch, surface-mount compatible with automated assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13 | 1OE, 2OE | Active-low enable inputs controlling respective 5-bit switch sections independently |
| 2, 5, 6, 9, 10 | 1B1–1B5 | Outputs of first 5-bit switch section (A↔B path enabled when 1OE = LOW) |
| 3, 4, 7, 8, 11 | 1A1–1A5 | Inputs/outputs of first 5-bit switch section - bidirectional with no direction control |
| 14, 17, 18, 21, 22 | 2A1–2A5 | Inputs/outputs of second 5-bit switch section - electrically isolated from first section |
| 15, 16, 19, 20, 23 | 2B1–2B5 | Outputs of second 5-bit switch section (A↔B path enabled when 2OE = LOW) |
| 12 | GND | Ground reference for all I/O and internal circuitry - must be low-impedance connection |
| 24 | VCC | +5 V supply - decoupling capacitor (0.1 µF) required adjacent to pin |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent 5-bit bus switches | Enables concurrent routing of two separate data streams without crosstalk or shared control latency |
| Schottky undershoot protection | Clamps negative transients to -1.2 V, preventing shoot-through during signal transitions or hot insertion |
| Latch-up immunity >500 mA | Guarantees robust operation under transient overcurrent events per JESD78 Class II |
| TTL-compatible I/O levels | Supports direct interfacing with 74LS, 74ALS, and other 5 V logic families without level-shifting |
| Low quiescent supply current | ICCZ ≤ 3 µA when outputs disabled - critical for low-power standby modes in modular systems |
Applications
| Memory Interfacing | Backplane Data Routing |
|---|---|
|
Use Scenario: Isolating address/data lines between CPU and multiple SRAM banks during bank-select arbitration. IC Role / Device Role / Timing Role: Bidirectional bus switch enabling dynamic path selection with sub-nanosecond timing precision. Use Value: Eliminates contention during memory access handoff; 5 Ω Ron ensures <50 mV voltage drop at 100 mA drive current. |
Use Scenario: Multiplexing parallel control signals across redundant backplane slots in telecom shelf controllers. IC Role / Device Role / Timing Role: Dual-section switch providing independent enable control for primary/backup signal paths. Use Value: Enables failover switching with <6 ns disable-to-enable transition, minimizing system interruption window. |
| Legacy Logic Interface | Hot-Swappable Module I/O |
|
Use Scenario: Bridging 5 V TTL peripherals (e.g., UARTs, GPIO expanders) to modern microcontrollers with 3.3 V I/O. IC Role / Device Role / Timing Role: Level-tolerant passive switch leveraging TTL-compatible thresholds without active translation. Use Value: Avoids timing skew introduced by active translators; 4 pF CIN preserves rise/fall times below 1 ns. |
Use Scenario: Protecting host controller I/O pins during insertion/removal of mezzanine cards in industrial PLC racks. IC Role / Device Role / Timing Role: Undershoot-protected switch isolating live backplane traces from module-side transients. Use Value: Schottky clamps limit negative spikes to -1.2 V, preventing gate oxide stress on connected ASICs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBT3384CPWR | Same 10-bit dual-OE architecture, 5.5 V max VCC, but higher Ron (6–9 Ω) and wider tPD range (0.2–0.4 ns) | Valid for 5 V systems requiring identical pinout and function; not qualified for -40 °C operation | Select when TI's packaging or logistics ecosystem is preferred; verify thermal derating above 70 °C |
| 74LVC1G3157GW,125 | Single-pole double-throw analog switch, 5 V tolerant, but only 1 channel and no dual-OE control | Applicable only for point-to-point signal gating, not multi-bit bus isolation | Use only for low-channel-count designs where density and cost outweigh need for 10-bit concurrency |
Compared with SN74CBT3384CPWR and 74LVC1G3157GW,125, the CBTS3384PW,112 delivers tighter on-resistance control (5–7 Ω vs. 6–9 Ω), guaranteed -40 °C operation, and true dual 5-bit independence-making it optimal for industrial backplanes and memory subsystems demanding deterministic timing and ruggedness.
Availability
CBTS3384PW,112 is available at Aetrix Electronics and suitable for memory interfacing, backplane data routing, and legacy logic interface applications requiring stable component supply, long-term lifecycle support, and industrial temperature qualification.
Supply support for CBTS3384PW,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors, formerly Philips Semiconductors, is a global leader in high-performance analog and mixed-signal ICs, with core expertise in automotive, industrial, and communication semiconductors.
The CBTS3384PW,112 belongs to NXP's legacy logic bus switch family, designed specifically for high-speed, low-latency signal routing in industrial control, telecom infrastructure, and embedded computing platforms.
FAQ
What is the maximum operating voltage for CBTS3384PW,112?
The CBTS3384PW,112 has an absolute maximum DC supply voltage (VCC) of +7.0 V, but its recommended operating range is strictly 4.5 V to 5.5 V per the datasheet. Operating outside this range may compromise timing accuracy, increase on-resistance, or trigger latch-up. The CBTS3384PW,112 is not rated for 3.3 V operation and requires a stable 5 V rail.
Does CBTS3384PW,112 support hot-swap functionality?
Yes, the CBTS3384PW,112 supports hot-swap operation due to its Schottky undershoot protection (limiting negative excursions to -1.2 V), low power-off leakage (<10 pF), and high-impedance isolation when OE is HIGH. These features prevent bus contention and transient damage during live insertion, making the CBTS3384PW,112 suitable for modular telecom and industrial rack systems.
How many independent switch sections does CBTS3384PW,112 contain?
The CBTS3384PW,112 contains two fully independent 5-bit bus switch sections, each with its own output-enable input (1OE and 2OE). This allows simultaneous but separately controlled routing of two 5-bit data paths - for example, isolating address and data buses or managing redundant signal lanes. The CBTS3384PW,112 does not provide 10-bit unified control.
What package type is used for CBTS3384PW,112?
The CBTS3384PW,112 uses a 24-pin TSSOP package (SOT355-1), measuring 4.4 mm wide with 0.65 mm lead pitch. It is RoHS-compliant, surface-mount compatible, and optimized for high-density PCB layouts. This package differs from the SO (SOT137-1), SSOP (SOT340-1), and QSOP (SOT556-1) variants offered for the same CBTS3384 family.
Is CBTS3384PW,112 pin-compatible with other CBTS3384 variants?
Yes, all CBTS3384 variants-including CBTS3384PW,112, CBTS3384D, CBTS3384DB, and CBTS3384DK-share identical pinouts and electrical functionality. The only differences are mechanical: package type (TSSOP vs. SO vs. SSOP), body width, and thermal characteristics. Therefore, CBTS3384PW,112 can be substituted for other variants without PCB layout changes, provided soldering and reflow profiles match TSSOP requirements.
CBTS3384PW,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74CBTS
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Type:
- Bus Switch
- Circuit:
- 5 x 1:1
- Independent Circuits:
- 2
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP
CBTS3384PW,112 FAQ
1.How can I place an order for CBTS3384PW,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for CBTS3384PW,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CBTS3384PW,112 reliable?
The price and inventory of CBTS3384PW,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CBTS3384PW,112 is usually 5 days.
3.What payment methods are accepted for CBTS3384PW,112?
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4.How is shipping managed for CBTS3384PW,112?
CBTS3384PW,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CBTS3384PW,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CBTS3384PW,112?
For technical support, including CBTS3384PW,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CBTS3384PW,112 requirements.
6.How does Aetrix verify that CBTS3384PW,112 is sourced from the original manufacturer or authorized distributors?
All CBTS3384PW,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CBTS3384PW,112 meets industry standards.
7.What is the process for return or replacement of CBTS3384PW,112?
All CBTS3384PW,112 units undergo pre-shipment inspection (PSI). If there is an issue with CBTS3384PW,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CBTS3384PW,112 part is unused and in its original packaging.
Return procedure for CBTS3384PW,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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