Texas Instruments CD4013BM96E4
- Part No.:
- CD4013BM96E4
- Manufacturer:
- Texas Instruments
- Category:
- Flip Flops
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD4013BM96E4.pdf
- Description:
- IC FF D-TYPE DUAL 1BIT 14SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CD4013BM96E4 from Texas Instruments is a CMOS dual D-type flip-flop IC with independent clock, data, set, and reset inputs per channel, delivering positive-edge-triggered storage functionality across a 3 V to 18 V supply range. It features symmetrical output drive (±6.8 mA at 15 V), 16 MHz max clock toggle rate (at 10 V), and operates from –55°C to +125°C - used in power button debouncing, divide-by-two clock generation, and shift register stages in industrial control logic.
For engineers reviewing the CD4013BM96E4 datasheet, CD4013BM96E4 pinout, CD4013BM96E4 application, or CD4013BM96E4 equivalent, key selection criteria include its wide-voltage rail tolerance, asynchronous set/reset capability, static CMOS operation with sub-1 µA quiescent current at 25°C, and SOIC-14 packaging suitable for space-constrained industrial PCBs.
Technical Context
The CD4013BM96E4 implements two identical, electrically isolated D-type flip-flops with master-slave architecture, each triggered on the rising edge of the clock input. Its logic state transfer occurs only during positive-going transitions, while set and reset functions operate asynchronously and override clock timing.
Input protection includes integrated CMOS clamp networks; output drive strength scales with supply voltage (e.g., ±1.3 mA at 10 V, ±3.4 mA at 15 V), and propagation delay ranges from 45 ns (typical, 15 V) to 300 ns (max, 5 V) under 50 pF load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 3 V to 18 V - supports single-rail operation across battery, industrial, and legacy logic systems without level-shifting. |
| Max Clock Frequency | 16 MHz (typical at VDD = 10 V) - enables use in medium-speed timing and counting applications up to ~62.5 ns minimum clock period. |
| Propagation Delay (tPLH/tPHL) | 45–90 ns (typical at VDD = 15 V, CL = 50 pF) - defines minimum setup/hold timing margins for synchronous system integration. |
| Output Drive Current | ±6.8 mA (min at VDD = 15 V) - sufficient to directly drive LEDs, small relays, or interface with TTL/CMOS inputs without external buffers. |
| Quiescent Supply Current | 0.02 µA (typical at VDD = 5 V, TA = 25°C) - enables ultra-low-power hold-state operation in battery-backed memory or standby circuits. |
| Operating Temperature | –55°C to +125°C - qualified for automotive under-hood, industrial motor control, and aerospace environments. |
| Input Thresholds (VIH/VIL) | VIL ≤ 4 V, VIH ≥ 11 V (at VDD = 15 V) - provides 2.5 V noise margin, ensuring robust immunity against supply ripple and crosstalk. |
Pinout & Package
CD4013BM96E4 is housed in a 14-pin SOIC (D) package measuring 8.65 mm × 3.90 mm, with gull-wing leads and RoHS-compliant NiPdAu plating. It is rated MSL Level-1 (unlimited floor life) and compatible with standard reflow profiles.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13 | Q1, Q2 | Non-inverted outputs - provide true logic state of respective flip-flop; buffered for fan-out capability. |
| 2, 12 | Q1, Q2 | Inverted outputs - deliver complementary logic states; usable for differential signaling or feedback paths. |
| 3, 11 | CLOCK1, CLOCK2 | Positive-edge-triggered clock inputs - initiate data capture only on rising transition; asynchronous set/reset take priority. |
| 4, 10 | RESET1, RESET2 | Active-high asynchronous reset - forces Q = 0 and Q = 1 regardless of clock or data state. |
| 5, 9 | D1, D2 | Data inputs - sampled on next clock rising edge; must meet setup/hold time (e.g., 7 ns min setup at VDD = 15 V). |
| 6, 8 | SET1, SET2 | Active-high asynchronous set - forces Q = 1 and Q = 0 regardless of clock or data state. |
| 7 | VSS | Ground reference - all input thresholds and output levels referenced to this node; requires low-impedance connection. |
| 14 | VDD | Positive supply rail - powers both flip-flop sections; bypass capacitor (0.1 µF) required adjacent to pin for noise suppression. |
Key Features
| Feature | Design Value |
|---|---|
| Asynchronous Set-Reset | Independent high-level assertion on SET/RESET pins overrides clock and data, enabling immediate state initialization or fault recovery. |
| Wide Supply Range | Operates from 3 V to 18 V - eliminates need for separate voltage regulators in mixed-supply systems (e.g., 3.3 V MCU + 12 V actuator interface). |
| Static CMOS Operation | Sub-µA quiescent current at room temperature - critical for always-on monitoring circuits and energy-harvesting applications. |
| Symmetrical Output Drive | Matched sourcing/sinking capability (e.g., ±3.4 mA at 15 V) - ensures consistent rise/fall times and reduces signal distortion in clock distribution. |
| High Noise Immunity | 2.5 V noise margin at 15 V supply - prevents false triggering in electrically noisy environments like motor drives or PLC backplanes. |
Applications
| Power Button Debouncing | Divide-by-Two Clock Generator |
|---|---|
|
Use Scenario: Mechanical push-button switch interfacing with microcontroller GPIO, requiring elimination of contact bounce artifacts before system wake-up. IC Role / Device Role / Timing Role: CD4013BM96E4 acts as a synchronous SR latch with clocked sampling; one section captures stable button state on first clean press edge. Use Value: Eliminates software debounce overhead and guarantees deterministic hardware-level edge detection with <100 ns response latency. |
Use Scenario: Deriving a precise 50% duty-cycle clock signal at half the frequency of a master oscillator for peripheral timing or ADC sampling control. IC Role / Device Role / Timing Role: CD4013BM96E4 configured as a toggle flip-flop (Q connected to D) divides input clock by two with zero duty-cycle drift. Use Value: Provides jitter-free division without external components, maintaining phase coherence between input and output clocks across temperature. |
| Shift Register Stage | State Memory Latch |
|
Use Scenario: Serial-to-parallel conversion in LED matrix drivers or sensor array readout where multiple CD4013BM96E4 devices cascade via Q→D connections. IC Role / Device Role / Timing Role: Each CD4013BM96E4 stores one bit of serial data on clock edge; Q outputs feed next stage's D input in daisy-chain topology. Use Value: Enables low-cost, low-power shift register implementation using only dual DFFs - no dedicated shift-register IC required. |
Use Scenario: Retaining configuration bits (e.g., calibration mode, fail-safe defaults) during MCU reset or brownout events in industrial controllers. IC Role / Device Role / Timing Role: CD4013BM96E4 holds volatile state independently of processor clock; powered directly from backup rail or unswitched supply. Use Value: Preserves critical operational state without nonvolatile memory access latency or write-cycle endurance limitations. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4013BME4 | Same die, SOIC-14 tube packaging (50 pcs); CD4013BM96E4 uses tape-and-reel (2500 pcs) with identical electrical specs and MSL-1 rating. | Preferred for prototyping and low-volume validation due to tube format; same thermal and timing behavior as CD4013BM96E4. | Select CD4013BME4 when manual placement or small-batch evaluation is needed; CD4013BM96E4 is optimized for automated SMT production. |
| MC14013BDR2G | Onsemi variant with identical pinout and function but tighter propagation delay variation (±15 ns vs ±45 ns typical), higher ESD rating (4 kV HBM), and extended temp range (–55°C to +125°C same). | Used in safety-critical automotive body electronics where tighter timing skew and higher ESD robustness are mandated. | Choose MC14013BDR2G for AEC-Q100-compliant designs; CD4013BM96E4 remains optimal for cost-sensitive industrial and consumer applications. |
Compared with CD4013BME4, CD4013BM96E4 offers identical functionality in high-volume tape-and-reel format for SMT line efficiency; versus MC14013BDR2G, it trades minor timing variance and ESD margin for broader distributor availability and lower unit cost in non-automotive contexts.
Availability
CD4013BM96E4 is available at Aetrix Electronics and suitable for industrial control panels, power management subsystems, and embedded instrumentation requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for CD4013BM96E4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 90 years of innovation in reliable, high-performance IC design.
The CD4013B series was developed for robust, wide-voltage digital logic in harsh environments - targeting industrial automation, power infrastructure, and medical equipment where rail flexibility and temperature resilience are essential.
FAQ
What is the maximum clock frequency supported by the CD4013BM96E4?
The CD4013BM96E4 supports a maximum clock input frequency of 16 MHz (typical) at VDD = 10 V, and up to 24 MHz (typical) at VDD = 15 V. These values assume CL = 50 pF and TA = 25°C; actual achievable frequency decreases with higher load capacitance, elevated temperature, or lower supply voltage. The CD4013BM96E4 datasheet specifies fCL(min) = 12 MHz and fCL(max) = 24 MHz under recommended operating conditions at 15 V.
Does the CD4013BM96E4 support asynchronous reset functionality?
Yes, the CD4013BM96E4 provides fully asynchronous reset: asserting a high logic level on either RESET1 (pin 4) or RESET2 (pin 10) immediately forces the corresponding Q output low and Q output high, independent of clock activity or data input state. This behavior is confirmed in the device functional modes table and timing diagrams of the official TI datasheet SCHS023E.
What package type and dimensions does the CD4013BM96E4 use?
The CD4013BM96E4 uses a 14-pin SOIC (D) package with nominal body dimensions of 8.65 mm × 3.90 mm and standard gull-wing lead form. It is supplied in large tape-and-reel format (2500 units per reel), RoHS-compliant, with NiPdAu lead finish and MSL Level-1 rating per JEDEC J-STD-020.
Can the CD4013BM96E4 operate from a 3.3 V supply?
Yes, the CD4013BM96E4 is fully specified down to 3 V supply voltage per TI's Recommended Operating Conditions. At 3.3 V, it delivers reduced but functional performance: max clock frequency drops to ~3.5 MHz (min), propagation delay increases to ~300 ns (max), and output drive weakens to ±0.51 mA (min). Input thresholds scale proportionally (VIH ≈ 2.3 V, VIL ≈ 1.0 V), maintaining compatibility with 3.3 V logic families.
How does the CD4013BM96E4 handle unused inputs?
All unused inputs on the CD4013BM96E4 - including D, SET, RESET, and CLOCK pins of the inactive flip-flop section - must be tied to a defined logic level (VDD or VSS) to prevent floating states that cause excessive current draw, oscillation, or latch-up. TI explicitly recommends this in Section 10.1 of the datasheet, citing SCBA004 application note on CMOS input biasing.
CD4013BM96E4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 4000B
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Set(Preset) and Reset
- Type:
- D-Type
- Output Type:
- Complementary
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 24 MHz
- Max Propagation Delay @ V, Max CL:
- 90ns @ 15V, 50pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 6.8mA, 6.8mA
- Voltage - Supply:
- 3V ~ 18V
- Current - Quiescent (Iq):
- 4 µA
- Input Capacitance:
- 5 pF
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
CD4013BM96E4 FAQ
1.How can I place an order for CD4013BM96E4 through Aetrix?
Please submit a Request for Quotation (RFQ) for CD4013BM96E4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD4013BM96E4 reliable?
The price and inventory of CD4013BM96E4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4013BM96E4 is usually 5 days.
3.What payment methods are accepted for CD4013BM96E4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4013BM96E4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD4013BM96E4?
CD4013BM96E4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD4013BM96E4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD4013BM96E4?
For technical support, including CD4013BM96E4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4013BM96E4 requirements.
6.How does Aetrix verify that CD4013BM96E4 is sourced from the original manufacturer or authorized distributors?
All CD4013BM96E4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4013BM96E4 meets industry standards.
7.What is the process for return or replacement of CD4013BM96E4?
All CD4013BM96E4 units undergo pre-shipment inspection (PSI). If there is an issue with CD4013BM96E4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD4013BM96E4 part is unused and in its original packaging.
Return procedure for CD4013BM96E4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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