Texas Instruments CD4013BPW
- Part No.:
- CD4013BPW
- Manufacturer:
- Texas Instruments
- Category:
- Flip Flops
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
CD4013BPW.pdf
- Description:
- IC FF D-TYPE DUAL 1BIT 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:8,136
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Product details
Overview
CD4013BPW from Texas Instruments is a CMOS dual D-type flip-flop in a 14-pin TSSOP package, operating from 3 V to 18 V supply, with asynchronous set/reset, positive-edge clock triggering, and independent Q/Q̅ outputs per section. It delivers 16 MHz typical toggle rate at 10 V and supports shift register, counter, and toggle applications in industrial control and power management systems.
For engineers reviewing the CD4013BPW datasheet, CD4013BPW pinout, CD4013BPW application, or CD4013BPW equivalent, this device serves as a low-power, wide-voltage-range storage element for synchronous logic design, timing control, and state-holding functions where rail-to-rail input compatibility and ESD-robust CMOS inputs are required.
Technical Context
The CD4013BPW implements two electrically isolated D-type latches, each with fully independent data (D), clock (CLK), set (SET), reset (RESET), Q, and Q̅ terminals. Its static CMOS architecture ensures ultra-low quiescent current (≤0.02 µA at 25°C, VDD = 5 V) and high noise immunity (2.5 V at 15 V supply).
It operates across –55°C to +125°C, features symmetrical output drive (±6.8 mA at VDD = 15 V), and uses standard TTL-compatible input thresholds (VIH = 11 V, VIL = 4 V at VDD = 15 V). Propagation delays are voltage-dependent: tPHL/tPLH = 45–90 ns (typ) at VDD = 15 V, CL = 50 pF.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 3 V to 18 V - enables direct interface with legacy 5 V, modern 3.3 V, and high-voltage industrial rails without level-shifting. |
| Max Clock Frequency | 16 MHz (typ) at VDD = 10 V - supports medium-speed digital sequencing in PLC I/O modules and sensor interface logic. |
| Propagation Delay | 45–90 ns (tPHL/tPLH, VDD = 15 V, CL = 50 pF) - determines minimum clock period and setup/hold timing margins in synchronous designs. |
| Output Drive Strength | ±6.8 mA (IOH/IOL, VDD = 15 V) - sufficient to directly drive LED indicators, small relays, or fan-out to ≥10 74HC-series inputs. |
| Input Leakage Current | ±0.1 µA max (VDD = 18 V, TA = 25°C) - ensures reliable operation with high-impedance pull-ups/pull-downs and minimizes standby power in battery systems. |
| Operating Temperature | –55°C to +125°C - qualified for under-hood automotive, grid infrastructure, and military-grade embedded applications. |
| Noise Margin | 2.5 V at VDD = 15 V - provides robust immunity against supply ripple and crosstalk in noisy industrial environments. |
Pinout & Package
TSSOP-14 (PW) package: 5.00 mm × 4.40 mm body, 0.65 mm lead pitch, thin-profile surface-mount construction suitable for space-constrained PCB layouts and automated assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13 | Q1, Q2 | Non-inverted outputs - provide active-high state storage; used for feedback in toggle/counter configurations. |
| 2, 12 | Q̅1, Q̅2 | Inverted outputs - enable complementary logic generation without external inverters; critical for JK emulation. |
| 3, 11 | CLOCK1, CLOCK2 | Positive-edge-triggered clock inputs - transfer D-input state to Q on rising edge; asynchronous SET/RESET override clock action. |
| 4, 10 | RESET1, RESET2 | Asynchronous active-high reset - forces Q = 0, Q̅ = 1 regardless of clock or D state; requires pull-down when unused. |
| 5, 9 | D1, D2 | Data inputs - sampled on clock edge; must meet tS (7–15 ns) and tH (2–5 ns) timing relative to CLK. |
| 6, 8 | SET1, SET2 | Asynchronous active-high set - forces Q = 1, Q̅ = 0 independently of clock; requires pull-down when inactive. |
| 7 | VSS | Ground reference - common return path for all internal logic and I/O; must be low-impedance for noise immunity. |
| 14 | VDD | Power supply - supplies entire die; requires local 0.1 µF bypass capacitor placed adjacent to pin for stable operation. |
Key Features
| Feature | Design Value |
|---|---|
| Asynchronous Set-Reset | Enables immediate state initialization or clearing without waiting for clock edge - essential for power-on reset and fault recovery circuits. |
| Wide Supply Range (3–18 V) | Eliminates need for dedicated voltage regulators in mixed-rail systems; supports direct connection to unregulated battery or rectified AC supplies. |
| CMOS Input Protection Network | Provides ±2000 V HBM ESD tolerance - reduces risk of field failure during handling and board-level integration. |
| Symmetrical Output Characteristics | Ensures matched rise/fall times and drive strength for Q and Q̅ - simplifies timing analysis in differential or complementary logic paths. |
| Static Flip-Flop Operation | Zero dynamic power consumption when idle - ideal for low-duty-cycle monitoring and wake-up logic in energy-sensitive devices. |
Applications
| Industrial Power Sequencing | Medical Device State Control |
|---|---|
Use Scenario: Controlling startup/shutdown order of multiple DC-DC converters in programmable power supplies. IC Role / Device Role / Timing Role: Dual flip-flop stores enable states and sequences power rails using cascaded clocking and Q→D feedback. Use Value: Ensures safe ramp-up/down with no race conditions; leverages asynchronous reset for emergency shutdown. |
Use Scenario: Managing operational modes (standby, measurement, alarm) in portable patient monitors. IC Role / Device Role / Timing Role: Stores user-selected mode and toggles between states via push-button clock input with debounced SET/RESET. Use Value: Provides deterministic, glitch-free state transitions without microcontroller intervention - improves safety-critical reliability. |
| Automotive Body Control | Test Equipment Logic Interface |
Use Scenario: Implementing window lift/lower latching logic with direction memory and anti-pinch timeout. IC Role / Device Role / Timing Role: One section holds direction (UP/DOWN), second section tracks motor run time via clock-gated toggle. Use Value: Enables fail-safe mechanical stop detection using only passive components and fixed-frequency oscillator - reduces BOM cost. |
Use Scenario: Synchronizing signal acquisition windows with external trigger pulses in benchtop oscilloscopes. IC Role / Device Role / Timing Role: Captures trigger edge and gates ADC sampling window using Q output; RESET clears after capture completion. Use Value: Delivers sub-100 ns jitter-free gating with no software latency - critical for high-fidelity waveform reconstruction. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4013BM | SOIC-14 package (8.65 mm × 3.90 mm); identical electrical specs and pinout. | Better thermal dissipation (RθJA = 92.5°C/W vs 121°C/W) and higher volume availability. | Select CD4013BM for through-hole prototyping or thermally demanding applications where board space allows larger footprint. |
| MC14013BDR2G | Onsemi TSSOP-14 variant; same function but tighter propagation delay distribution (tPHL/tPLH = 40–85 ns typ at VDD = 15 V). | Higher production consistency for timing-critical counters; RoHS-compliant with NIPDAU finish. | Choose MC14013BDR2G when statistical timing margin is critical and long-term supply continuity is prioritized over TI-specific support. |
Compared with CD4013BPW, CD4013BM offers superior thermal performance in SOIC packaging for sustained operation, while MC14013BDR2G provides tighter delay variation and broader long-term sourcing - both require no schematic changes but may impact layout density or reflow profile.
Availability
CD4013BPW is available at Aetrix Electronics and suitable for industrial power sequencing, medical device state control, automotive body electronics, and test equipment logic interface requiring stable component supply across extended temperature ranges.
Supply support for CD4013BPW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic ICs, with decades of expertise in radiation-tolerant and high-reliability CMOS design.
The CD4013B product line delivers radiation-hardened, wide-voltage-range logic for mission-critical systems in aerospace, energy infrastructure, and industrial automation - designed for longevity and functional stability under extreme environmental stress.
FAQ
What is the maximum clock frequency supported by the CD4013BPW?
The CD4013BPW supports up to 16 MHz typical clock toggle rate at VDD = 10 V, and 24 MHz maximum at VDD = 15 V per the datasheet's dynamic specifications. Actual achievable frequency depends on load capacitance, supply voltage stability, and PCB layout - for reliable operation at >10 MHz, keep CL ≤ 50 pF and use tight clock routing with local decoupling.
Does the CD4013BPW support 3.3 V logic levels?
Yes, the CD4013BPW operates down to 3 V supply and accepts 3.3 V logic inputs as valid high-level signals (VIHmin = 3.5 V at VDD = 5 V, scaling proportionally). At VDD = 3.3 V, VIHmin ≈ 2.3 V - ensuring full compatibility with standard 3.3 V CMOS outputs without level translation.
How should unused SET and RESET pins be handled on the CD4013BPW?
Unused SET and RESET pins on the CD4013BPW must be tied to VSS (ground) to prevent floating inputs, which can cause undefined output states or increased power consumption. TI explicitly warns against leaving CMOS inputs unconnected - use 10 kΩ pull-down resistors or direct connection depending on noise environment.
Is the CD4013BPW pin-compatible with other CD4013 variants?
Yes, the CD4013BPW shares identical pinout and functionality with all CD4013B variants (e.g., CD4013BE, CD4013BM, CD4013BNSR), differing only in package type (TSSOP vs PDIP/SOIC/SOP). Electrical behavior, timing, and absolute maximum ratings are fully aligned across the family.
What is the thermal resistance (RθJA) of the CD4013BPW package?
The CD4013BPW in TSSOP-14 has a junction-to-ambient thermal resistance (RθJA) of 121°C/W, as specified in TI's thermal metrics table. This value assumes standard JEDEC 2-layer board conditions; actual performance improves with copper pour, thermal vias, and airflow - critical for continuous operation above 85°C ambient.
CD4013BPW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 4000B
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Set(Preset) and Reset
- Type:
- D-Type
- Output Type:
- Complementary
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 24 MHz
- Max Propagation Delay @ V, Max CL:
- 90ns @ 15V, 50pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 6.8mA, 6.8mA
- Voltage - Supply:
- 3V ~ 18V
- Current - Quiescent (Iq):
- 4 µA
- Input Capacitance:
- 5 pF
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
CD4013BPW FAQ
1.How can I place an order for CD4013BPW through Aetrix?
Please submit a Request for Quotation (RFQ) for CD4013BPW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD4013BPW reliable?
The price and inventory of CD4013BPW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4013BPW is usually 5 days.
3.What payment methods are accepted for CD4013BPW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4013BPW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD4013BPW?
CD4013BPW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD4013BPW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD4013BPW?
For technical support, including CD4013BPW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4013BPW requirements.
6.How does Aetrix verify that CD4013BPW is sourced from the original manufacturer or authorized distributors?
All CD4013BPW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4013BPW meets industry standards.
7.What is the process for return or replacement of CD4013BPW?
All CD4013BPW units undergo pre-shipment inspection (PSI). If there is an issue with CD4013BPW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD4013BPW part is unused and in its original packaging.
Return procedure for CD4013BPW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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