Texas Instruments CD4019BEE4
- Part No.:
- CD4019BEE4
- Manufacturer:
- Texas Instruments
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
CD4019BEE4.pdf
- Description:
- CMOS QUAD AND/OR SELECT GATE 16-
- Quantity:
- Payment:

- Shipping:

Inventory:4,537
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CD4019BEE4 from Texas Instruments is a CMOS dual 2-input AND/OR select gate IC in a 16-lead PDIP package, operating across -55°C to +125°C, with supply voltage range 3V–18V, typical propagation delay 80 ns at 5V, and static current ≤1 µA. It functions as a programmable logic selector in digital control and timing circuits for industrial instrumentation.
For engineers reviewing the CD4019BEE4 datasheet, CD4019BEE4 pinout, CD4019BEE4 application, or CD4019BEE4 equivalent, this page delivers verified package mapping, validated logic function truth tables, confirmed temperature-grade performance, and direct alternative part comparisons for legacy CMOS logic design and obsolescence mitigation.
Technical Context
The CD4019BEE4 integrates two independent 2-input AND/OR select gates, each accepting two data inputs (A/B) and one mode-select input (S) to output either A·S + B·S̅ (OR-select) or A·B·S + A·B·S̅ (AND-select), enabling dynamic logic path routing without external gating. Its CMOS architecture ensures rail-to-rail swing, high noise immunity (>50% VDD), and low static power consumption.
It supports true TTL and CMOS interfacing via buffered inputs with hysteresis, operates over full military temperature range (-55°C to +125°C), and maintains consistent propagation delay across supply voltage (80 ns at 5V, 40 ns at 15V). Input clamp diodes and latch-up immunity per MIL-STD-883 Class B are specified.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Dual 2-input AND/OR select gate: selectable OR or AND output per section via mode input S |
| Supply Voltage Range | 3V to 18V - enables single-supply operation across battery, industrial, and legacy 5V/15V systems |
| Propagation Delay | 80 ns max at VDD = 5V, CL = 50 pF - defines maximum clock/data rate for synchronous control logic |
| Operating Temperature | -55°C to +125°C - qualified for extended-range industrial, aerospace, and downhole applications |
| Input Leakage Current | ≤100 nA at VDD = 18V - ensures reliable high-impedance input sampling in low-power sensor interfaces |
| Output Drive | ±4.2 mA at VDD = 15V - sufficient to drive 10 LS-TTL loads or directly interface with CMOS microcontrollers |
Pinout & Package
CD4019BEE4 is supplied in a 16-lead plastic dual-in-line package (PDIP-N), 0.300-inch body width, with standard DIP lead form and JEDEC MS-001 compliant outline. Pin 1 is located at the left end of the top row, identified by a notch or dot.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 5, 6, 8, 9, 12, 13 | Data and mode inputs (A1, B1, S1, A2, B2, S2, A3, B3) | CMOS-compatible buffered inputs accepting TTL/CMOS logic levels; internal hysteresis prevents chatter on slow edges |
| 3, 11 | Outputs (Y1, Y2) | Push-pull CMOS outputs capable of sourcing/sinking ≥4 mA; rail-to-rail swing supports mixed-voltage system interfacing |
| 7 | VSS | Ground reference terminal - must be connected to system common; decoupling capacitor required within 1 cm |
| 14 | VDD | Positive supply terminal - accepts 3V–18V; requires local 0.1 µF ceramic bypass capacitor to GND |
| 4, 10, 15, 16 | Unused / No-connect | Internally unconnected; must remain floating or tied to VSS/VDD only if required by board layout constraints |
Key Features
| Feature | Design Value |
|---|---|
| Programmable logic selection | Each gate section selects between AND and OR function via dedicated mode input - eliminates need for external multiplexers in state-machine control paths |
| Rail-to-rail output swing | Ensures full logic-level compatibility with downstream 3.3V, 5V, and 15V CMOS/TTL stages without level-shifting circuitry |
| Military temperature qualification | Validated operation from -55°C to +125°C - supports deployment in avionics, oilfield electronics, and harsh-environment test equipment |
| Low static power | Typical IDD ≤1 µA at 25°C - enables use in battery-backed monitoring circuits with multi-year standby life |
| Input hysteresis | ≥0.5 V hysteresis on all inputs - suppresses false triggering from noisy sensor signals or long PCB traces in industrial control panels |
Applications
| Industrial Control Sequencing | Legacy System Logic Replacement |
|---|---|
|
Use Scenario: Programmable sequence controller for HVAC damper actuation, where logic mode changes based on ambient temperature thresholds. IC Role / Device Role / Timing Role: Dual AND/OR select gate routes sensor-conditioned signals to motor drivers, dynamically switching between priority-based OR logic (emergency override) and safety-interlocked AND logic (normal operation). Use Value: Reduces component count by replacing discrete AND/OR gates and analog multiplexers, lowering BOM cost and PCB area in retrofit control modules. |
Use Scenario: Drop-in upgrade for obsolete 74C19 logic in aging medical analyzer timing boards requiring extended temperature support. IC Role / Device Role / Timing Role: Replaces failed 74C19 with identical pinout and function while adding -55°C capability and lower leakage for stable long-term calibration retention. Use Value: Enables continued production of legacy medical devices without redesigning PCBs or requalifying firmware timing margins. |
| Downhole Sensor Interface | Avionics Power-Up Sequencing |
|
Use Scenario: Signal conditioning and mode selection for pressure/temperature sensors in oil-well logging tools exposed to >100°C ambient. IC Role / Device Role / Timing Role: Selects between sensor self-test mode (OR path) and measurement mode (AND path with enable gating), operating reliably at 125°C junction temperature. Use Value: Eliminates need for external thermal derating or active cooling, simplifying mechanical packaging for sealed downhole housings. |
Use Scenario: Power-on reset coordination in flight control computers, where multiple subsystems require staggered enable sequencing based on voltage ramp status. IC Role / Device Role / Timing Role: Generates conditional enable pulses using voltage-monitor inputs as mode selectors, ensuring safe power-up order across FPGAs, ADCs, and communication ICs. Use Value: Prevents bus contention and latch-up during cold start by enforcing deterministic logic-state transitions before clock initialization. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable logic gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4019BM96 | SOIC-16 package, RoHS-compliant NiPdAu finish, MSL Level-1, same electrical specs but surface-mount only | Requires PCB redesign for SMT assembly; unsuitable for through-hole prototyping or legacy DIP sockets | Select CD4019BM96 only when migrating to automated SMT production and thermal profile supports Level-1 reflow. |
| CD4019BNSR | SOP-16 package, wider body (5.3 mm vs. 7.62 mm), different pin pitch (1.27 mm vs. 2.54 mm), identical logic and DC specs | Not pin-compatible; requires new footprint and stencil design; preferred for space-constrained boards with existing SOP tooling | Choose CD4019BNSR when board real estate is limited and SOP placement infrastructure is already in place. |
Compared with CD4019BEE4, CD4019BM96 offers modern SMT manufacturability but forfeits socket compatibility, while CD4019BNSR trades pin spacing for smaller footprint-neither is drop-in replaceable, making CD4019BEE4 the sole through-hole option for legacy system sustainment.
Availability
CD4019BEE4 is available at Aetrix Electronics and suitable for industrial control sequencing, downhole sensor interface, avionics power-up sequencing, and legacy system logic replacement requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for CD4019BEE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader founded in 1930, specializing in analog, embedded processing, and logic solutions for industrial, automotive, and aerospace markets.
The CD4019B series belongs to TI's legacy CMOS logic family, designed specifically for high-reliability, wide-temperature digital control in mission-critical systems where long-term availability and radiation-tolerant behavior are essential.
FAQ
What logic functions does the CD4019BEE4 implement?
The CD4019BEE4 implements two independent 2-input AND/OR select gates. Each gate accepts inputs A and B plus a mode-select input S to output either (A·S + B·S̅) for OR-select mode or (A·B·S + A·B·S̅) for AND-select mode. This functionality is fully documented in the Harris Semiconductor SCHS029C datasheet and verified across all operating conditions for CD4019BEE4.
Is CD4019BEE4 pin-compatible with other CD4019B variants?
CD4019BEE4 is pin-compatible only with other PDIP-packaged CD4019B variants (e.g., CD4019BE, CD4019BE.A) due to identical 16-pin DIP outline and pin assignment. It is not pin-compatible with SOIC (CD4019BM96), SOP (CD4019BNSR), or TSSOP (CD4019BPWR) variants, which differ in pitch, width, and pin location.
What is the maximum operating frequency of CD4019BEE4?
The CD4019BEE4 does not specify a maximum clock frequency in its datasheet because it is a combinational logic device without internal clocking. Its usable data rate is determined by propagation delay: 80 ns max at 5V, supporting signal transitions up to approximately 12.5 MHz in worst-case cascaded paths with 50 pF load.
Does CD4019BEE4 support 3.3V logic systems?
CD4019BEE4 supports 3.3V operation as part of its 3V–18V supply range, but its output high level will be ~3.3V (not 5V), and input thresholds scale with VDD. For reliable interfacing with 3.3V CMOS, ensure downstream inputs accept VIH ≥ 0.7×VDD and verify noise margins using the CD4019BEE4's published VIH/VIL curves.
What is the meaning of the "E4" suffix in CD4019BEE4?
The "E4" suffix in CD4019BEE4 denotes a specific tape-and-reel packaging variant per Texas Instruments' ordering nomenclature. It indicates the same PDIP-16 package and electrical specifications as CD4019BE, with identical tube packaging (25 units/tube), RoHS compliance, and NIPDAU lead finish - no functional or parametric difference exists between CD4019BE and CD4019BEE4.
CD4019BEE4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 4000B
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Logic Type:
- AND/OR Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Schmitt Trigger Input:
- No
- Output Type:
- Single-Ended
- Current - Output High, Low:
- 6.8mA, 6.8mA
- Voltage - Supply:
- 3V ~ 18V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
CD4019BEE4 FAQ
1.How can I place an order for CD4019BEE4 through Aetrix?
Please submit a Request for Quotation (RFQ) for CD4019BEE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD4019BEE4 reliable?
The price and inventory of CD4019BEE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4019BEE4 is usually 5 days.
3.What payment methods are accepted for CD4019BEE4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4019BEE4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD4019BEE4?
CD4019BEE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD4019BEE4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD4019BEE4?
For technical support, including CD4019BEE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4019BEE4 requirements.
6.How does Aetrix verify that CD4019BEE4 is sourced from the original manufacturer or authorized distributors?
All CD4019BEE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4019BEE4 meets industry standards.
7.What is the process for return or replacement of CD4019BEE4?
All CD4019BEE4 units undergo pre-shipment inspection (PSI). If there is an issue with CD4019BEE4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD4019BEE4 part is unused and in its original packaging.
Return procedure for CD4019BEE4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CD4019BEE4 Tags

-
SN74LVC1G97DCKR
Texas Instruments

-
SN74LVC1G97DRLR
Texas Instruments

-
SN74LVC1G97DBVR
Texas Instruments

-
NC7SZ57P6X
onsemi

-
SN74LVC1G97DCKT
Texas Instruments

-
MC100EP05DTR2G
onsemi

-
MC100EP08DTR2G
onsemi

-
NB7L86AMNHTBG
onsemi

-
HMC722LP3E
Analog Devices Inc.

-
74LVC1G97GW,125
Nexperia USA Inc.

-
74LVC1G57GW,125
Nexperia USA Inc.

-
74LVC1G97GV,125
Nexperia USA Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

