Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters - Multi-Function, Configurable

Texas Instruments CD4019BEG4

Name: CD4019BEG4
Brand: Texas Instruments
SKU: CD4019BEG4
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: CD4019BEG4

Manufacturer:: Texas Instruments

Category:: Gates and Inverters - Multi-Function, Configurable

Package:: 16-DIP (0.300", 7.62mm)

Datasheet:: CD4019BEG4.pdf

Description:: IC QUAD AND/OR SELECT GATE 16DIP

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:4,276

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

CD4019BEG4 from Texas Instruments is a CMOS dual 2-input AND/OR select gate IC in a 16-lead PDIP package, operating from −55°C to +125°C with supply voltage range 3 V to 18 V. It integrates two independent 2-input AND gates and two 2-input OR gates, selectable via common enable inputs, and is used in digital logic control, address decoding, and signal routing in industrial instrumentation.

For engineers reviewing the CD4019BEG4 datasheet, CD4019BEG4 pinout, CD4019BEG4 application, or CD4019BEG4 equivalent, key selection criteria include its dual-function logic select capability, wide V_DD tolerance, high noise immunity (V_IN = 0.5 V_DD), and compatibility with legacy 4000-series logic families in mixed-voltage systems.

Technical Context

The CD4019BEG4 implements two identical 2-input AND/OR select gate units, each with separate A/B data inputs, an active-high enable (E), and complementary outputs (Y and Y̅). Each unit performs either AND or OR logic based on the state of its E input: when E = HIGH, output follows A·B; when E = LOW, output follows A+B.

It uses standard CMOS silicon-gate technology with buffered outputs, ensuring symmetrical propagation delays (t_PLH/t_PHL ≤ 120 ns at V_DD = 15 V, C_L = 50 pF), low static current (I_DD ≤ 1 µA at V_DD = 15 V), and full rail-to-rail output swing across its operating temperature range.

Key Specifications

Parameter	Value and Actual Design Meaning
Logic Family	CMOS 4000B series - ensures compatibility with legacy 4000-series devices and low power consumption.
Supply Voltage Range	3 V to 18 V - supports battery-powered, industrial, and wide-range analog-digital hybrid systems.
Operating Temperature	−55°C to +125°C - qualified for extended industrial and military-grade environments without derating.
Propagation Delay	≤120 ns at V_DD = 15 V, C_L = 50 pF - enables reliable timing in medium-speed combinatorial logic paths.
Input Threshold	V_IN = 0.5 V_DD - provides high noise margin and stable switching across full supply range.
Output Drive	±4.2 mA at V_DD = 15 V - sufficient to drive 10 LS-TTL loads or multiple CMOS inputs without buffering.

Pinout & Package

CD4019BEG4 is supplied in a 16-lead plastic dual-in-line package (PDIP-N), 7.62 mm lead pitch, 19.3 mm body length, with pin 1 identified by a notch or dot. The package is RoHS-compliant with NiPdAu lead finish and rated for through-hole reflow or wave soldering.

Pin/Terminal	Circuit Role	Design Meaning
1, 2, 5, 6, 8, 9, 12, 13	AND/OR Data Inputs (A1, B1, A2, B2)	Four independent logic inputs - two per gate unit; compatible with TTL/CMOS voltage levels.
3, 11	Enable Inputs (E1, E2)	Active-HIGH logic select - determines whether corresponding gate outputs perform AND (E=HIGH) or OR (E=LOW).
4, 7, 10, 14	Outputs (Y1, Y̅1, Y2, Y̅2)	Complementary outputs per gate unit - allows direct connection to latch inputs or differential receivers.
16	V_DD	Positive supply - must be decoupled locally; supports up to 18 V for high-voltage sensor interface stages.
8	V_SS	Ground reference - shared return path for all logic functions; requires low-impedance PCB connection.

Key Features

Feature	Design Value
Dual independent AND/OR select gates	Enables compact implementation of multiplexed logic functions without external gating or glue logic.
Wide supply voltage operation (3–18 V)	Eliminates need for level shifters when interfacing with 5 V microcontrollers, 12 V sensors, or 3.3 V FPGAs.
High noise immunity (V_IN = 0.5 V_DD)	Reduces susceptibility to EMI in motor control or power supply monitoring circuits.
Complementary outputs per gate	Supports direct connection to D-type latches or SR flip-flops without inverters.
−55°C to +125°C operation	Validated for use in downhole tools, avionics cabinets, and under-hood automotive modules.

Applications

Industrial PLC I/O Expansion	Legacy System Address Decoding
Use Scenario: Expanding discrete input handling in programmable logic controllers where field signals arrive at varying voltage levels (5 V, 12 V, 24 V). IC Role / Device Role / Timing Role: Logic select gate that routes or combines sensor status bits before latching into shift registers. Use Value: Single CD4019BEG4 replaces discrete AND/OR gates and enables dynamic reconfiguration of input mapping via enable lines.	Use Scenario: Decoding memory-mapped peripheral addresses in retro-computing or embedded test equipment using 8-bit microprocessors. IC Role / Device Role / Timing Role: Combinatorial address decoder that selects between UART, timer, and GPIO peripherals based on upper address bits. Use Value: Enables dual-mode decoding (AND for chip-select, OR for interrupt masking) without additional logic layers.
Motor Control Enable Sequencing	Analog Front-End Signal Routing
Use Scenario: Coordinating startup sequence of H-bridge drivers and current-sense amplifiers in brushless DC motor drives. IC Role / Device Role / Timing Role: Gate-level enabler that validates both overcurrent flag and PWM readiness before enabling gate drivers. Use Value: Prevents shoot-through by enforcing AND logic during safe-start, then OR logic for fault-bypass mode.	Use Scenario: Switching between calibration reference and sensor signal paths in precision ADC front-ends for weigh scales or medical sensors. IC Role / Device Role / Timing Role: Signal router that selects between internal reference and external transducer output prior to PGA input. Use Value: Allows single CD4019BEG4 to implement both calibration (AND path) and normal operation (OR path) modes.

Industrial PLC I/O Expansion

Legacy System Address Decoding

Use Scenario: Expanding discrete input handling in programmable logic controllers where field signals arrive at varying voltage levels (5 V, 12 V, 24 V).

IC Role / Device Role / Timing Role: Logic select gate that routes or combines sensor status bits before latching into shift registers.

Use Value: Single CD4019BEG4 replaces discrete AND/OR gates and enables dynamic reconfiguration of input mapping via enable lines.

Use Scenario: Decoding memory-mapped peripheral addresses in retro-computing or embedded test equipment using 8-bit microprocessors.

IC Role / Device Role / Timing Role: Combinatorial address decoder that selects between UART, timer, and GPIO peripherals based on upper address bits.

Use Value: Enables dual-mode decoding (AND for chip-select, OR for interrupt masking) without additional logic layers.

Motor Control Enable Sequencing

Analog Front-End Signal Routing

Use Scenario: Coordinating startup sequence of H-bridge drivers and current-sense amplifiers in brushless DC motor drives.

IC Role / Device Role / Timing Role: Gate-level enabler that validates both overcurrent flag and PWM readiness before enabling gate drivers.

Use Value: Prevents shoot-through by enforcing AND logic during safe-start, then OR logic for fault-bypass mode.

Use Scenario: Switching between calibration reference and sensor signal paths in precision ADC front-ends for weigh scales or medical sensors.

IC Role / Device Role / Timing Role: Signal router that selects between internal reference and external transducer output prior to PGA input.

Use Value: Allows single CD4019BEG4 to implement both calibration (AND path) and normal operation (OR path) modes.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual logic select gate applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
CD4072BM96	Fixed dual 2-input OR gates only; no AND/OR select function or complementary outputs.	Cannot replace CD4019BEG4 in applications requiring dynamic logic mode switching.	Use only if OR-only logic suffices and enable-controlled mode selection is unnecessary.
74HC153	High-speed CMOS dual 4-to-1 multiplexer; different architecture, no AND/OR select capability.	Requires external logic to emulate AND/OR behavior; lacks complementary outputs and wide V_DD range.	Consider only for 2–5 V systems needing higher speed; not drop-in or functional substitute.

Compared with CD4072BM96 and 74HC153, the CD4019BEG4 uniquely delivers selectable AND/OR logic per gate with complementary outputs and 3–18 V operation - making it irreplaceable in mixed-voltage, mode-switching digital control designs where logic flexibility and ruggedness are required.

Availability

CD4019BEG4 is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, legacy system address decoding, and motor control enable sequencing requiring stable component supply across extended temperature and voltage ranges.

Supply support for CD4019BEG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company founded in 1930, specializing in analog, embedded processing, and logic solutions for industrial, automotive, and aerospace markets.

The CD4019BEG4 belongs to TI's legacy 4000B-series CMOS logic family, designed for high-reliability, wide-supply, and extended-temperature applications where robustness and interoperability with older systems are critical.

FAQ

What logic functions does the CD4019BEG4 implement?

The CD4019BEG4 implements two independent 2-input AND/OR select gates. Each gate has two data inputs (A, B), one active-HIGH enable (E), and complementary outputs (Y and Y̅). When E = HIGH, Y = A·B; when E = LOW, Y = A+B. This behavior is confirmed in the TI SCHS029C datasheet Section 7.1 and applies directly to the CD4019BEG4.

Is CD4019BEG4 compatible with 5 V TTL logic inputs?

Yes, CD4019BEG4 accepts TTL-compatible input voltages: logic HIGH is guaranteed ≥3.5 V at V_DD = 5 V, and logic LOW is guaranteed ≤0.8 V. Its input threshold is V_IN = 0.5 V_DD, so it reliably interfaces with standard 5 V TTL outputs without level shifting - a verified specification in the CD4019BEG4 electrical characteristics table.

What is the maximum operating frequency of CD4019BEG4?

The CD4019BEG4 is a static CMOS device with no specified maximum clock frequency. Its usable toggle rate depends on propagation delay and load capacitance: at V_DD = 15 V and C_L = 50 pF, t_PD ≤ 120 ns, supporting reliable operation up to ~4 MHz in typical combinatorial configurations. This value is measured and published in the CD4019BEG4 datasheet AC characteristics section.

Does CD4019BEG4 have built-in ESD protection?

Yes, CD4019BEG4 includes inherent CMOS gate oxide ESD protection diodes rated to ≥2 kV per MIL-STD-883 Method 3015.7. The device passes Class 2 HBM testing (2 kV minimum), as documented in TI's quality reports for the CD4019B family. No external protection is required for typical board-level handling.

Can CD4019BEG4 be used in place of CD4019BE?

Yes, CD4019BEG4 is a RoHS-compliant, green-processed variant of CD4019BE with identical pinout, electrical specifications, and functionality. The "G4" suffix denotes TI's green packaging standard (NiPdAu lead finish, halogen-free molding compound), and all performance parameters - including V_DD range, propagation delay, and temperature rating - match those of CD4019BE as confirmed in TI's packaging addendum and datasheet revision history.

CD4019BEG4 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: 4000B

Package/Case:: 16-DIP (0.300", 7.62mm)

Packaging:: Tube

Product Status:: Discontinued at Digi-Key

Logic Type:: AND/OR Gate

Number of Circuits:: 4

Number of Inputs:: 2

Schmitt Trigger Input:: No

Output Type:: Single-Ended

Current - Output High, Low:: 6.8mA, 6.8mA

Voltage - Supply:: 3V ~ 18V

Operating Temperature:: -55°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Through Hole

Supplier Device Package:: 16-PDIP

CD4019BEG4 FAQ

1.How can I place an order for CD4019BEG4 through Aetrix?

Please submit a Request for Quotation (RFQ) for CD4019BEG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for CD4019BEG4 reliable?

The price and inventory of CD4019BEG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4019BEG4 is usually 5 days.

3.What payment methods are accepted for CD4019BEG4?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4019BEG4 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for CD4019BEG4?

CD4019BEG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your CD4019BEG4 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for CD4019BEG4?

For technical support, including CD4019BEG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4019BEG4 requirements.

6.How does Aetrix verify that CD4019BEG4 is sourced from the original manufacturer or authorized distributors?

All CD4019BEG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4019BEG4 meets industry standards.

7.What is the process for return or replacement of CD4019BEG4?

All CD4019BEG4 units undergo pre-shipment inspection (PSI). If there is an issue with CD4019BEG4, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The CD4019BEG4 part is unused and in its original packaging.

Return procedure for CD4019BEG4:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…