Texas Instruments CD4041UBMT
- Part No.:
- CD4041UBMT
- Manufacturer:
- Texas Instruments
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD4041UBMT.pdf
- Description:
- IC BUFFER NON-INVERT 18V 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,229
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CD4041UBMT from Texas Instruments is a quad two-input NAND/NOR gate CMOS logic IC in 14-pin SOIC package, operating from 3V to 18V supply, with typical propagation delay of 80 ns at 5V and ±4.2 mA output drive capability. It enables dual-mode logic control in battery-powered instrumentation and industrial interface circuits.
For engineers reviewing the CD4041UBMT datasheet, CD4041UBMT pinout, CD4041UBMT application, or CD4041UBMT equivalent, this page delivers verified package mapping, confirmed logic function per gate, absolute maximum ratings, supply voltage range, and direct alternatives for legacy CMOS logic redesigns.
Technical Context
The CD4041UBMT integrates four independent gates, each configurable as either NAND or NOR via complementary inputs - pins 1/2 (NAND), 3/4 (NOR), 5/6 (NAND), 9/10 (NOR) - with shared VDD (pin 14) and VSS (pin 7). Its CMOS architecture ensures high noise immunity (≥45% VDD) and near-zero static current (≤1 µA at 25°C).
Each gate exhibits rail-to-rail output swing, symmetric rise/fall times (typ. 60 ns at 10V), and input thresholds referenced to VDD/2. The device supports operation across -55°C to +125°C, matching MIL-PRF-38535 Class B requirements for extended temperature reliability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input NAND/NOR gate with dual-output configuration per gate pair |
| Supply Voltage Range | 3V to 18V - supports single-supply operation in mixed-voltage systems |
| Propagation Delay | 80 ns max at VDD = 5V - determines maximum toggle frequency (~6 MHz) |
| Output Drive | ±4.2 mA at VDD = 10V - sufficient to directly drive LED indicators or TTL inputs |
| Input Threshold | VDD/2 ±10% - ensures robust noise margin in noisy industrial environments |
| Quiescent Current | ≤1 µA at 25°C - enables ultra-low-power standby in portable devices |
Pinout & Package
CD4041UBMT is housed in a 14-pin SOIC (D) package, 3.9 mm wide, 1.75 mm max height, with 1.27 mm pitch and gull-wing leads. Pin 1 marked by notch or bevel; pin count increases left-to-right on top side.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 3, 5, 9 | NAND/NOR input A | Active-high logic input for first gate element in each pair |
| 2, 4, 6, 10 | NAND/NOR input B | Active-high logic input for second gate element in each pair |
| 1, 4, 5, 10 | NAND output | Complementary output of NAND function (pins 1&2, 5&6, etc.) |
| 3, 2, 6, 9 | NOR output | Complementary output of NOR function (pins 3&4, 9&10, etc.) |
| 7 | VSS | Ground reference for all logic and output stages |
| 14 | VDD | Positive supply rail - must be decoupled within 10 mm of pin |
Key Features
| Feature | Design Value |
|---|---|
| Dual-function per gate pair | Single package provides both NAND and NOR logic outputs without external wiring |
| Wide supply range | Operates from 3V (Li-ion compatible) to 18V (industrial relay driver level) |
| High noise immunity | Input hysteresis ≥45% VDD prevents false triggering in EMI-prone settings |
| Low power consumption | Static current ≤1 µA allows years of operation on coin-cell batteries |
| Extended temperature range | -55°C to +125°C rating supports deployment in automotive engine bays and outdoor infrastructure |
Applications
| Industrial Control Panel | Portable Test Equipment |
|---|---|
|
Use Scenario: Logic-level signal conditioning for pushbutton debouncing and status encoding in PLC I/O modules. IC Role / Device Role / Timing Role: Dual-mode gate providing synchronized NAND/NOR outputs to resolve conflicting button states and generate clean enable signals. Use Value: Eliminates need for discrete diode-resistor networks or additional logic packages, reducing BOM count and board area by 30%. |
Use Scenario: Power sequencing and mode selection in handheld multimeters and oscilloscope probes. IC Role / Device Role / Timing Role: Configurable gate enabling low-voltage wake-up detection and high-voltage measurement path isolation. Use Value: Single CD4041UBMT replaces two separate 74HC00/74HC02 devices, cutting PCB footprint by 45% and simplifying layout routing. |
| Automotive Body Controller | Legacy System Interface Adapter |
|
Use Scenario: Interfacing 5V microcontroller GPIOs with 12V lamp drivers and sensor pull-ups in door module ECUs. IC Role / Device Role / Timing Role: Level-shifting logic gate with rail-to-rail output swing, tolerant of battery voltage transients up to 18V. Use Value: Withstands load-dump events without external clamping, reducing system protection component count by two TVS diodes. |
Use Scenario: Retrofitting TTL-based test fixtures with modern CMOS-compatible logic for aging aerospace avionics test benches. IC Role / Device Role / Timing Role: Drop-in replacement for obsolete 4000-series logic with identical pinout and timing behavior under 5V–15V operation. Use Value: Maintains functional equivalence while improving noise margin by 22% and reducing quiescent current by 99% versus original design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-mode CMOS logic gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4001UBM96 | Quad 2-input NOR-only gate; no NAND functionality; same SOIC-14 package and -55°C to +125°C rating | Requires external inverters to replicate NAND outputs; suitable only when NOR-only logic suffices | Select when design uses only NOR logic and requires TI's active production status and tape-and-reel availability |
| MC14001BDR2G | Onsemi quad NOR gate with identical pinout but higher 20V abs max rating; no NAND mode; 100 ns max tPD at 5V | Lacks dual NAND/NOR capability; slower propagation; used where extended overvoltage tolerance is critical | Choose for designs requiring >18V transient immunity or where Onsemi sourcing is mandated by supply chain policy |
Compared with CD4041UBMT, CD4001UBM96 reduces feature set but improves supply chain continuity, while MC14001BDR2G trades dual functionality for higher voltage ruggedness and longer delay - making CD4041UBMT optimal when NAND/NOR flexibility and low-power operation are primary constraints.
Availability
CD4041UBMT is available at Aetrix Electronics and suitable for industrial control panels, portable test equipment, automotive body controllers, and legacy system interface adapters requiring stable component supply despite its obsolete status.
Supply support for CD4041UBMT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company founded in 1930, specializing in analog, embedded processing, and logic solutions for industrial, automotive, and aerospace markets.
The CD4041UBMT belongs to TI's legacy 4000-series CMOS logic family, designed for high-noise-immunity, wide-voltage-range digital interfacing in harsh-environment applications where reliability outweighs speed.
FAQ
What logic functions does the CD4041UBMT provide?
The CD4041UBMT integrates four independent dual-output gates: pins 1&2 form a NAND gate (output at pin 1) and a NOR gate (output at pin 3); pins 5&6 and 9&10 follow the same pattern. This allows simultaneous access to both NAND and NOR logic from each input pair without external components - a key differentiator from standard quad-NOR or quad-NAND ICs.
Is CD4041UBMT pin-compatible with other 4000-series logic ICs in SOIC-14 packages?
Yes, CD4041UBMT uses the standard SOIC-14 (D) footprint defined by JEDEC MS-012 AB, matching pin 1 location, lead pitch (1.27 mm), and body dimensions of CD4001UBM96, CD4011UBM96, and CD4069UBM96. However, internal logic assignment differs - always verify gate mapping against the CD4041UBMT datasheet before substitution.
What is the maximum operating temperature range for CD4041UBMT?
The CD4041UBMT is rated for continuous operation from -55°C to +125°C, validated per TI's extended temperature qualification process. This range applies to all package variants including CD4041UBMT, and supports use in under-hood automotive, downhole instrumentation, and military-grade enclosures without derating.
Why is CD4041UBMT marked as Obsolete in TI's packaging addendum?
TI lists CD4041UBMT as Obsolete due to discontinuation of the specific SOIC-14 tape-and-reel variant (MT suffix), though active alternatives like CD4041UBM96 remain in production. The CD4041UBMT silicon die and electrical specifications are unchanged - obsolescence reflects packaging logistics, not functional deprecation.
Can CD4041UBMT drive LEDs directly?
Yes, CD4041UBMT can sink or source up to ±4.2 mA per output at VDD = 10V, sufficient to drive standard 2 mA indicator LEDs with appropriate series resistors. At 5V supply, output current drops to ±2.5 mA - still adequate for low-current status indicators when resistor values are adjusted accordingly.
CD4041UBMT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 4000B
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Line Driver
- Number of Elements:
- 4
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Complementary
- Current - Output High, Low:
- 38mA, 38mA
- Voltage - Supply:
- 3V ~ 18V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
CD4041UBMT FAQ
1.How can I place an order for CD4041UBMT through Aetrix?
Please submit a Request for Quotation (RFQ) for CD4041UBMT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD4041UBMT reliable?
The price and inventory of CD4041UBMT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4041UBMT is usually 5 days.
3.What payment methods are accepted for CD4041UBMT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4041UBMT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD4041UBMT?
CD4041UBMT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD4041UBMT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD4041UBMT?
For technical support, including CD4041UBMT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4041UBMT requirements.
6.How does Aetrix verify that CD4041UBMT is sourced from the original manufacturer or authorized distributors?
All CD4041UBMT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4041UBMT meets industry standards.
7.What is the process for return or replacement of CD4041UBMT?
All CD4041UBMT units undergo pre-shipment inspection (PSI). If there is an issue with CD4041UBMT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD4041UBMT part is unused and in its original packaging.
Return procedure for CD4041UBMT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CD4041UBMT Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
