Texas Instruments CD4068BMT
- Part No.:
- CD4068BMT
- Manufacturer:
- Texas Instruments
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD4068BMT.pdf
- Description:
- IC 8INPUT NAND/AND GATE 14-SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,889
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CD4068BMT from Texas Instruments is an 8-input NAND gate CMOS logic IC operating across -55°C to +125°C, with typical propagation delay of 90 ns at 5 V, supply current of 1 µA (max) at 25°C, and compatible with standard TTL input levels. It serves as a high-reliability combinational logic element in aerospace power sequencing and industrial control interlocks.
For engineers reviewing the CD4068BMT datasheet, CD4068BMT pinout, CD4068BMT application, or CD4068BMT equivalent, this page delivers verified package mapping (SOIC-14, MT suffix), absolute maximum ratings, logic truth table behavior, thermal performance data, and direct alternative options for legacy system redesigns.
Technical Context
The CD4068BMT implements a single 8-input NAND function using silicon-gate CMOS technology, delivering rail-to-rail output swing and symmetrical source/sink drive capability (±3.6 mA at VDD = 10 V). Its input structure includes Schmitt-trigger hysteresis on all eight inputs when configured as an 8-input gate, enabling noise-immune signal conditioning in noisy environments.
It supports dual-supply operation from 3 V to 18 V DC, exhibits near-zero static power consumption, and maintains stable logic thresholds across full temperature range. The device is fully compliant with MIL-STD-883 Class B screening requirements when ordered under CD4068B-MIL, though CD4068BMT itself is catalog-grade.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Single 8-input NAND gate - performs Boolean NOT(ABCD...H); enables compact implementation of multi-signal enable/disable logic without cascading gates. |
| Supply Voltage Range | 3 V to 18 V - supports wide-range battery-powered and industrial 12 V/15 V systems without level-shifting. |
| Propagation Delay | 90 ns max at VDD = 5 V, CL = 50 pF - ensures timing predictability in synchronous control state machines. |
| Output Drive | ±3.6 mA at VDD = 10 V - directly drives TTL loads or multiple CMOS inputs without buffer staging. |
| Quiescent Current | 1 µA max at 25°C - enables ultra-low-power standby modes in energy-constrained embedded controllers. |
| Operating Temperature | -55°C to +125°C - qualified for extended-temperature industrial, avionics, and downhole instrumentation use. |
Pinout & Package
CD4068BMT is supplied in a 14-lead small-outline integrated circuit (SOIC) package with 1.27 mm lead pitch, 1.75 mm max height, and JEDEC MS-012 variation AB compliance. Pin 1 is located at the top-left corner adjacent to the index notch or dot marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–8 | Input A–H | CMOS-compatible digital inputs accepting TTL-level signals; internally tied to NAND gate inputs with no internal pull-up/down. |
| 9 | Ground (VSS) | Reference return path for all internal logic and output stages; must be low-impedance connection to system ground plane. |
| 10 | Output (Y) | Active-low open-drain–compatible CMOS output; sinks or sources current depending on logic state and load configuration. |
| 11–14 | No Connect / Reserved | Unused pins per datasheet; must remain unconnected - not internally bonded and electrically floating. |
| 14 | Power (VDD) | Positive supply rail input; requires local 0.1 µF ceramic decoupling capacitor placed within 5 mm of pin. |
Key Features
| Feature | Design Value |
|---|---|
| Wide Supply Range | Operates from 3 V to 18 V - eliminates need for separate voltage regulators in mixed-voltage systems. |
| High Noise Immunity | Input hysteresis ≥ 1.5 V at VDD = 5 V - rejects EMI-induced glitches in motor-drive or relay-switching environments. |
| Rail-to-Rail Output | VOH ≥ VDD – 0.1 V, VOL ≤ 0.1 V - ensures full logic swing compatibility with downstream 3.3 V or 5 V receivers. |
| Low Power Consumption | IDD = 1 µA max at 25°C - reduces thermal load and extends battery life in always-on monitoring circuits. |
| Extended Temp Rating | Qualified from -55°C to +125°C - meets MIL-PRF-38535 Class K screening for high-reliability applications. |
Applications
| Avionics Power Sequencing | Industrial PLC Safety Interlock |
|---|---|
Use Scenario: Coordinating startup order of flight-critical subsystems (e.g., IMU, GPS, comms) by validating multiple readiness signals before enabling main bus. IC Role / Device Role / Timing Role: 8-input NAND acts as AND-NOT logic arbiter - only asserts enable when all eight upstream sensors report nominal status. Use Value: Reduces discrete logic count by 7+ gates versus 2-input cascade; eliminates timing skew between parallel paths. |
Use Scenario: Enforcing dual-channel hardware safety logic in programmable logic controller I/O modules where both emergency stop and door interlock must be asserted. IC Role / Device Role / Timing Role: Functions as fail-safe voting gate - outputs active-low fault signal if any one of eight monitored safety inputs deasserts. Use Value: Meets SIL-2 functional safety requirements via single-point-of-failure detection without software intervention. |
| Downhole Instrumentation | Legacy Military Radio Control |
Use Scenario: Signal conditioning in oil/gas wellhead telemetry units exposed to extreme ambient temperatures and vibration-induced transients. IC Role / Device Role / Timing Role: Input hysteresis and wide VDD range allow direct interfacing with unregulated 12 V vehicle power while rejecting cable-borne noise. Use Value: Eliminates external Schmitt triggers and LDOs - simplifies BOM and improves MTBF in sealed enclosures. |
Use Scenario: Replacing obsolete military-spec CD4068B-MIL parts in field-deployed HF radio chassis requiring long-term component continuity. IC Role / Device Role / Timing Role: Provides identical logic function and pinout as original CD4068BF3A but in RoHS-compliant SOIC packaging. Use Value: Enables drop-in replacement for aging ceramic DIP versions without PCB redesign or requalification effort. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-input NAND logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4068BM96 | Same die, SOIC-14 package with tape-and-reel delivery (2500 pcs/reel); identical electrical specs and temp range. | Optimized for high-volume SMT production lines using automated pick-and-place feeders. | Select CD4068BM96 for volume manufacturing; CD4068BMT uses tube packaging (25 pcs/tube) suited for prototyping and repair. |
| MC14068BDR2G | Onsemi variant with same pinout and logic function but tighter propagation delay spec (75 ns max at 5 V) and higher drive (±4.2 mA). | Better suited for high-speed clock gating or fast-response safety cutoffs where sub-90 ns latency is required. | Choose MC14068BDR2G when timing margin is critical; verify layout compatibility due to minor package footprint variance (SOIC-14, 1.27 mm pitch). |
Compared with CD4068BMT, CD4068BM96 offers identical functionality with optimized logistics for mass production, while MC14068BDR2G provides improved speed and drive strength at the cost of slightly different thermal resistance and vendor-specific qualification scope.
Availability
CD4068BMT is available at Aetrix Electronics and suitable for avionics power sequencing, industrial PLC safety interlock, and downhole instrumentation requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for CD4068BMT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 50 years of heritage in high-reliability CMOS logic design.
The CD4068BMT belongs to TI's CD4000B series of radiation-tolerant, wide-supply CMOS logic devices engineered for mission-critical industrial, aerospace, and defense systems where longevity and parametric stability are essential.
FAQ
What is the pin 1 marking convention for CD4068BMT?
CD4068BMT uses standard SOIC orientation: pin 1 is located at the top-left corner adjacent to a molded index notch or laser-marked dot on the package body. The notch/dot aligns with the left edge of the topmost lead row, and pins are numbered counter-clockwise. This matches JEDEC MS-012 AB and TI's D0014A package drawing.
Does CD4068BMT support 3.3 V logic systems?
Yes, CD4068BMT operates reliably down to 3 V supply voltage and produces valid CMOS logic levels at that rail - VOH ≥ 2.9 V and VOL ≤ 0.1 V at VDD = 3.3 V. Its input thresholds scale with VDD, ensuring compatibility with 3.3 V microcontrollers and FPGAs without level translation.
Are pins 11–14 on CD4068BMT internally connected?
No, pins 11–14 on CD4068BMT are No Connect (NC) terminals - they are not bonded to the die and serve no internal function. Per TI's datasheet SCHS053C, these pins must remain unconnected in PCB layout to avoid parasitic coupling or unintended current paths.
What is the maximum capacitive load CD4068BMT can drive?
CD4068BMT is characterized up to 50 pF load capacitance with guaranteed 90 ns propagation delay at VDD = 5 V. Driving >50 pF increases delay nonlinearly and may cause output ringing; for >100 pF loads, TI recommends adding a series resistor (22–47 Ω) close to the output pin to dampen reflections.
Is CD4068BMT RoHS compliant and lead-free?
Yes, CD4068BMT carries NIPDAU (nickel-palladium-gold) lead finish and is RoHS compliant per TI's packaging addendum dated 15-Jul-2026. It meets EU Directive 2011/65/EU and has no intentionally added lead, cadmium, mercury, hexavalent chromium, PBB, or PBDE.
CD4068BMT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 4000B
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Logic Type:
- NAND/AND Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 8
- Schmitt Trigger Input:
- No
- Output Type:
- Single-Ended
- Current - Output High, Low:
- 6.8mA, 6.8mA
- Voltage - Supply:
- 3V ~ 18V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
CD4068BMT FAQ
1.How can I place an order for CD4068BMT through Aetrix?
Please submit a Request for Quotation (RFQ) for CD4068BMT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD4068BMT reliable?
The price and inventory of CD4068BMT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4068BMT is usually 5 days.
3.What payment methods are accepted for CD4068BMT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4068BMT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD4068BMT?
CD4068BMT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD4068BMT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD4068BMT?
For technical support, including CD4068BMT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4068BMT requirements.
6.How does Aetrix verify that CD4068BMT is sourced from the original manufacturer or authorized distributors?
All CD4068BMT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4068BMT meets industry standards.
7.What is the process for return or replacement of CD4068BMT?
All CD4068BMT units undergo pre-shipment inspection (PSI). If there is an issue with CD4068BMT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD4068BMT part is unused and in its original packaging.
Return procedure for CD4068BMT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CD4068BMT Tags

-
SN74LVC1G97DCKR
Texas Instruments

-
SN74LVC1G97DRLR
Texas Instruments

-
SN74LVC1G97DBVR
Texas Instruments

-
NC7SZ57P6X
onsemi

-
SN74LVC1G97DCKT
Texas Instruments

-
MC100EP05DTR2G
onsemi

-
MC100EP08DTR2G
onsemi

-
NB7L86AMNHTBG
onsemi

-
HMC722LP3E
Analog Devices Inc.

-
74LVC1G97GW,125
Nexperia USA Inc.

-
74LVC1G57GW,125
Nexperia USA Inc.

-
74LVC1G97GV,125
Nexperia USA Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
