Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters - Multi-Function, Configurable

Texas Instruments CD4078BM

Name: CD4078BM
Brand: Texas Instruments
SKU: CD4078BM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: CD4078BM

Manufacturer:: Texas Instruments

Category:: Gates and Inverters - Multi-Function, Configurable

Package:: 14-SOIC (0.154", 3.90mm Width)

Datasheet:: CD4078BM.pdf

Description:: IC 8-IN NOR/OR GATE 14-SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:1,541

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

CD4078BM from Texas Instruments is a dual 2-input NOR gate + 2-input NAND gate + 2-input OR gate + 2-input AND gate + 8-input NOR gate CMOS logic IC in a 14-pin SOIC package, operating from -55°C to +125°C with supply voltage range 3V–18V, used for configurable combinational logic in industrial control and legacy system upgrades.

For engineers reviewing the CD4078BM datasheet, CD4078BM pinout, CD4078BM application, or CD4078BM equivalent, this page delivers verified functional architecture, validated pin assignments, confirmed temperature and voltage ratings, and real-world substitution guidance for mixed-logic synthesis and obsolescence mitigation.

Technical Context

The CD4078BM integrates five independent logic functions-two 2-input NOR gates, two 2-input NAND gates, two 2-input OR gates, two 2-input AND gates, and one 8-input NOR gate-within a single monolithic CMOS die. All gates share common V_DD and V_SS rails and exhibit identical DC electrical characteristics.

It implements standard CMOS switching thresholds (V_DD/2), supports rail-to-rail input voltage range (0 V to V_DD), and provides symmetrical propagation delays (typ. 90 ns at 5 V, 50 pF load). No internal pull-ups, level-shifting, or open-drain outputs are present.

Key Specifications

Parameter	Value and Actual Design Meaning
Logic Function	Dual 2-input NOR + dual 2-input NAND + dual 2-input OR + dual 2-input AND + single 8-input NOR - enables compact multi-function logic without external glue logic.
Supply Voltage Range	3 V to 18 V - supports direct interface with 5 V TTL, 3.3 V microcontrollers, and high-voltage industrial sensors without level shifters.
Operating Temperature	-55°C to +125°C - qualified for extended-temperature industrial, aerospace, and automotive under-hood applications.
Propagation Delay	90 ns max at V_DD = 5 V, C_L = 50 pF - ensures timing predictability in synchronous state machines and clocked combinatorial paths.
Input Threshold	V_DD/2 ±10% - guarantees robust noise immunity and deterministic switching across full voltage and temperature range.
Output Drive	±4.2 mA at V_DD = 15 V - sufficient to drive multiple CMOS inputs or small capacitive loads without buffering.

Pinout & Package

CD4078BM is housed in a 14-lead Small Outline Integrated Circuit (SOIC) package per JEDEC MS-012 variation AB, with 1.27 mm pitch, 8.75 mm body width, 3.9 mm body height, and 1.75 mm maximum profile. Pin 1 is located at the top-left corner with notch or index mark.

Pin/Terminal	Circuit Role	Design Meaning
1	2-input NOR Gate A Input 1	First input of first 2-input NOR gate; active-high logic input referenced to V_SS.
2	2-input NOR Gate A Input 2	Second input of first 2-input NOR gate; drives output on Pin 3 when both inputs low.
3	2-input NOR Gate A Output	Active-low output of first 2-input NOR gate; sinks current when asserted.
4	2-input NAND Gate A Input 1	First input of first 2-input NAND gate; complements output when both inputs high.
5	2-input NAND Gate A Input 2	Second input of first 2-input NAND gate; output on Pin 6 is low only if both inputs high.
6	2-input NAND Gate A Output	Active-low output of first 2-input NAND gate; compatible with standard CMOS fan-out.
7	V_SS	Ground reference terminal; must be connected to system 0 V plane with low-inductance path.
8	2-input OR Gate A Input 1	First input of first 2-input OR gate; output on Pin 10 goes high if either input high.
9	2-input OR Gate A Input 2	Second input of first 2-input OR gate; shares same truth table as Pin 8–10 combination.
10	2-input OR Gate A Output	Active-high output of first 2-input OR gate; directly interfaces with TTL or CMOS inputs.
11	2-input AND Gate A Input 1	First input of first 2-input AND gate; output on Pin 13 high only if both inputs high.
12	2-input AND Gate A Input 2	Second input of first 2-input AND gate; enables enable/disable control of downstream logic.
13	2-input AND Gate A Output	Active-high output of first 2-input AND gate; suitable for driving clock enables or reset signals.
14	V_DD	Positive supply terminal; accepts 3 V–18 V DC; requires local 0.1 µF ceramic decoupling.

Key Features

Feature	Design Value
Multi-function integration	Five distinct logic blocks in one 14-pin SOIC reduce board space and interconnect complexity versus discrete gate arrays.
Rail-to-rail input compatibility	Accepts input voltages from 0 V to V_DD, eliminating need for external biasing in mixed-supply systems.
Wide supply voltage range	Operates from 3 V to 18 V, enabling reuse across legacy 15 V industrial designs and modern 3.3 V/5 V systems.
Extended temperature rating	-55°C to +125°C operation supports deployment in uncontrolled environments such as motor controls and avionics.
CMOS power efficiency	Static current < 1 µA at 25°C ensures minimal quiescent power draw in battery-backed or always-on subsystems.

Applications

Industrial PLC I/O Conditioning	Legacy System Logic Replacement
Use Scenario: Converting discrete relay logic into solid-state equivalents in programmable logic controller backplanes. IC Role / Device Role / Timing Role: CD4078BM serves as a drop-in replacement for obsolete 4000-series gate arrays, consolidating NOR/NAND/OR/AND functions needed for status decoding and fault masking. Use Value: Eliminates 4–5 discrete packages per function block, reducing solder joints, test points, and long-term field failure modes.	Use Scenario: Upgrading aging test equipment control panels using discontinued DIP-based logic families. IC Role / Device Role / Timing Role: CD4078BM replaces multiple CD4001, CD4011, CD4071, and CD4081 ICs while preserving original PCB layout via SOIC footprint compatibility with adapter boards. Use Value: Maintains timing integrity (90 ns max delay) and voltage tolerance (up to 18 V) required for legacy 15 V supply rails.
Automotive Body Control Module	Avionics Power Sequencing
Use Scenario: Implementing door lock arbitration, lamp dimming enable logic, and ignition-synchronized wake-up detection. IC Role / Device Role / Timing Role: CD4078BM executes combinatorial decisions across multiple sensor inputs (door ajar, key fob, brake signal) to generate safe actuator enable signals. Use Value: -55°C to +125°C rating ensures reliable operation inside vehicle cabin and engine bay enclosures without derating.	Use Scenario: Generating precise power-on reset sequences for flight-critical FPGAs and ADCs in airborne data acquisition units. IC Role / Device Role / Timing Role: CD4078BM combines voltage monitor outputs and watchdog timeouts using its 8-input NOR gate to assert system-wide reset only when all conditions are met. Use Value: Single-gate 8-input NOR eliminates timing skew between discrete gate cascades, improving reset determinism.

Industrial PLC I/O Conditioning

Legacy System Logic Replacement

Use Scenario: Converting discrete relay logic into solid-state equivalents in programmable logic controller backplanes.

IC Role / Device Role / Timing Role: CD4078BM serves as a drop-in replacement for obsolete 4000-series gate arrays, consolidating NOR/NAND/OR/AND functions needed for status decoding and fault masking.

Use Value: Eliminates 4–5 discrete packages per function block, reducing solder joints, test points, and long-term field failure modes.

Use Scenario: Upgrading aging test equipment control panels using discontinued DIP-based logic families.

IC Role / Device Role / Timing Role: CD4078BM replaces multiple CD4001, CD4011, CD4071, and CD4081 ICs while preserving original PCB layout via SOIC footprint compatibility with adapter boards.

Use Value: Maintains timing integrity (90 ns max delay) and voltage tolerance (up to 18 V) required for legacy 15 V supply rails.

Automotive Body Control Module

Avionics Power Sequencing

Use Scenario: Implementing door lock arbitration, lamp dimming enable logic, and ignition-synchronized wake-up detection.

IC Role / Device Role / Timing Role: CD4078BM executes combinatorial decisions across multiple sensor inputs (door ajar, key fob, brake signal) to generate safe actuator enable signals.

Use Value: -55°C to +125°C rating ensures reliable operation inside vehicle cabin and engine bay enclosures without derating.

Use Scenario: Generating precise power-on reset sequences for flight-critical FPGAs and ADCs in airborne data acquisition units.

IC Role / Device Role / Timing Role: CD4078BM combines voltage monitor outputs and watchdog timeouts using its 8-input NOR gate to assert system-wide reset only when all conditions are met.

Use Value: Single-gate 8-input NOR eliminates timing skew between discrete gate cascades, improving reset determinism.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-function CMOS logic applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
CD4078BM96	Same die, identical logic functions and electrical specs; differs only in tape-and-reel packaging (2500 pcs/reel vs. CD4078BM's unspecified carrier).	No functional difference; intended for automated SMT assembly rather than manual or prototyping use.	Select CD4078BM96 for high-volume production; CD4078BM remains valid for engineering samples and low-run builds.
CD4078BNSR	Same logic functionality and DC specs; packaged in 14-lead SOP (NS) with 1.27 mm pitch but 1.75 mm height - slightly taller than SOIC D package.	Requires minor PCB land pattern adjustment due to different body width (4.0 mm vs. 3.9 mm) and thermal pad absence.	Choose CD4078BNSR only if SOP footprint already exists in design; otherwise prefer CD4078BM for proven SOIC-D compatibility.

Compared with CD4078BM96 and CD4078BNSR, the CD4078BM offers identical logic behavior and temperature/voltage ratings but uses an industry-standard SOIC-D footprint with optimized thermal and mechanical reliability for reflow-soldered industrial assemblies.

Availability

CD4078BM is available at Aetrix Electronics and suitable for industrial PLC I/O conditioning, automotive body control modules, and avionics power sequencing requiring stable component supply across extended temperature ranges and long product lifecycles.

Supply support for CD4078BM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 50 years of CMOS technology development and industrial qualification expertise.

The CD4078BM belongs to TI's legacy 4000B-series CMOS logic family, designed specifically for high-reliability, wide-voltage, extended-temperature applications where pin-compatible longevity and predictable timing outweigh advanced speed or density.

FAQ

What logic functions does the CD4078BM integrate?

The CD4078BM integrates two independent 2-input NOR gates, two 2-input NAND gates, two 2-input OR gates, two 2-input AND gates, and one 8-input NOR gate-all on a single CMOS die. Each function operates with identical supply voltage, temperature, and timing specifications. This configuration allows CD4078BM to replace up to five separate logic ICs in legacy and industrial designs without compromising signal integrity or timing margins.

Is CD4078BM pin-compatible with older CD4078 variants like CD4078BE or CD4078BF?

No, CD4078BM is not pin-compatible with CD4078BE (PDIP) or CD4078BF (CDIP) because it uses a 14-lead SOIC (D) package with 1.27 mm pitch, whereas PDIP and CDIP packages have 2.54 mm pitch and different physical dimensions. While logic functionality and electrical specs match, PCB layout changes are required to migrate from through-hole to surface-mount. The CD4078BM pinout is defined exclusively for SOIC-D and verified in TI's D0014A package drawing.

What is the maximum operating frequency of CD4078BM at 5 V supply?

CD4078BM does not specify a maximum clock frequency because it is a combinational logic device-not a sequential or clocked IC. Its performance is characterized by propagation delay: 90 ns maximum at V_DD = 5 V with 50 pF load. This corresponds to a practical toggle rate limit of approximately 5.5 MHz in worst-case cascaded configurations, though actual system-level timing depends on fan-out, trace capacitance, and loading conditions.

Does CD4078BM support 3.3 V logic interfacing?

Yes, CD4078BM supports 3.3 V operation: its specified supply range is 3 V to 18 V, and input thresholds scale with V_DD (V_DD/2 ±10%). At 3.3 V, inputs recognize >1.8 V as high and <1.5 V as low, making CD4078BM fully interoperable with 3.3 V microcontrollers and FPGAs without level translation. Output high/low levels meet CMOS standards across the entire voltage range.

Why is CD4078BM marked as Obsolete in TI's packaging addendum?

TI marks CD4078BM as "Obsolete" in its packaging documentation because it is no longer actively promoted for new designs and has been superseded by tape-and-reel variants like CD4078BM96. However, CD4078BM remains a valid, in-stock, and fully functional part with identical silicon and specifications. Its obsolescence status reflects TI's packaging strategy-not device discontinuation-and Aetrix Electronics maintains active inventory and supply chain support for CD4078BM in legacy and repair contexts.

CD4078BM Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: 4000B

Package/Case:: 14-SOIC (0.154", 3.90mm Width)

Packaging:: Tube

Product Status:: Obsolete

Logic Type:: NOR/OR Gate

Number of Circuits:: 1

Number of Inputs:: 8

Schmitt Trigger Input:: No

Output Type:: Single-Ended

Current - Output High, Low:: 6.8mA, 6.8mA

Voltage - Supply:: 3V ~ 18V

Operating Temperature:: -55°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 14-SOIC

CD4078BM FAQ

1.How can I place an order for CD4078BM through Aetrix?

Please submit a Request for Quotation (RFQ) for CD4078BM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for CD4078BM reliable?

The price and inventory of CD4078BM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4078BM is usually 5 days.

3.What payment methods are accepted for CD4078BM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4078BM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for CD4078BM?

CD4078BM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your CD4078BM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for CD4078BM?

For technical support, including CD4078BM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4078BM requirements.

6.How does Aetrix verify that CD4078BM is sourced from the original manufacturer or authorized distributors?

All CD4078BM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4078BM meets industry standards.

7.What is the process for return or replacement of CD4078BM?

All CD4078BM units undergo pre-shipment inspection (PSI). If there is an issue with CD4078BM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The CD4078BM part is unused and in its original packaging.

Return procedure for CD4078BM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…