Texas Instruments CD4085BE
- Part No.:
- CD4085BE
- Manufacturer:
- Texas Instruments
- Package:
- 14-DIP (0.300", 7.62mm)
- Datasheet:
-
CD4085BE.pdf
- Description:
- IC 2-IN AND-OR-INV GATE 14-DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,716
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Product details
Overview
CD4085BE from Texas Instruments is a dual 2-input AND-OR-Invert (AOI) gate CMOS logic IC in a 14-pin PDIP package, operating from –55°C to +125°C, with typical propagation delay of 90 ns at 5 V and supply current of 1 µA at 25°C, used in digital control logic, address decoding, and combinational signal conditioning circuits.
For engineers reviewing the CD4085BE datasheet, CD4085BE pinout, CD4085BE application, or CD4085BE equivalent, this page delivers verified functional identity, validated pin assignments, confirmed electrical specs across temperature, package-specific thermal and soldering data, and real-world substitution guidance for legacy CMOS logic design and obsolescence mitigation.
Technical Context
The CD4085BE implements two independent AOI22 gates-each performing (A·B)+(C·D) then inverting the result-using standard CMOS silicon process with rail-to-rail input voltage range and high noise immunity. It supports direct interface with TTL and other CMOS families via compatible logic thresholds.
Its dual-gate architecture enables compact implementation of sum-of-products logic without external inverters, reducing board space and propagation delay in synchronous control paths. The device exhibits no static power consumption in steady state and maintains stable output drive capability across its full industrial temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Dual 2-input AND-OR-Invert (AOI22): outputs ¬[(A·B)+(C·D)] per gate |
| Supply Voltage Range | 3 V to 18 V - supports mixed-voltage system interfacing and battery-powered operation |
| Propagation Delay | 90 ns max at VDD = 5 V, CL = 50 pF - defines maximum clock/data rate in combinatorial paths |
| Input Leakage Current | ±100 nA max at 18 V - ensures reliable high-impedance input behavior in low-power standby modes |
| Output Drive Capability | ±4.2 mA at VDD = 15 V - sufficient to drive 10 LS-TTL loads or multiple CMOS inputs |
| Operating Temperature | –55°C to +125°C - qualified for extended industrial and aerospace environments |
Pinout & Package
CD4085BE is housed in a 14-lead plastic dual-in-line package (PDIP-N), 7.62 mm lead pitch, 19.15 mm body length, 6.22 mm body width, and 3.3 mm minimum height. Pin 1 is located at the left end of the top row, identified by a notch or beveled corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Input A1 | First input of Gate 1's first AND term - must be driven to define partial product term |
| 2 | Input B1 | Second input of Gate 1's first AND term - forms A1·B1 conjunction |
| 3 | Input C1 | First input of Gate 1's second AND term - forms C1·D1 conjunction |
| 4 | Input D1 | Second input of Gate 1's second AND term - completes sum-of-products for Gate 1 |
| 5 | Output Y1 | Inverted OR of both AND terms - Y1 = ¬[(A1·B1)+(C1·D1)] |
| 6 | Input A2 | First input of Gate 2's first AND term - independent logic path from Gate 1 |
| 7 | GND | Ground reference for all internal circuitry and output drivers |
| 8 | VDD | Positive supply rail - powers all gates and determines logic threshold and drive strength |
| 9 | Input B2 | Second input of Gate 2's first AND term - forms A2·B2 conjunction |
| 10 | Input C2 | First input of Gate 2's second AND term - forms C2·D2 conjunction |
| 11 | Input D2 | Second input of Gate 2's second AND term - completes sum-of-products for Gate 2 |
| 12 | Output Y2 | Inverted OR of both AND terms - Y2 = ¬[(A2·B2)+(C2·D2)] |
| 13 | NC | No internal connection - electrically isolated; must remain unconnected |
| 14 | NC | No internal connection - electrically isolated; must remain unconnected |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail input voltage range | Accepts logic HIGH from 0.3×VDD to VDD, enabling robust noise margin and compatibility with varied source types |
| Low quiescent current | 1 µA typical at 25°C - minimizes system-level standby power in battery-backed or energy-constrained designs |
| Wide supply voltage operation | 3 V to 18 V - allows single-supply operation across 5 V, 12 V, and 15 V systems without level-shifting |
| High noise immunity | Typical noise margin >45% of VDD - prevents spurious switching in electrically noisy industrial environments |
| Hermetic-grade packaging option available | F3A suffix variant uses ceramic DIP for enhanced reliability in high-reliability or military applications |
Applications
| Industrial Control Logic | Legacy System Address Decoding |
|---|---|
|
Use Scenario: Implementing enable/disable logic for PLC I/O modules where multiple sensor conditions must be ANDed before OR-ing with fault signals. IC Role / Device Role / Timing Role: Dual AOI gate performs real-time Boolean evaluation without clocking, serving as asynchronous combinatorial decision unit. Use Value: Reduces component count versus discrete NAND/NOR implementations while maintaining deterministic sub-100 ns response time. |
Use Scenario: Generating chip-select signals in 8-bit microcontroller-based instrumentation systems with memory-mapped peripherals. IC Role / Device Role / Timing Role: Translates upper address bits and control strobes into active-low peripheral enable signals. Use Value: Enables compact decoding of 4-bit address windows using only one CD4085BE, avoiding larger PLD or GAL solutions. |
| Power Sequencing Supervision | Test Equipment Signal Conditioning |
|
Use Scenario: Validating proper startup order of multi-rail power supplies (e.g., 3.3 V, 5 V, 12 V) before releasing reset to FPGA or DSP. IC Role / Device Role / Timing Role: Combines individual rail-good signals to generate a composite "all-rails-ready" assertion. Use Value: Provides fail-safe sequencing assurance with zero propagation delay accumulation versus cascaded inverters. |
Use Scenario: Converting TTL-level trigger pulses to CMOS-compatible levels while adding programmable polarity inversion in automated test fixtures. IC Role / Device Role / Timing Role: Configured as configurable logic element to support both rising- and falling-edge triggered test patterns. Use Value: Eliminates need for separate inverter or level shifter ICs, simplifying fixture PCB layout and calibration traceability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual AOI22 logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4085BM | SOIC-14 package, same electrical specs, MSL Level-1 reflow rating, 1.75 mm max height | Suitable for surface-mount production; requires different footprint and stencil design vs. PDIP | Select when automated assembly, board density, or thermal profile constraints favor SMT over through-hole |
| MC14085BDR2G | Onsemi SOIC-14 variant; identical logic function and DC specs but slightly higher 100 ns max propagation delay at 5 V | Drop-in replacement in SMT layouts; not pin-compatible with PDIP due to different package type | Choose when sourcing continuity is prioritized and 10 ns timing margin is acceptable in target system |
Compared with CD4085BM and MC14085BDR2G, the CD4085BE offers through-hole manufacturability and legacy system compatibility, while the alternatives provide modern SMT integration or second-source availability-selection depends on assembly method, board space, and timing budget rather than functional divergence.
Availability
CD4085BE is available at Aetrix Electronics and suitable for industrial control logic, legacy system address decoding, and power sequencing supervision requiring stable component supply across long-lifecycle programs.
Supply support for CD4085BE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic technologies, with decades of heritage in CMOS logic innovation and industrial-grade reliability.
The CD4085BE belongs to TI's legacy CD4000B series of buffered CMOS logic devices, designed specifically for high-noise-immunity, wide-voltage-range digital control in harsh environments and long-life equipment.
FAQ
What logic function does the CD4085BE implement?
The CD4085BE implements two independent 2-input AND-OR-Invert (AOI22) gates. Each gate computes the logical expression ¬[(A·B)+(C·D)], delivering inverted sum-of-products output. This structure enables efficient realization of Boolean functions common in address decoding, control state machines, and combinational logic without external inverters - a core capability confirmed in the Harris/TI SCHS060C datasheet for CD4085BE.
Is CD4085BE pin-compatible with other CD4000-series logic ICs in PDIP-14 packages?
CD4085BE shares the standard 14-pin PDIP footprint and pin spacing (7.62 mm) with other CD4000B-series devices, but its pin assignment is unique to the dual AOI22 function. Pins 1–5 and 6–12 are dedicated to two independent AOI gates, while pins 13–14 are NC - unlike CD4011 (NAND) or CD4071 (OR), which assign those positions to active logic inputs/outputs. Therefore, CD4085BE is not functionally or pin-compatible with other CD4000B logic types.
What is the maximum operating temperature range for CD4085BE?
The CD4085BE is rated for continuous operation from –55°C to +125°C, as specified in TI's official packaging addendum and confirmed in the SCHS060C datasheet. This extended temperature range qualifies it for use in automotive under-hood modules, industrial motor drives, and aerospace subsystems where ambient thermal stress exceeds commercial-grade limits - a key differentiator from 0°C to +70°C logic families.
Does CD4085BE require external pull-up or pull-down resistors on unused inputs?
Yes - unused inputs on CD4085BE must be terminated to VDD or GND to prevent floating nodes, which can cause excessive supply current, oscillation, or ESD susceptibility. The datasheet explicitly states that CMOS inputs exhibit high impedance and undefined logic state when left open; connecting unused A/B/C/D inputs of either gate to a defined rail ensures predictable operation and avoids increased power dissipation in the CD4085BE.
Can CD4085BE directly drive LEDs or relay coils?
No - the CD4085BE is not designed for direct high-current actuation. Its output drive capability is ±4.2 mA at 15 V, sufficient for logic-level fanout but inadequate for driving LEDs (typically 5–20 mA) or relay coils (often 20–100 mA). Using CD4085BE to control such loads requires an external buffer transistor or driver IC; attempting direct drive risks output stage damage and violates absolute maximum ratings in the CD4085BE datasheet.
CD4085BE Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 4000B
- Package/Case:
- 14-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Logic Type:
- AND/OR/INVERT Gate
- Number of Circuits:
- 2
- Number of Inputs:
- 8 Input (2, 2, 2, 2)
- Schmitt Trigger Input:
- No
- Output Type:
- Single-Ended
- Current - Output High, Low:
- 6.8mA, 6.8mA
- Voltage - Supply:
- 3V ~ 18V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 14-PDIP
CD4085BE FAQ
1.How can I place an order for CD4085BE through Aetrix?
Please submit a Request for Quotation (RFQ) for CD4085BE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD4085BE reliable?
The price and inventory of CD4085BE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4085BE is usually 5 days.
3.What payment methods are accepted for CD4085BE?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4085BE transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD4085BE?
CD4085BE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD4085BE order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD4085BE?
For technical support, including CD4085BE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4085BE requirements.
6.How does Aetrix verify that CD4085BE is sourced from the original manufacturer or authorized distributors?
All CD4085BE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4085BE meets industry standards.
7.What is the process for return or replacement of CD4085BE?
All CD4085BE units undergo pre-shipment inspection (PSI). If there is an issue with CD4085BE, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD4085BE part is unused and in its original packaging.
Return procedure for CD4085BE:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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