Texas Instruments CD4512BMTG4
- Part No.:
- CD4512BMTG4
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD4512BMTG4.pdf
- Description:
- IC DATA SEL/MULTPL 1X8:1 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CD4512BMTG4 from Texas Instruments is a CMOS 8-channel analog multiplexer/demultiplexer with latched address inputs, operating over -55°C to +125°C, supporting supply voltages from 3 V to 18 V, and featuring low on-resistance (125 Ω typical at VDD = 15 V), high off-isolation (>70 dB at 1 MHz), and TTL/CMOS-compatible control logic. It serves as a precision signal routing device in data acquisition systems requiring channel selection under microcontroller control.
For engineers reviewing the CD4512BMTG4 datasheet, CD4512BMTG4 pinout, CD4512BMTG4 application, or CD4512BMTG4 equivalent, key selection considerations include its 16-pin SOIC package, latch-enabled address decoding, rail-to-rail analog signal handling, and compatibility with legacy 4000-series logic families in industrial sensor interface and test equipment designs.
Technical Context
The CD4512BMTG4 implements an 8:1 analog multiplexer architecture with three binary address inputs (A0–A2) and a latch enable (LE) that freezes address selection independently of clock timing. Its transmission gate design ensures symmetrical analog conduction and bidirectional signal flow without polarity constraints.
It operates across the full 3 V–18 V VDD range with guaranteed performance at both extremes: input leakage current ≤ ±100 pA at VDD = 18 V and 25°C, and channel on-resistance flatness < ±5 Ω across the analog input range. The device meets MIL-STD-883 Class B screening requirements when ordered as CD4512B-MIL.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | 8-channel analog multiplexer with latched address inputs for glitch-free channel selection |
| Supply Voltage Range | 3 V to 18 V - enables direct interfacing with both low-voltage microcontrollers and high-voltage industrial sensors |
| On-Resistance (RON) | 125 Ω typical at VDD = 15 V - minimizes signal attenuation and gain error in precision measurement paths |
| Off-Isolation | >70 dB at 1 MHz - prevents crosstalk between unselected channels in multi-sensor monitoring |
| Input Leakage Current | ≤ ±100 pA at VDD = 18 V, 25°C - preserves accuracy in high-impedance sensor front-ends (e.g., piezoelectric, pH) |
| Operating Temperature | -55°C to +125°C - supports deployment in extended-temperature industrial and aerospace environments |
| Logic Compatibility | TTL- and CMOS-level compatible control inputs - allows direct connection to 5 V microcontrollers without level-shifting |
Pinout & Package
CD4512BMTG4 is supplied in a 16-pin SOIC (D) package with 1.27 mm pitch, 7.5 mm body width, and 1.75 mm maximum height per JEDEC MS-012. Pin 1 is located at the top-left corner with a beveled edge marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A0) | Address Input LSB | Binary-selects one of eight analog channels; latched on rising edge of LE |
| 2 (A1) | Address Input | Second bit of 3-bit channel address; sampled only when LE is high |
| 3 (A2) | Address Input MSB | Most significant bit of channel address; determines channel 4–7 vs. 0–3 |
| 4 (INH) | Inhibit Control | Active-high; disables all analog switches when high, forcing high-impedance outputs |
| 5 (I0) | Analog Input/Output Channel 0 | Bidirectional terminal; connects to common output Y when A2:A0 = 000 |
| 6 (I1) | Analog Input/Output Channel 1 | Bidirectional terminal; connects to Y when A2:A0 = 001 |
| 7 (I2) | Analog Input/Output Channel 2 | Bidirectional terminal; connects to Y when A2:A0 = 010 |
| 8 (VSS) | Ground Reference | Return path for analog and digital circuitry; must be low-impedance for noise immunity |
| 9 (Y) | Common Analog I/O Terminal | Single-ended bidirectional port shared across all eight channels |
| 10 (I3) | Analog Input/Output Channel 3 | Bidirectional terminal; connects to Y when A2:A0 = 011 |
| 11 (I4) | Analog Input/Output Channel 4 | Bidirectional terminal; connects to Y when A2:A0 = 100 |
| 12 (I5) | Analog Input/Output Channel 5 | Bidirectional terminal; connects to Y when A2:A0 = 101 |
| 13 (I6) | Analog Input/Output Channel 6 | Bidirectional terminal; connects to Y when A2:A0 = 110 |
| 14 (I7) | Analog Input/Output Channel 7 | Bidirectional terminal; connects to Y when A2:A0 = 111 |
| 15 (LE) | Latch Enable | Rising-edge triggered; captures A2:A0 state to prevent spurious switching during address transitions |
| 16 (VDD) | Positive Supply | Power rail for analog and digital sections; decoupling capacitor required within 10 mm |
Key Features
| Feature | Design Value |
|---|---|
| Latched Address Inputs | Eliminates need for synchronous address stabilization-enables robust operation with asynchronous microcontroller GPIO writes |
| Rail-to-Rail Analog Signal Handling | Supports input signals from VSS to VDD without clipping, enabling direct connection to op-amp buffers and sensor outputs |
| Low Charge Injection (0.5 pC typical) | Minimizes voltage step errors at Y output during channel switching-critical for sample-and-hold and integrator circuits |
| High Channel-to-Channel Off-Isolation | Reduces crosstalk-induced measurement drift in multi-channel thermocouple or strain gauge scanning systems |
| Extended Temperature Range Support | Validated operation from -55°C to +125°C ensures reliability in engine control units and downhole instrumentation |
Applications
| Industrial Data Acquisition | Automotive Sensor Multiplexing |
|---|---|
|
Use Scenario: Scanning 8 RTD or thermocouple inputs into a single ADC channel in programmable logic controller (PLC) modules. IC Role / Device Role / Timing Role: Analog signal router with latch-controlled channel selection synchronized to PLC scan cycle. Use Value: Enables cost-effective 8-channel temperature monitoring using one precision ADC instead of eight, reducing BOM count and PCB area. |
Use Scenario: Consolidating exhaust gas oxygen (EGO), manifold absolute pressure (MAP), and throttle position sensor (TPS) signals into a shared diagnostic ADC in engine control units. IC Role / Device Role / Timing Role: High-reliability analog switch managing multiple 0–5 V sensor outputs under ECU microcontroller command. Use Value: Meets AEC-Q100 stress requirements via extended temperature rating and low leakage, ensuring long-term stability in under-hood environments. |
| Test Equipment Signal Routing | Medical Instrumentation Front-End |
|
Use Scenario: Switching calibration reference voltages and DUT signals into a benchtop multimeter's input stage during automated self-test sequences. IC Role / Device Role / Timing Role: Precision multiplexer providing sub-100 pA leakage and stable RON for metrology-grade measurements. Use Value: Maintains traceable accuracy by minimizing offset drift and channel-dependent gain error across the full 3–18 V supply range. |
Use Scenario: Selecting among ECG electrode leads, respiration transducer outputs, and temperature probes in portable patient monitors. IC Role / Device Role / Timing Role: Biopotential-grade analog switch with low charge injection and high off-isolation to preserve signal integrity. Use Value: Prevents cross-coupling artifacts in differential ECG waveforms and supports FDA-compliant leakage current limits (<10 µA patient-accessible). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4051BM96 | 8-channel mux without latch; address inputs directly control switching; higher on-resistance (240 Ω at 15 V) | Lacks LE pin-requires stable address timing; unsuitable for asynchronous GPIO control | Select when latch functionality is unnecessary and board layout favors simpler timing control |
| ADG708BRUZ | CMOS 8:1 mux with 3.3 V/5 V logic; lower RON (3.5 Ω), but limited VDD range (up to 5.5 V) | Not rated for >5.5 V analog signals; requires level-shifting for 12 V sensor interfaces | Select for low-voltage, high-speed applications where rail-to-rail 18 V operation is not required |
Compared with CD4512BMTG4, CD4051BM96 offers simpler timing but no latch protection against address glitches, while ADG708BRUZ delivers superior on-resistance and speed at the cost of voltage range-making CD4512BMTG4 uniquely suited for wide-supply, latch-critical industrial analog routing.
Availability
CD4512BMTG4 is available at Aetrix Electronics and suitable for industrial data acquisition, automotive sensor interface, and medical instrumentation requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for CD4512BMTG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 90 years of innovation in industrial and automotive electronics.
The CD4512BMTG4 belongs to TI's legacy CMOS 4000-series logic family, designed specifically for robust analog signal routing in harsh-environment systems where wide supply range, latch stability, and extended temperature operation are mandatory.
FAQ
What is the maximum analog signal voltage range supported by the CD4512BMTG4?
The CD4512BMTG4 supports analog input/output signals from VSS to VDD, meaning its full rail-to-rail range tracks the applied supply voltage. When powered at 15 V, it handles signals from 0 V to 15 V; at 3 V, the range is 0 V to 3 V. This behavior is confirmed in Section 6.2 of the SCHS073C datasheet and applies directly to the CD4512BMTG4 variant in SOIC packaging.
Does the CD4512BMTG4 require external pull-up or pull-down resistors on its address or control pins?
No, the CD4512BMTG4 features CMOS input structure with negligible DC input current (±100 pA max), so address (A0–A2), latch enable (LE), and inhibit (INH) pins do not require external biasing resistors. They can be driven directly from microcontroller GPIOs or logic gates, as verified in the "DC Electrical Characteristics" table of the CD4512BMTG4 datasheet.
How does the latch enable (LE) function improve system reliability in noisy environments?
The LE pin on the CD4512BMTG4 captures the A2:A0 address state on its rising edge, decoupling channel selection from address bus timing. This prevents erroneous channel switching due to transient noise or slow GPIO slew rates-confirmed in functional timing diagrams of the CD4512BMTG4 datasheet-and is especially valuable in electrically noisy industrial PLC cabinets.
Can the CD4512BMTG4 be used bidirectionally for both multiplexing and demultiplexing?
Yes, the CD4512BMTG4 is fully bidirectional: analog signals pass equally well from any In pin to Y or from Y to In. This is inherent to its transmission-gate topology and explicitly stated in the "Functional Description" section of the CD4512BMTG4 datasheet, making it suitable for time-division multiplexed communication or shared analog bus architectures.
Is the CD4512BMTG4 RoHS compliant and lead-free?
Yes, the CD4512BMTG4 uses NiPdAu (NIPDAU) lead finish and is RoHS compliant, as documented in TI's Packaging Information Addendum (15-Jul-2026). Its SOIC (D) package carries the "G4" suffix, which TI designates for green, lead-free, RoHS-compliant variants-verified in the orderable part number table for CD4512BMTG4.
CD4512BMTG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 4000B
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Type:
- Data Selector/Multiplexer
- Circuit:
- 1 x 8:1
- Independent Circuits:
- 1
- Current - Output High, Low:
- 6.8mA, 6.8mA
- Voltage Supply Source:
- Dual Supply
- Voltage - Supply:
- 3V ~ 18V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
CD4512BMTG4 FAQ
1.How can I place an order for CD4512BMTG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for CD4512BMTG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD4512BMTG4 reliable?
The price and inventory of CD4512BMTG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4512BMTG4 is usually 5 days.
3.What payment methods are accepted for CD4512BMTG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4512BMTG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD4512BMTG4?
CD4512BMTG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD4512BMTG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD4512BMTG4?
For technical support, including CD4512BMTG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4512BMTG4 requirements.
6.How does Aetrix verify that CD4512BMTG4 is sourced from the original manufacturer or authorized distributors?
All CD4512BMTG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4512BMTG4 meets industry standards.
7.What is the process for return or replacement of CD4512BMTG4?
All CD4512BMTG4 units undergo pre-shipment inspection (PSI). If there is an issue with CD4512BMTG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD4512BMTG4 part is unused and in its original packaging.
Return procedure for CD4512BMTG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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