Texas Instruments CD4543BNS
- Part No.:
- CD4543BNS
- Manufacturer:
- Texas Instruments
- Category:
- Display Drivers
- Package:
- -
- Datasheet:
-
CD4543BNS.pdf
- Description:
- IC BCD-7SEG LTCH/DEC/DVR 16SO
- Quantity:
- Payment:

- Shipping:

Inventory:6,550
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CD4543BNS from Texas Instruments is a CMOS BCD-to-7-segment latch/decoder/driver IC designed for direct LED display interfacing. It features active-high latching, phase-controlled blanking, and ripple-blank input for cascaded multi-digit displays. Operates from 3 V to 18 V supply, supports common-anode LED outputs, and delivers up to 10 mA sink per segment at VDD = 15 V.
For engineers reviewing the CD4543BNS datasheet, CD4543BNS pinout, CD4543BNS application, or CD4543BNS equivalent, key selection considerations include its common-anode output architecture, latch-enable timing behavior, ripple-blank propagation delay, and compatibility with legacy 4000-series logic voltage ranges.
Technical Context
The CD4543BNS implements a synchronous BCD-to-7-segment decoding function with integrated D-type latch and active-low phase control (PH) for multiplexed display timing. Its ripple-blank input (RBI) enables zero-suppression across multiple digits via daisy-chained blanking signals.
Latch operation occurs on the rising edge of LE (Latch Enable), isolating the internal decoder from input changes until next latch event. Output drivers are open-drain compatible only in common-anode configuration - no internal pull-ups - requiring external current-limiting resistors per segment.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 3 V to 18 V - supports wide-range battery and industrial rail operation without level-shifting |
| Output Type | Common-anode driver - sinks current to ground; requires external anode resistors for LED current limiting |
| Max Segment Sink Current | 10 mA at VDD = 15 V - defines minimum external resistor value (≥1.5 kΩ) for standard red LEDs |
| Propagation Delay (tPLH) | 120 ns typical at VDD = 15 V - limits maximum multiplex rate to ~4 MHz for stable digit updates |
| Ripple-Blank Propagation | 140 ns typical - ensures synchronized zero-suppression across stacked CD4543B devices in multi-digit systems |
| Operating Temperature | -55 °C to +125 °C - qualified for extended industrial and automotive under-hood environments |
Pinout & Package
CD4543BNS is supplied in a 16-lead SOIC package (Package Drawing NS), 3.9 mm body width, 1.75 mm height, with 0.65 mm lead pitch and gull-wing terminations.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A) | BCD Input A (LSB) | Active-high binary-coded decimal bit 0; referenced to VSS |
| 2 (B) | BCD Input B | Active-high binary-coded decimal bit 1; must be driven to defined logic level |
| 3 (C) | BCD Input C | Active-high binary-coded decimal bit 2; floating inputs default to logic high |
| 4 (D) | BCD Input D (MSB) | Active-high binary-coded decimal bit 3; determines decoded segment pattern |
| 5 (LE) | Latch Enable | Active-high edge-triggered latch control; rising edge captures BCD inputs into internal register |
| 6 (PH) | Phase Control | Active-low signal enabling/disabling segment outputs; used for time-multiplexed display blanking |
| 7 (RBI) | Ripple-Blank Input | Active-low cascading input; suppresses leading zeros when driven low by upstream device |
| 8 (VSS) | Ground | Reference return path for all digital and output currents |
| 9 (a–g) | Segment Outputs | Open-drain outputs labeled a through g; each sinks current to drive common-anode LED segments |
| 10 (LT) | Lamp Test | Active-low input forcing all segment outputs high (blanking disabled) for visual continuity check |
| 11 (BI) | Blanking Input | Active-low global blanking; overrides PH and RBI to force all outputs off |
| 12 (VDD) | Positive Supply | CMOS logic and output driver power rail; decoupling capacitor required near pin |
| 13–16 (NC) | No Connect | Not internally bonded; must remain unconnected per TI datasheet guidance |
Key Features
| Feature | Design Value |
|---|---|
| BCD-to-7-segment decoding with latch | Eliminates need for external storage registers in static or multiplexed LED displays |
| Common-anode LED driver architecture | Direct interface to standard 7-segment displays without external transistor arrays |
| Ripple-blank input/output capability | Enables automatic suppression of leading zeros across up to four cascaded CD4543B devices |
| Lamp test mode | Single-pin activation (LT low) illuminates all segments simultaneously for production verification |
| Wide supply voltage range (3–18 V) | Supports direct integration into both low-voltage microcontroller systems and high-voltage industrial panels |
Applications
| Digital Panel Meter | Industrial Process Controller |
|---|---|
Use Scenario: 4-digit LED readout showing analog sensor values (e.g., pressure, temperature) in factory HMIs. IC Role / Device Role / Timing Role: Latched BCD decoder driving common-anode 7-segment displays with zero-suppression enabled via RBI/RO. Use Value: Reduces microcontroller GPIO count by 7 per digit and eliminates software-based blanking logic. | Use Scenario: Local operator interface on PLC-mounted I/O modules with discrete status indicators. IC Role / Device Role / Timing Role: Static display driver receiving parallel BCD from FPGA or microcontroller; LT pin used for field service diagnostics. Use Value: Enables reliable LED drive at 12 V supply without external transistors or level shifters. |
| Legacy Instrumentation Upgrade | Energy Meter Display Interface |
Use Scenario: Retrofitting vacuum fluorescent displays (VFDs) with modern LED modules in aging test equipment. IC Role / Device Role / Timing Role: Drop-in replacement for obsolete 4543 variants; leverages existing 16-pin SO footprint and BCD bus timing. Use Value: Maintains full backward compatibility while improving display brightness and reliability. | Use Scenario: kWh meter with 6-digit LCD/LED hybrid display where first two digits show tariff code. IC Role / Device Role / Timing Role: Cascaded CD4543BNS devices use RBI/RO to suppress leading zeros in tariff field, reducing visual clutter. Use Value: Achieves zero-suppression without firmware modification or additional logic gates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar BCD-to-7-segment latch/decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4511BE | Common-cathode output architecture; no ripple-blank output (RO); identical latch/decode logic | Requires common-cathode LED displays and separate blanking logic for multi-digit zero suppression | Select CD4511BE only when redesigning for common-cathode displays and accepting added system-level blanking complexity |
| MC14495P | Non-latching BCD decoder; no LE, PH, or RBI pins; TTL-compatible input thresholds; 5 V only | Suitable only for static displays with continuous BCD updates; incompatible with multiplexed or zero-suppressing designs | Choose MC14495P only for simple 5 V fixed-display applications where latch functionality is unnecessary |
Compared with CD4511BE and MC14495P, the CD4543BNS uniquely combines latching, phase control, and ripple-blank signaling in a single 16-pin SOIC package - enabling compact, low-firmware LED interfaces for industrial and instrumentation systems operating across 3–18 V.
Availability
CD4543BNS is available at Aetrix Electronics and suitable for digital panel meters, industrial process controllers, legacy instrumentation upgrades, and energy meter display interfaces requiring stable component supply and long-term industrial temperature support.
Supply support for CD4543BNS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog, embedded processing, and logic ICs for industrial, automotive, and consumer markets.
The CD4543BNS belongs to TI's CD4000B series of buffered CMOS logic devices, engineered for robust operation in noisy industrial environments with wide supply tolerance and high noise immunity.
FAQ
What is the maximum supply voltage rating for the CD4543BNS?
The CD4543BNS is rated for operation up to 18 V DC on VDD, with guaranteed performance across the full -55 °C to +125 °C temperature range. Exceeding 18 V risks permanent damage to internal oxide layers. For reliable long-term use in industrial applications, TI recommends maintaining VDD ≤ 16.5 V with ≥100 nF ceramic decoupling placed within 5 mm of the CD4543BNS VDD/VSS pins.
Can the CD4543BNS drive common-cathode LED displays?
No, the CD4543BNS is designed exclusively for common-anode LED displays. Its segment outputs (pins 9–15) are open-drain N-channel drivers that sink current to ground. Driving a common-cathode display would require external PNP transistors or a level-shifting buffer - defeating the purpose of its integrated driver architecture. Use CD4511BE instead for common-cathode applications.
How does the ripple-blank function work across multiple CD4543BNS devices?
In a cascaded configuration, the RO (Ripple-Blank Output) pin of a more-significant digit drives the RBI (Ripple-Blank Input) of the next less-significant digit. When RBI is low and all BCD inputs are zero, that digit blanks and asserts RO low - propagating suppression leftward. The CD4543BNS RO pin is active-low and open-drain, requiring a pull-up resistor (typically 10 kΩ to VDD) for proper logic level restoration between digits.
Is the CD4543BNS pin-compatible with older CD4543 variants?
Yes, the CD4543BNS maintains identical pinout, logic function, and electrical specifications with earlier CD4543B versions including CD4543BE (PDIP) and CD4543BM (SOIC). All share the same 16-pin SOIC (NS) footprint, signal assignments, and timing parameters - enabling direct replacement in existing PCB layouts without modification.
What is the purpose of the Phase Control (PH) pin on the CD4543BNS?
The PH pin on the CD4543BNS is an active-low control that enables or disables segment outputs independently of latch state. When PH is high, outputs remain in their last latched state; when PH is low, outputs reflect real-time BCD inputs. This allows precise timing of LED turn-on/off during multiplexed display scanning - critical for eliminating ghosting and ensuring uniform brightness across digits.
CD4543BNS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Display Type:
- -
- Configuration:
- -
- Interface:
- -
- Digits or Characters:
- -
- Current - Supply:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
CD4543BNS FAQ
1.How can I place an order for CD4543BNS through Aetrix?
Please submit a Request for Quotation (RFQ) for CD4543BNS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD4543BNS reliable?
The price and inventory of CD4543BNS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4543BNS is usually 5 days.
3.What payment methods are accepted for CD4543BNS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4543BNS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD4543BNS?
CD4543BNS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD4543BNS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD4543BNS?
For technical support, including CD4543BNS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4543BNS requirements.
6.How does Aetrix verify that CD4543BNS is sourced from the original manufacturer or authorized distributors?
All CD4543BNS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4543BNS meets industry standards.
7.What is the process for return or replacement of CD4543BNS?
All CD4543BNS units undergo pre-shipment inspection (PSI). If there is an issue with CD4543BNS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD4543BNS part is unused and in its original packaging.
Return procedure for CD4543BNS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CD4543BNS Tags

-
PCA8561AHN/AY
NXP Semiconductors

-
SN74LS47N
Texas Instruments

-
PCF85176T/1Y
NXP Semiconductors

-
PCF85176H/1,518
NXP Semiconductors

-
BU9796AMUV-E2
Rohm Semiconductor

-
PCA85176H/Q900/1,5
NXP Semiconductors

-
PCF8537AH/1,518
NXP Semiconductors

-
LM3914VX/NOPB
Texas Instruments

-
PCF85134HL/1,118
NXP Semiconductors

-
AS1115-BSST
ams-OSRAM USA INC.

-
PCA8534AH/Q900/1,5
NXP Semiconductors

-
LM3914V/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

