Texas Instruments CD4543BPW
- Part No.:
- CD4543BPW
- Manufacturer:
- Texas Instruments
- Category:
- Display Drivers
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
CD4543BPW.pdf
- Description:
- IC DRVR 7 SEGMNT 1 DIGIT 16TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,168
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CD4543BPW from Texas Instruments is a CMOS BCD-to-7-segment latch/decoder/driver IC designed for direct LED display interfacing. It accepts 4-bit BCD input, features phase and blanking control, operates over −55°C to +125°C, supports 3V–18V supply, and drives common-anode LED segments with active-low outputs.
For engineers reviewing the CD4543BPW datasheet, CD4543BPW pinout, CD4543BPW application, or CD4543BPW equivalent, this device is selected for high-voltage LED digit driving in industrial panel meters, legacy instrumentation displays, and low-power multiplexed 7-segment systems where TTL/CMOS compatibility and latch functionality are required.
Technical Context
The CD4543BPW implements a synchronous latch followed by a BCD-to-7-segment decoder with active-low open-drain outputs optimized for common-anode LEDs. Its PH (phase) input enables polarity selection for AC-coupled displays, while the BL (blank) input forces all segment outputs high to disable display output.
It uses standard CMOS logic architecture with buffered inputs, rail-to-rail output swing, and inherent noise immunity. The device does not include internal current-limiting resistors-external series resistors are required per segment to set LED current within safe operating limits.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 3 V to 18 V - Enables direct interface with legacy 5 V, 12 V, or battery-powered systems without level-shifting. |
| Output Type | Active-low open-drain - Requires external pull-up or common-anode LED connection; supports up to 18 V sink capability. |
| Input Logic Compatibility | CMOS/TTL - Accepts standard 5 V TTL logic levels at VDD = 5 V; full rail-compatible at higher VDD. |
| Operating Temperature | −55°C to +125°C - Qualified for extended industrial and automotive under-hood environments. |
| Propagation Delay (tPLH/tPHL) | 100 ns typical at VDD = 15 V - Sufficient for static or low-frequency multiplexed displays (≤1 kHz). |
| Latch Enable Function | Transparent latch on LE high - Captures BCD input only when LE transitions high-to-low; holds data otherwise. |
Pinout & Package
TSSOP-16 (PW) package: 4.4 mm × 5.0 mm body, 0.65 mm pitch, 1.2 mm max height, exposed pad not electrically connected, JEDEC MO-153 compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A) | BCD Input A (LSB) | Least-significant BCD bit; high = 1, low = 0; CMOS/TTL compatible. |
| 2 (B) | BCD Input B | Second BCD bit; latched on LE falling edge; no internal pull-up/down. |
| 3 (C) | BCD Input C | Third BCD bit; requires stable setup/hold timing relative to LE transition. |
| 4 (D) | BCD Input D (MSB) | Most-significant BCD bit; defines decimal value 0–9; invalid codes (10–15) yield blank output. |
| 5 (LE) | Latch Enable | Falling-edge triggered latch control; high = transparent, low = hold; asynchronous reset not provided. |
| 6 (BL) | Blank Input | Active-high; forces all segment outputs high (off) regardless of latch state or PH setting. |
| 7 (PH) | Phase Control | Selects output polarity: high = normal active-low segment drive; low = inverted (active-high) for AC-coupled displays. |
| 8 (VSS) | Ground | Reference return for logic and output stages; must be low-impedance connection. |
| 9 (a) | Segment a Output | Active-low driver for top horizontal segment; open-drain; requires external current-limiting resistor. |
| 10 (b) | Segment b Output | Active-low driver for upper-right vertical segment; same electrical characteristics as pin 9. |
| 11 (c) | Segment c Output | Active-low driver for lower-right vertical segment; sinks current to common-anode LED anode. |
| 12 (d) | Segment d Output | Active-low driver for bottom horizontal segment; rated for continuous 10 mA per segment. |
| 13 (e) | Segment e Output | Active-low driver for lower-left vertical segment; shares same VOL spec as other outputs. |
| 14 (f) | Segment f Output | Active-low driver for upper-left vertical segment; guaranteed VOH > VDD − 0.5 V when off. |
| 15 (g) | Segment g Output | Active-low driver for middle horizontal segment; used for digit "8" and "0"; no internal clamp diodes. |
| 16 (VDD) | Positive Supply | Power rail for logic and output stages; decoupling capacitor (0.1 µF) required near pin. |
Key Features
| Feature | Design Value |
|---|---|
| BCD-to-7-segment decoding with latch | Eliminates need for external storage; allows stable display update without flicker during BCD changes. |
| Phase-selectable output polarity | Supports both DC-driven common-anode LEDs and AC-coupled displays via PH pin control. |
| Wide supply voltage range (3–18 V) | Enables single-chip integration across mixed-voltage systems without regulators or level shifters. |
| High-voltage open-drain outputs | Sinks up to 10 mA per segment at 18 V, enabling direct drive of high-brightness LEDs without external drivers. |
| Full -55°C to +125°C operation | Validated for use in harsh environments including industrial controls, test equipment, and automotive instrument clusters. |
Applications
| Industrial Panel Meters | Legacy Test Equipment Displays |
|---|---|
|
Use Scenario: 4-digit LED display in analog-to-digital panel meters used for voltage, current, or temperature monitoring in factory automation cabinets. IC Role / Device Role / Timing Role: Latches BCD output from ADC or microcontroller and drives common-anode 7-segment digits with blanking synchronized to measurement cycle. Use Value: Eliminates discrete logic and latch ICs; reduces board space and component count while supporting wide input voltage ranges found in industrial power rails. |
Use Scenario: Front-panel numeric readout in benchtop multimeters and signal generators manufactured before 2000. IC Role / Device Role / Timing Role: Decodes microcontroller-generated BCD and provides blanking during auto-ranging transitions to prevent display ghosting. Use Value: Matches legacy TTL/CMOS logic families and withstands 12 V supply rails common in older test gear without voltage translation. |
| Multiplexed Instrument Clusters | Low-Power Battery Displays |
|
Use Scenario: 3-digit speedometer or tachometer display in automotive aftermarket gauges using time-multiplexed digit scanning. IC Role / Device Role / Timing Role: Drives one digit at a time in sequence; PH pin toggled to invert polarity for AC coupling, reducing LED electrode degradation. Use Value: Extends LED lifetime in continuously powered applications by enabling AC drive mode without external H-bridge circuitry. |
Use Scenario: Portable handheld instruments (e.g., pH meters, thermometers) powered by two AA cells (3 V nominal). IC Role / Device Role / Timing Role: Directly interfaces with low-voltage microcontrollers and drives low-current LEDs without boost converters or charge pumps. Use Value: Operates down to 3 V with full functionality, minimizing quiescent current and extending battery life beyond 100 hours. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar BCD-to-7-segment latch/decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD4543BM96 | SOIC-16 package (D), same electrical specs, obsolete status per TI documentation. | Requires larger PCB footprint and different reflow profile; no tape-and-reel availability in current production. | Select only if SOIC-16 layout is already committed and TSSOP rework is not feasible. |
| MC14495P | Functionally identical BCD-to-7-segment latch/decoder but with different pinout and no PH control; rated for −55°C to +125°C. | Lacks phase inversion for AC-coupled displays; requires redesign of segment wiring or external inverter logic. | Choose when PH functionality is unused and legacy MC14495-based designs require drop-in replacement with minimal layout change. |
Compared with CD4543BM96 and MC14495P, the CD4543BPW offers the smallest footprint (TSSOP-16), active production status with tape-and-reel packaging, and unique PH-controlled polarity inversion-making it optimal for new designs requiring compact size, long-term supply, and AC LED drive capability.
Availability
CD4543BPW is available at Aetrix Electronics and suitable for industrial panel meters, legacy test equipment displays, and multiplexed instrument clusters requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for CD4543BPW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic ICs, with decades of heritage in CMOS logic families including the CD4000B series.
The CD4543B product line was engineered for robust, high-voltage digital display interfacing in industrial, aerospace, and instrumentation systems where reliability across extreme temperatures and supply voltages is critical.
FAQ
What is the maximum segment output current rating for CD4543BPW?
The CD4543BPW is rated for continuous DC output current of 10 mA per segment at VDD = 15 V and TA = 25°C. Absolute maximum ratings specify 25 mA peak per output, but sustained operation above 10 mA requires thermal derating and proper PCB copper area. The CD4543BPW does not include internal current limiting, so external series resistors must be sized accordingly.
Does CD4543BPW support blanking during BCD input transitions?
Yes, the CD4543BPW uses an asynchronous active-high BL (blank) input that forces all seven segment outputs high (non-driving state) regardless of latch state, BCD input, or PH setting. This allows clean blanking during digit updates or auto-ranging events without affecting the internal latch register. The CD4543BPW maintains its last latched BCD value during blanking and resumes display immediately when BL returns low.
Can CD4543BPW drive common-cathode LED displays?
No, the CD4543BPW has active-low open-drain outputs designed exclusively for common-anode LED configurations. Driving common-cathode displays would require external P-channel MOSFETs or logic inverters per segment, which defeats the purpose of integrated decoding. For common-cathode applications, alternatives like the 74LS47 or MC14495 (with appropriate external logic) are more suitable than the CD4543BPW.
Is CD4543BPW pin-compatible with CD4543BPWR?
Yes, CD4543BPW and CD4543BPWR share identical TSSOP-16 (PW) package dimensions, pinout, and electrical specifications. The "R" suffix denotes tape-and-reel packaging (2000 pcs/reel), while CD4543BPW refers to the same die and package in non-reel form (obsolete status per TI). Both part numbers map to the same silicon and pin functions - the CD4543BPW is functionally and physically identical to CD4543BPWR except for packaging format and availability status.
What is the purpose of the PH pin on CD4543BPW?
The PH (phase) pin on CD4543BPW selects output polarity: when PH = high, segment outputs are active-low (standard common-anode drive); when PH = low, outputs invert to active-high, enabling AC-coupled LED operation. This eliminates the need for external H-bridge circuitry in applications where LED electrode longevity is critical, such as automotive instrument clusters running continuously. The CD4543BPW's PH function is unique among BCD decoders in the CD4000B family.
CD4543BPW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Display Type:
- LCD
- Configuration:
- 7 Segment
- Interface:
- BCD
- Digits or Characters:
- 1 Digit
- Current - Supply:
- 40 nA
- Voltage - Supply:
- 3V ~ 18V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
CD4543BPW FAQ
1.How can I place an order for CD4543BPW through Aetrix?
Please submit a Request for Quotation (RFQ) for CD4543BPW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD4543BPW reliable?
The price and inventory of CD4543BPW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD4543BPW is usually 5 days.
3.What payment methods are accepted for CD4543BPW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD4543BPW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD4543BPW?
CD4543BPW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD4543BPW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD4543BPW?
For technical support, including CD4543BPW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD4543BPW requirements.
6.How does Aetrix verify that CD4543BPW is sourced from the original manufacturer or authorized distributors?
All CD4543BPW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD4543BPW meets industry standards.
7.What is the process for return or replacement of CD4543BPW?
All CD4543BPW units undergo pre-shipment inspection (PSI). If there is an issue with CD4543BPW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD4543BPW part is unused and in its original packaging.
Return procedure for CD4543BPW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CD4543BPW Tags

-
PCA8561AHN/AY
NXP Semiconductors

-
SN74LS47N
Texas Instruments

-
PCF85176T/1Y
NXP Semiconductors

-
PCF85176H/1,518
NXP Semiconductors

-
BU9796AMUV-E2
Rohm Semiconductor

-
PCA85176H/Q900/1,5
NXP Semiconductors

-
PCF8537AH/1,518
NXP Semiconductors

-
LM3914VX/NOPB
Texas Instruments

-
PCF85134HL/1,118
NXP Semiconductors

-
AS1115-BSST
ams-OSRAM USA INC.

-
PCA8534AH/Q900/1,5
NXP Semiconductors

-
LM3914V/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
