Texas Instruments CD54HCT238F3A
- Part No.:
- CD54HCT238F3A
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-CDIP (0.300", 7.62mm)
- Datasheet:
-
CD54HCT238F3A.pdf
- Description:
- HIGH SPEED CMOS LOGIC 3-TO-8 LIN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CD54HCT238F3A from Texas Instruments is a high-speed CMOS 3-to-8 line decoder/demultiplexer with active-high outputs, designed for memory address decoding and data routing in harsh-environment systems. It operates from 4.5 V to 5.5 V, delivers 14 ns typical propagation delay at VCC = 4.5 V and CL = 50 pF, supports -55°C to +125°C operation, and features three enable inputs (G2, G1, G0) for cascading in industrial control and avionics bus architectures.
For engineers reviewing the CD54HCT238F3A datasheet, CD54HCT238F3A pinout, CD54HCT238F3A application, or CD54HCT238F3A equivalent, this page provides verified functional behavior, exact pin-level circuit roles, temperature-rated switching characteristics, and validated drop-in alternatives for military-grade logic design.
Technical Context
The CD54HCT238F3A implements a 3-input address decoder with three independent strobe enables (G2 = active-high, G1/G0 = active-low), where all eight Y0–Y7 outputs go low when any strobe is asserted - enabling precise demultiplexing control. Its HCT logic family ensures direct compatibility with LSTTL input thresholds (VIL ≤ 0.8 V, VIH ≥ 2.0 V) while delivering CMOS power efficiency.
Unlike the '138 variant, the '238 function asserts selected outputs high (all others low) when enabled - a critical distinction for active-high bus drivers and LED column drivers. Propagation delay symmetry (tPLH/tPHL) and balanced transition times ensure minimal skew across output banks in synchronous timing-critical paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | HCT - TTL-compatible inputs with CMOS power efficiency and noise immunity |
| Supply Voltage Range | 4.5 V to 5.5 V - matches standard 5 V LSTTL rails without level-shifting |
| Propagation Delay (tpd) | 14 ns typ. (VCC = 4.5 V, CL = 50 pF) - enables >35 MHz address decode in real-time control loops |
| Operating Temperature | -55°C to +125°C - qualified for extended-range military and aerospace applications |
| Output Drive | ±4 mA @ VCC = 4.5 V - sufficient to directly drive 10 LSTTL loads or small-signal MOSFET gates |
| Input Leakage Current | ±1 µA max. (TA = -55°C to +125°C) - ensures stable enable-state retention in low-power standby modes |
| Power Dissipation Cap. | 67 pF - used to calculate dynamic power consumption per gate under switching conditions |
Pinout & Package
CD54HCT238F3A uses a 16-pin Ceramic Dual In-line Package (CDIP-J) with 21.34 mm × 6.92 mm body size, hermetically sealed for high-reliability mil-spec deployment. Pin 1 is A0 (LSB address input); pin 16 is VCC; pin 8 is GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A0) | Address select input (LSB) | Binary weight 2⁰; must be terminated to VCC or GND if unused to prevent floating logic states |
| 2 (A1) | Address select input (middle bit) | Binary weight 2¹; part of 3-bit address bus interface for 8-channel selection |
| 3 (A2) | Address select input (MSB) | Binary weight 2²; determines which of eight outputs (Y0–Y7) is asserted high when enabled |
| 4 (G0) | Active-low output strobe | Disables all outputs (forces Y0–Y7 low) when logic high; tied low to enable decoding |
| 5 (G1) | Active-low output strobe | Second enable path; OR'd with G0 and G2 - any high disables outputs |
| 6 (G2) | Active-high output strobe | Enables decoding only when high; used as primary enable in cascaded configurations |
| 7 (Y7) | Output 7 (active-high) | Asserted high only when A2A1A0 = 111 and all strobes enabled; drives external load directly |
| 8 (GND) | Ground reference | Primary return path for all internal logic and output current; requires low-inductance connection |
| 9 (Y6) | Output 6 (active-high) | Asserted high only when A2A1A0 = 110; identical drive strength and timing to Y7 |
| 10 (Y5) | Output 5 (active-high) | Asserted high only when A2A1A0 = 101; shares same electrical specs as Y0–Y7 bank |
| 11 (Y4) | Output 4 (active-high) | Asserted high only when A2A1A0 = 100; no internal pull-up/pull-down; open-drain not supported |
| 12 (Y3) | Output 3 (active-high) | Asserted high only when A2A1A0 = 011; full rail-to-rail swing (0 V to VCC) |
| 13 (Y2) | Output 2 (active-high) | Asserted high only when A2A1A0 = 010; matched tPLH/tPHL ensures <1 ns inter-output skew |
| 14 (Y1) | Output 1 (active-high) | Asserted high only when A2A1A0 = 001; compatible with 5 V tolerant receivers |
| 15 (Y0) | Output 0 (active-high) | Asserted high only when A2A1A0 = 000; LSB output; used for default channel selection |
| 16 (VCC) | Positive supply | Must be bypassed with 0.1 µF ceramic capacitor placed within 5 mm of pin; supports 50 mA total ICC |
Key Features
| Feature | Design Value |
|---|---|
| Active-high decoded outputs | Y0–Y7 go high on selection (vs. '138's active-low), simplifying interface to NMOS loads and LED anodes |
| Three independent enable inputs | G2 (active-high), G1/G0 (active-low) allow flexible hierarchical enable trees without external logic |
| Wide temperature range support | Guaranteed operation from -55°C to +125°C - meets MIL-PRF-38535 Class B requirements |
| TTL-compatible input thresholds | VIL ≤ 0.8 V / VIH ≥ 2.0 V enables direct connection to legacy 5 V TTL buses without translators |
| Low dynamic power consumption | ICC ≤ 160 µA max. over full temp range - reduces thermal load in densely packed avionics modules |
Applications
| Memory Address Decoding | Avionics Bus Multiplexing |
|---|---|
|
Use Scenario: Selecting one of eight RAM/ROM chips in a fault-tolerant flight computer system. IC Role / Device Role / Timing Role: 3-bit address decoder mapping CPU address lines A0–A2 to chip-select signals for parallel memory banks. Use Value: Enables deterministic, low-skew chip selection across -55°C to +125°C with no external glue logic required. |
Use Scenario: Routing ARINC 429 status words to discrete monitoring channels in a cockpit display unit. IC Role / Device Role / Timing Role: Demultiplexer converting serial status stream into parallel 8-channel alert flags for dedicated indicator drivers. Use Value: Provides guaranteed 14 ns decode latency and ESD-hardened outputs suitable for safety-critical display subsystems. |
| Industrial PLC I/O Expansion | Radar Signal Path Selection |
|
Use Scenario: Enabling one of eight analog input conditioning circuits in a modular programmable logic controller. IC Role / Device Role / Timing Role: Output-enable controller selecting active ADC front-end channel based on configuration register bits. Use Value: Supports hot-swap I/O module insertion via G2-controlled enable sequencing and latch-up immunity. |
Use Scenario: Switching RF signal paths between eight antenna elements in a phased-array radar transceiver. IC Role / Device Role / Timing Role: High-reliability digital selector driving GaAs SPDT switch bias lines in transmit/receive mode control. Use Value: Delivers radiation-tolerant operation and sub-20 ns propagation stability under thermal cycling stress. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-to-8 decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD74HCT238E | Plastic DIP package (PDIP-N), RoHS-compliant, rated for -55°C to +125°C but not MIL-qualified | Suitable for commercial/industrial systems where hermetic sealing is not required | Select CD74HCT238E for cost-sensitive non-military designs needing identical logic function and timing |
| CD54HCT138F3A | Same CDIP-J package and temperature rating, but active-low outputs (Y0–Y7 low when selected) | Required where downstream logic expects inverted enable polarity (e.g., driving NAND-based latches) | Choose CD54HCT138F3A only when system architecture mandates active-low decoded outputs |
Compared with CD74HCT238E, CD54HCT238F3A offers hermetic reliability and MIL-PRF-38535 qualification; compared with CD54HCT138F3A, it provides active-high output polarity essential for direct LED/anode or NMOS gate drive without inverters.
Availability
CD54HCT238F3A is available at Aetrix Electronics and suitable for military avionics, industrial PLCs, and radar subsystems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for CD54HCT238F3A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions for high-reliability applications.
CD54HCT238F3A belongs to TI's military-grade HCT logic family, engineered for systems demanding guaranteed performance across extreme temperatures, radiation environments, and long-term field deployment.
FAQ
What is the key functional difference between CD54HCT238F3A and CD54HCT138F3A?
The CD54HCT238F3A provides active-high decoded outputs (Y0–Y7 go high when selected), while CD54HCT138F3A provides active-low outputs (Y0–Y7 go low when selected). This polarity difference dictates interface compatibility - CD54HCT238F3A directly drives NMOS loads or LED anodes, whereas CD54HCT138F3A suits NAND-based latch enable schemes. Both share identical pinout, timing, and temperature ratings.
Does CD54HCT238F3A require external pull-up resistors on its outputs?
No, CD54HCT238F3A features push-pull CMOS outputs capable of sourcing and sinking up to ±4 mA at VCC = 4.5 V. Pull-up resistors are unnecessary unless interfacing with open-drain receivers or implementing wired-OR logic - which is not supported by this device's output structure.
Can CD54HCT238F3A operate reliably at 4.2 V supply voltage?
No - CD54HCT238F3A is specified only for 4.5 V to 5.5 V operation per its Recommended Operating Conditions. At 4.2 V, input thresholds (VIH ≥ 2.0 V, VIL ≤ 0.8 V) may not be met, and propagation delay increases significantly beyond datasheet limits. Use CD54HC238F3A for 2 V–6 V operation if lower voltage is required.
How are the three enable inputs (G2, G1, G0) logically combined in CD54HCT238F3A?
The CD54HCT238F3A enables outputs only when G2 = high AND G1 = low AND G0 = low. Any deviation - G2 low, G1 high, or G0 high - forces all Y0–Y7 outputs low. This three-input AND-logic allows hierarchical enable trees: e.g., G2 driven by system master enable, G1/G0 by board-level sub-enable signals.
Is CD54HCT238F3A pin-compatible with CD74HCT238E?
Yes - CD54HCT238F3A (CDIP-J, 16-pin) and CD74HCT238E (PDIP-N, 16-pin) share identical pin numbering, signal assignments, and electrical behavior. However, CD54HCT238F3A is hermetically sealed and MIL-qualified, while CD74HCT238E is plastic-packaged and commercial-grade. PCB footprint differs due to package dimensions.
CD54HCT238F3A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 54HCT
- Package/Case:
- 16-CDIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 4mA, 4mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-CDIP
CD54HCT238F3A FAQ
1.How can I place an order for CD54HCT238F3A through Aetrix?
Please submit a Request for Quotation (RFQ) for CD54HCT238F3A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD54HCT238F3A reliable?
The price and inventory of CD54HCT238F3A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD54HCT238F3A is usually 5 days.
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CD54HCT238F3A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD54HCT238F3A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD54HCT238F3A?
For technical support, including CD54HCT238F3A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD54HCT238F3A requirements.
6.How does Aetrix verify that CD54HCT238F3A is sourced from the original manufacturer or authorized distributors?
All CD54HCT238F3A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD54HCT238F3A meets industry standards.
7.What is the process for return or replacement of CD54HCT238F3A?
All CD54HCT238F3A units undergo pre-shipment inspection (PSI). If there is an issue with CD54HCT238F3A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD54HCT238F3A part is unused and in its original packaging.
Return procedure for CD54HCT238F3A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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