Texas Instruments CD74AC238M96E4
- Part No.:
- CD74AC238M96E4
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD74AC238M96E4.pdf
- Description:
- IC DECODER/DEMUX 1X3:8 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,160
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Product details
Overview
CD74AC238M96E4 from Texas Instruments is a 3-line to 8-line decoder/demultiplexer in 16-pin SOIC (D) package, operating from 1.5 V to 5.5 V with ±24 mA output drive, balanced propagation delays, and SCR-latchup-resistant CMOS process. It serves as a high-speed memory decoder or data-routing IC in industrial control logic and address decoding for SRAM/ROM systems.
For engineers reviewing the CD74AC238M96E4 datasheet, CD74AC238M96E4 pinout, CD74AC238M96E4 application, or CD74AC238M96E4 equivalent, key selection criteria include its triple enable architecture (G1, G2A, G2B), 3.8–15 ns propagation delay at 5 V, -55°C to 125°C operating range, and compatibility with cascaded 24-/32-bit decoding schemes without external inverters.
Technical Context
The CD74AC238M96E4 implements active-high and active-low enable inputs (G1, G2A, G2B) to support flexible cascading and demultiplexing modes. Its function table defines eight mutually exclusive active-low outputs (Y0–Y7) selected by binary inputs A, B, C under valid enable conditions.
Propagation delays are balanced across input-to-output paths: tPLH/tPHL from select inputs (A/B/C) to any Y is 3.8–15 ns at VCC = 5 V; from strobe inputs (G1, G2A, G2B) it ranges from 3.0–16.6 ns. Output drive capability supports fanout to 15 F-type devices with ±24 mA current at 4.5–5.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 1.5 V to 5.5 V - enables interoperability with 1.8 V, 3.3 V, and 5 V logic families without level shifters |
| Propagation Delay (VCC = 5 V) | 3.8–15 ns - ensures sub-15 ns system-level address decode timing for high-speed memory interfaces |
| Output Drive Current | ±24 mA - provides sufficient sink/source strength to directly drive multiple TTL or CMOS loads |
| Operating Temperature | -55°C to 125°C - supports deployment in extended-temperature industrial and automotive control modules |
| ESD Protection | ±2000 V HBM - exceeds MIL-STD-883 requirement, reducing susceptibility to handling-induced failures |
| Input Noise Immunity | 30% of VCC - maintains reliable logic thresholds across supply voltage variations and noise margins |
| Power Dissipation Cap. | 110 pF - quantifies dynamic power consumption during switching, critical for thermal design in dense logic arrays |
Pinout & Package
CD74AC238M96E4 uses a 16-pin SOIC (D) package measuring 9.9 mm × 6 mm with body size 9.9 mm × 3.9 mm. Thermal performance is characterized by RθJA = 106.6°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A, B, C | Binary Select Inputs | 3-bit address lines determining which of eight outputs (Y0–Y7) is asserted low |
| G1 | Active-High Enable Input | Primary enable; device enabled only when G1 = HIGH and both G2A/G2B = LOW |
| G2A, G2B | Active-Low Strobe Inputs | Secondary enables; used for cascading or as data inputs in demux mode |
| Y0–Y7 | Active-Low Outputs | Eight decoded outputs; only one low per valid input combination, all others high-impedance or HIGH |
| VCC | Positive Supply | Single rail powering internal logic and output drivers; requires local 0.1 µF bypass capacitor |
| GND | Ground Reference | Common return path for supply and signal currents; must be low-impedance connection |
Key Features
| Feature | Design Value |
|---|---|
| Triple Enable Architecture | Enables hierarchical decoding (e.g., 24-bit with no external inverters) and simplifies data routing in multiplexed bus systems |
| Balanced Propagation Delays | Minimizes skew between output activation times, critical for synchronous memory access and timing-critical state machines |
| SCR-Latchup Resistant Process | Prevents destructive latch-up under transient overvoltage or ESD events, enhancing reliability in noisy industrial environments |
| Wide-Voltage Operation | Supports mixed-voltage system integration (1.5 V to 5.5 V) while maintaining consistent noise immunity and timing specs |
| High Fanout Capability | Drives up to 15 F-series logic devices directly, reducing need for buffer stages in large-scale decoder trees |
Applications
| Memory Address Decoding | Industrial PLC I/O Expansion |
|---|---|
Use Scenario: Decoding 3-bit address bus to select one of eight memory chips (e.g., SRAM banks) in a microcontroller-based data logger. IC Role / Device Role / Timing Role: High-speed address decoder minimizing system access latency; operates synchronously with CPU clock domain. Use Value: Sub-15 ns propagation delay at 5 V ensures memory enable signals align precisely with address setup/hold windows, eliminating wait states. | Use Scenario: Expanding digital input/output capacity in programmable logic controller backplanes using modular I/O cards. IC Role / Device Role / Timing Role: Cascadable decoder enabling 24-bit or 32-bit I/O addressing via G1/G2A/G2B enables without external logic. Use Value: Triple enable inputs allow hierarchical selection of I/O modules, reducing PCB real estate and interconnect complexity. |
| Data Demultiplexing | Test Equipment Signal Routing |
Use Scenario: Distributing a single serial data stream to eight parallel test channels in automated circuit board testers. IC Role / Device Role / Timing Role: Demultiplexer where G2A/G2B serve as data inputs and A/B/C as channel selectors. Use Value: Active-low outputs interface directly with TTL-compatible test fixtures; ±24 mA drive ensures signal integrity over 10 cm traces. | Use Scenario: Routing calibration signals or stimulus waveforms to eight independent measurement channels in benchtop analyzers. IC Role / Device Role / Timing Role: Precision timing decoder ensuring simultaneous activation of calibrated reference paths with matched delay paths. Use Value: Balanced tPLH/tPHL guarantees <1 ns skew between routed outputs, preserving phase coherence in multi-channel measurements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-to-8 decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74AC138N | Same pinout, identical function, but rated only for -40°C to 85°C; lower ESD rating (±1500 V HBM) | Suitable for commercial-grade embedded controllers, not extended-temperature industrial use | Select when cost sensitivity outweighs extended temperature or ESD robustness requirements |
| CD74HC238E | Higher propagation delay (21–42 ns at 5 V); lower drive (±4 mA); same -55°C to 125°C range | Acceptable for low-speed address decoding where timing margin >40 ns exists | Choose for legacy HC-family designs requiring pin compatibility but tolerating slower speed and reduced fanout |
Compared with SN74AC138N and CD74HC238E, CD74AC238M96E4 delivers superior timing performance (3.8 ns min), higher output drive (±24 mA vs. ±4 mA), and extended temperature/ESD robustness-making it optimal for high-reliability, high-speed industrial decoding where signal integrity and thermal resilience are critical.
Availability
CD74AC238M96E4 is available at Aetrix Electronics and suitable for industrial control systems, memory subsystems, and automated test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for CD74AC238M96E4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in precision analog, power management, and high-reliability logic solutions.
The CD74AC238M96E4 belongs to TI's AC-series advanced CMOS logic family, designed specifically for high-speed memory decoding and data-routing applications demanding low propagation delay, wide supply voltage operation, and robust latch-up immunity.
FAQ
What is the maximum operating temperature range for CD74AC238M96E4?
The CD74AC238M96E4 is rated for operation from -55°C to 125°C, making it suitable for harsh industrial environments such as motor drives, power supplies, and outdoor automation equipment. This extended temperature range is confirmed in Section 4.3 of the TI datasheet SCHS331B and applies specifically to the SOIC (D) package variant including CD74AC238M96E4.
Does CD74AC238M96E4 support 1.8 V logic systems?
Yes, CD74AC238M96E4 supports 1.8 V operation within its 1.5 V to 5.5 V supply range. At VCC = 1.8 V, input thresholds scale proportionally (VIH ≈ 1.44 V, VIL ≈ 0.36 V), and propagation delay increases to 170–189 ns per Section 4.6. The device maintains full functionality and noise immunity at 30% of VCC, ensuring reliable interfacing with 1.8 V microcontrollers and FPGAs.
How many enable inputs does CD74AC238M96E4 have, and what are their logic polarities?
CD74AC238M96E4 has three enable inputs: G1 (active-high), G2A (active-low), and G2B (active-low). All three must be simultaneously asserted (G1 = HIGH, G2A = LOW, G2B = LOW) for the decoder to operate. This configuration allows flexible cascading-for example, using G2A/G2B as chip-select lines in multi-device memory maps-without external inversion logic.
Can CD74AC238M96E4 be used as a demultiplexer, and how is that configured?
Yes, CD74AC238M96E4 can function as a 1-to-8 demultiplexer. Configure G2A and G2B as complementary data inputs (e.g., G2A = DATA, G2B = /DATA), and use A/B/C as channel select lines. When G1 is held HIGH and G2A/G2B are driven differentially, only the selected Yx output follows the data state while others remain HIGH. This mode is explicitly supported in Section 6.1 and Figure 7-1 of the datasheet.
What is the recommended bypass capacitor for CD74AC238M96E4?
Texas Instruments recommends a 0.1 µF ceramic bypass capacitor placed as close as possible to the VCC pin of CD74AC238M96E4, with low-inductance connection to GND. For improved high-frequency noise suppression, a parallel 1 µF capacitor may be added. This guidance is specified in Section 7.1 of the CD74AC238 datasheet and applies directly to the SOIC-packaged CD74AC238M96E4.
CD74AC238M96E4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74AC
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 24mA, 24mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 1.5V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
CD74AC238M96E4 FAQ
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6.How does Aetrix verify that CD74AC238M96E4 is sourced from the original manufacturer or authorized distributors?
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7.What is the process for return or replacement of CD74AC238M96E4?
All CD74AC238M96E4 units undergo pre-shipment inspection (PSI). If there is an issue with CD74AC238M96E4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74AC238M96E4 part is unused and in its original packaging.
Return procedure for CD74AC238M96E4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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