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Texas Instruments CD74ACT112M
- Part No.:
- CD74ACT112M
- Manufacturer:
- Texas Instruments
- Category:
- Flip Flops
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD74ACT112M.pdf
- Description:
- IC FF JK TYPE DUAL 1BIT 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,925
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Product details
Overview
CD74ACT112M from Texas Instruments is a dual J-K negative-edge-triggered flip-flop with independent preset and clear inputs, operating at 4.5–5.5 V supply, delivering ±24-mA output drive, 114-MHz max clock frequency, and balanced 2.6–10.3 ns propagation delays. It serves as a synchronous logic building block in digital control, state machines, and clock-domain interfacing circuits.
For engineers reviewing the CD74ACT112M datasheet, CD74ACT112M pinout, CD74ACT112M application, or CD74ACT112M equivalent, this page provides verified functional identity, SOIC-16 package mapping, timing-critical parameters (tsu = 3.5 ns, th = 1 ns), ESD robustness (2-kV), and TTL-compatible input thresholds - all essential for high-reliability industrial and aerospace logic design.
Technical Context
The CD74ACT112M implements two fully independent J-K flip-flops sharing no internal coupling; each responds solely to its dedicated CLK, J, K, PRE, and CLR signals. Clock triggering occurs on the negative edge at a defined voltage threshold-not dependent on fall time-enabling stable operation across varying slew rates.
Its SCR-latchup-resistant CMOS process supports operation from –55°C to +125°C, while TTL-voltage-compatible inputs (VIH = 2 V, VIL = 0.8 V) allow direct interfacing with legacy bipolar logic without level-shifting. Output drive capability (±24 mA) ensures fanout to 15 F-series devices under worst-case temperature and voltage conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 4.5 V to 5.5 V - compatible with standard 5-V logic rails and tolerant of ±10% regulation variation |
| Max Clock Frequency | 114 MHz at –40°C to +85°C - enables high-speed synchronous control in real-time sequencers |
| Propagation Delay | 2.6–10.3 ns (tPLH/tPHL) - tightly balanced rise/fall delays minimize skew in dual-output applications |
| Setup/Hold Time | tsu = 3.5 ns, th = 1 ns - defines minimum data stability window before/after CLK↓ for reliable state capture |
| Output Drive | ±24 mA - sufficient to directly drive transmission lines (50 Ω/75 Ω) and multiple downstream logic loads |
| ESD Protection | ≥2 kV per MIL-STD-883 Method 3015 - ensures handling robustness in non-EPA assembly environments |
| Input Compatibility | TTL-voltage thresholds (VIH = 2 V, VIL = 0.8 V) - eliminates need for external level translators when interfacing with 74LS/74F families |
Pinout & Package
CD74ACT112M is housed in a 16-pin SOIC (Small Outline Integrated Circuit) package, designated "M" by Texas Instruments, with 1.27-mm pitch, JEDEC MS-012AC compliant footprint, and RoHS-compliant NiPdAu lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4, 5, 6, 7, 10, 11, 12, 13, 14, 15, 16 | Functional I/O (CLK, J, K, PRE, CLR, Q, Q) | Two complete J-K flip-flop channels with complementary outputs; pins assigned per TI M-package top-view diagram |
| 8 | GND | Power return reference for both flip-flops; must be low-impedance connection to minimize ground bounce |
| 16 | VCC | Positive supply rail; decoupling capacitor (0.1 µF ceramic) required within 5 mm of this pin |
Key Features
| Feature | Design Value |
|---|---|
| Negative-edge clock triggering | Enables precise synchronization to falling edges of system clocks, avoiding metastability risks from asynchronous rising-edge sampling |
| Asynchronous preset/clear | Allows immediate state initialization or reset independent of clock timing - critical for power-up sequencing and fault recovery |
| SCR-latchup immunity | Guarantees no destructive latchup under transient overvoltage or ESD events, meeting MIL-PRF-38535 reliability requirements |
| Balanced tPLH/tPHL | Minimizes duty-cycle distortion in toggle-mode operation, preserving 50% output duty cycle across temperature and voltage extremes |
| Unit-load input characterization | J/CLK inputs draw 1 unit load (2.4 mA), while K/PRE/CLR draw ≤0.58 units - simplifies fanout calculation and bus loading analysis |
Applications
| Industrial PLC Sequencers | Aerospace Avionics Control |
|---|---|
Use Scenario: Synchronizing multi-stage actuator sequences in programmable logic controllers under wide-temperature operation. IC Role / Device Role / Timing Role: Dual J-K flip-flop providing deterministic state transitions synchronized to a 50-MHz system clock with guaranteed setup/hold margins. Use Value: ±24-mA drive sustains signal integrity across long PCB traces in noisy factory environments; –55°C to +125°C rating ensures reliability in uncontrolled enclosures. | Use Scenario: Implementing fault-tolerant mode selection logic in flight control computers where deterministic reset behavior is mandatory. IC Role / Device Role / Timing Role: Asynchronous PRE/CLR inputs enable immediate safe-state assertion during watchdog timeout or sensor failure detection. Use Value: 2-kV ESD protection and SCR-latchup immunity meet DO-254/DO-160 environmental robustness requirements without additional protection circuitry. |
| Digital Test Equipment Counters | Legacy System Logic Interface |
Use Scenario: Building high-speed 4-bit binary counters in automated test equipment requiring >100-MHz counting capability. IC Role / Device Role / Timing Role: Toggle-mode configuration (J=K=HIGH) delivers clean, low-skew clock division with minimal added jitter. Use Value: 114-MHz fmax and 2.6-ns min tPLH support sub-10-ns period counting; balanced delays prevent duty-cycle degradation across stages. | Use Scenario: Interfacing modern microcontrollers with legacy 74LS-based peripheral boards in industrial retrofits. IC Role / Device Role / Timing Role: Level-shifter-free bridging via TTL-compatible input thresholds and 5-V CMOS output swing. Use Value: VIH = 2 V / VIL = 0.8 V eliminates need for external translators; ±24-mA drive overdrives LS inputs while maintaining noise margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual J-K flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74ACT112DR | Same ACT family, identical logic function and pinout; rated for 0°C to +70°C commercial temp range only | Limited to benign-environment applications; lacks extended –55°C to +125°C qualification | Select when cost sensitivity outweighs extended temperature needs and board space allows rework for temp-grade compliance |
| CD74HC112M | High-speed CMOS variant: lower drive (±7.8 mA), slower max frequency (60 MHz), no TTL input compatibility | Requires level-shifting for 74LS interface; unsuitable for high-fanout or high-speed (>60 MHz) use cases | Choose only if supply voltage flexibility (2–6 V) and ultra-low ICC (4 µA) are prioritized over speed and drive strength |
Compared with SN74ACT112DR and CD74HC112M, the CD74ACT112M uniquely combines military-grade temperature range, full TTL compatibility, and 114-MHz performance - making it the sole option for high-reliability, mixed-technology digital systems requiring guaranteed operation across extreme thermal and electrical conditions.
Availability
CD74ACT112M is available at Aetrix Electronics and suitable for industrial PLC sequencers, aerospace avionics control, and digital test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for CD74ACT112M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of heritage in high-reliability logic families.
The CD74ACT112M belongs to TI's Advanced CMOS Technology (ACT) logic series, engineered for military and industrial applications demanding TTL compatibility, high speed, low power, and extended temperature operation.
FAQ
What is the maximum operating temperature range for the CD74ACT112M?
The CD74ACT112M is specified for continuous operation from –55°C to +125°C, validated per MIL-PRF-38535 requirements. This extended range is confirmed in the ordering information table and absolute maximum ratings section of the SCHS323 datasheet, making CD74ACT112M suitable for under-hood automotive, downhole, and aerospace applications where ambient temperatures exceed commercial-grade limits.
Does the CD74ACT112M support true TTL-level input compatibility?
Yes, the CD74ACT112M features TTL-voltage-compatible inputs with VIH = 2.0 V (min) and VIL = 0.8 V (max) across its full temperature range. This allows direct connection to 74LS, 74F, and other bipolar logic families without level-shifting components - a key specification explicitly stated in the "Features" section of the SCHS323 datasheet.
Can the CD74ACT112M be used in toggle mode, and what design considerations apply?
Yes, the CD74ACT112M supports toggle mode by tying both J and K inputs HIGH. In this configuration, the Q output toggles on each negative clock edge. Designers must ensure tsu ≥ 3.5 ns and th ≥ 1 ns for stable operation, and verify that output loading does not exceed ±24 mA per pin - values confirmed in the switching characteristics and recommended operating conditions tables of the CD74ACT112M datasheet.
Is the CD74ACT112M pin-compatible with the CD74HC112M?
No, the CD74ACT112M and CD74HC112M are not pin-compatible. While both are dual J-K flip-flops in SOIC-16 packages, their pin assignments differ: CD74ACT112M follows the M-package layout (e.g., Pin 1 = 1CLK), whereas CD74HC112M uses a different pinout (e.g., Pin 1 = 1Q). This difference is documented in their respective TI datasheets (SCHS323 vs. SCRS079) and confirmed by TI's package drawings.
What packaging and reel specifications apply to the CD74ACT112M96.A variant?
The CD74ACT112M96.A is supplied in tape-and-reel format: 2500 units per reel, 16.4-mm reel width, 330-mm reel diameter, Q1 quadrant pin-1 orientation, and Level-1 moisture sensitivity rating (260°C peak reflow). These details are specified in TI's Package Option Addendum dated 15-Jul-2026 and match the CD74ACT112M96 ordering variant referenced in the original data sheet.
CD74ACT112M Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74ACT
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Function:
- Set(Preset) and Reset
- Type:
- JK Type
- Output Type:
- Complementary
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 100 MHz
- Max Propagation Delay @ V, Max CL:
- 10.3ns @ 5V, 50pF
- Trigger Type:
- Negative Edge
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 4.5V ~ 5.5V
- Current - Quiescent (Iq):
- 4 µA
- Input Capacitance:
- 10 pF
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
CD74ACT112M FAQ
1.How can I place an order for CD74ACT112M through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74ACT112M on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74ACT112M reliable?
The price and inventory of CD74ACT112M are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74ACT112M is usually 5 days.
3.What payment methods are accepted for CD74ACT112M?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD74ACT112M transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD74ACT112M?
CD74ACT112M orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD74ACT112M order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74ACT112M?
For technical support, including CD74ACT112M datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74ACT112M requirements.
6.How does Aetrix verify that CD74ACT112M is sourced from the original manufacturer or authorized distributors?
All CD74ACT112M products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74ACT112M meets industry standards.
7.What is the process for return or replacement of CD74ACT112M?
All CD74ACT112M units undergo pre-shipment inspection (PSI). If there is an issue with CD74ACT112M, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74ACT112M part is unused and in its original packaging.
Return procedure for CD74ACT112M:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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