Texas Instruments CD74ACT112M96
- Part No.:
- CD74ACT112M96
- Manufacturer:
- Texas Instruments
- Category:
- Flip Flops
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD74ACT112M96.pdf
- Description:
- IC FF JK TYPE DUAL 1BIT 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CD74ACT112M96 from Texas Instruments is a dual J-K negative-edge-triggered flip-flop with independent preset and clear inputs, operating at 4.5–5.5 V supply, delivering ±24-mA output drive, 114-MHz max clock frequency, and balanced propagation delays (2.6–10.3 ns). It serves as a synchronous logic building block in high-speed digital control, state machines, and counter circuits.
For engineers reviewing the CD74ACT112M96 datasheet, CD74ACT112M96 pinout, CD74ACT112M96 application, or CD74ACT112M96 equivalent, key selection considerations include TTL-compatible input thresholds, SCR-latchup-resistant CMOS process, MIL-STD-883-compliant 2-kV ESD protection, and SOIC-16 packaging for industrial-grade reliability across –55°C to 125°C.
Technical Context
The CD74ACT112M96 implements two independent edge-triggered J-K flip-flops sharing no internal coupling-each features asynchronous active-low PRE and CLR, with data transfer on the falling edge of CLK. Its logic diagram confirms positive-logic interpretation of inputs and complementary Q/Q outputs.
Timing behavior is defined by strict setup (3.5 ns min) and hold (1 ns) requirements relative to CLK↓, plus recovery time (2.2 ns) after PRE/CLR deassertion. Propagation delays (tPLH/tPHL) are symmetric between rising and falling output transitions, supporting deterministic timing in synchronous systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 4.5 V to 5.5 V - Ensures compatibility with standard 5-V TTL and mixed-voltage logic systems. |
| Max Clock Frequency | 114 MHz at –40°C to 85°C - Supports high-speed state sequencing without external clock division. |
| Output Drive | ±24 mA - Directly drives 15 F-series TTL loads or terminates 50-Ω transmission lines at 85°C. |
| Propagation Delay | 2.6–9.4 ns (tPLH/tPHL) - Enables sub-10-ns critical path timing in pipeline and control logic. |
| ESD Protection | ≥2 kV per MIL-STD-883 Method 3015 - Provides robust handling integrity in manual assembly and field-replaceable modules. |
| Operating Temperature | –55°C to 125°C - Qualified for aerospace, defense, and under-hood automotive applications. |
| Input Compatibility | TTL-voltage level - Accepts standard 0.8 V / 2.0 V VIH/VIL thresholds without level-shifting circuitry. |
Pinout & Package
CD74ACT112M96 is housed in a 16-pin SOIC (D) package with 1.27-mm pitch, JEDEC MS-012AC compliant, moisture sensitivity level 1 (260°C peak reflow), and RoHS-compliant NiPdAu lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1CLK, 2CLK | Clock input (negative-edge-triggered) | Accepts clean falling-edge transitions; triggering voltage threshold independent of edge slew rate. |
| 1J, 1K, 2J, 2K | Data inputs | Control toggle/set/reset behavior per flip-flop; require stable setup/hold timing before CLK↓. |
| 1PRE, 2PRE | Asynchronous preset (active-low) | Forces Q = H regardless of CLK or J/K state; must be held high during normal operation. |
| 1CLR, 2CLR | Asynchronous clear (active-low) | Forces Q = L regardless of CLK or J/K state; used for power-on reset or fault recovery. |
| 1Q, 1Q̅, 2Q, 2Q̅ | Complementary outputs | Provide true/inverted latched states; support fanout to 15 F devices or direct bus interfacing. |
| VCC, GND | Power supply terminals | Decoupling required within 1 cm of pins; total supply current ≤ 40 µA static, ≤2.8 mA dynamic. |
Key Features
| Feature | Design Value |
|---|---|
| Balanced tPLH/tPHL | Minimizes duty-cycle distortion in clock-divided or toggle-mode operation (e.g., divide-by-2 counters). |
| SCR-latchup resistance | Prevents destructive latchup under transient overvoltage or ESD events in harsh environments. |
| TTL-input compatibility | Eliminates need for external level shifters when interfacing with legacy 74LS/74F logic families. |
| Low dynamic power | Typical Cpd = 56 pF enables lower switching power vs. bipolar equivalents while retaining speed. |
| Preset/clear priority logic | Guarantees defined output state even during metastable CLK/J/K conditions-critical for fail-safe control. |
Applications
| Industrial PLC Control Logic | Aerospace Sequencing Modules |
|---|---|
|
Use Scenario: Synchronizing sensor sampling and actuator enable signals in real-time motion control loops. IC Role / Device Role / Timing Role: Dual flip-flop provides isolated clock-domain crossing and deterministic state capture on system clock edges. Use Value: 114-MHz capability supports microsecond-level loop timing; –55°C to 125°C rating ensures reliability in motor drive enclosures. |
Use Scenario: Implementing fault-tolerant mode selection and watchdog timeout latching in flight control computers. IC Role / Device Role / Timing Role: Asynchronous PRE/CLR inputs enable hard-reset of safety-critical states independent of main clock domain. Use Value: MIL-STD-883 qualified 2-kV ESD and SCR-latchup immunity meet DO-254 design assurance requirements. |
| Digital Test Equipment Counters | Secure Communication Protocol State Machines |
|
Use Scenario: Building scalable N-bit binary counters using cascaded J-K toggle configuration. IC Role / Device Role / Timing Role: Each CD74ACT112M96 provides two toggle-capable stages; J=K=H configures automatic inversion on CLK↓. Use Value: Balanced propagation delay ensures minimal skew across bit positions, preserving counter accuracy at >100 MHz. |
Use Scenario: Enforcing cryptographic handshake sequence validity in hardware-accelerated secure boot controllers. IC Role / Device Role / Timing Role: Stores protocol state bits (e.g., "challenge sent", "response verified") with glitch-immune edge-triggered update. Use Value: TTL-compatible inputs interface directly with microcontroller GPIO; ±24-mA drive supports noise-immune signaling over PCB traces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual J-K flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74ACT112DR | Same logic function, identical SOIC-16 package, but rated only for –40°C to 85°C industrial range. | Lacks extended temperature qualification; unsuitable for military/aerospace deployments requiring –55°C operation. | Select when cost-sensitive industrial designs do not require full military-grade thermal range. |
| CD74HC112M96 | Pin-compatible HC-series variant with lower drive (±7.8 mA), slower max frequency (60 MHz), and higher input capacitance (10 pF). | Higher noise margin but insufficient for driving 50-Ω lines or interfacing with fast TTL loads. | Choose for ultra-low-power battery-operated systems where speed and drive strength are secondary. |
Compared with SN74ACT112DR and CD74HC112M96, the CD74ACT112M96 uniquely delivers military-grade temperature range, 114-MHz performance, and ±24-mA drive in a single SOIC-16 device-making it the only option meeting simultaneous high-speed, high-reliability, and wide-temperature requirements.
Availability
CD74ACT112M96 is available at Aetrix Electronics and suitable for industrial automation, aerospace avionics, and high-reliability test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for CD74ACT112M96 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of heritage in high-reliability logic families.
The CD74ACT112M96 belongs to TI's Advanced CMOS Technology (ACT) logic series-designed specifically for applications demanding TTL compatibility, high speed, low power, and ruggedized operation in mission-critical systems.
FAQ
What is the maximum clock frequency supported by CD74ACT112M96?
The CD74ACT112M96 supports a maximum clock frequency of 114 MHz over the –40°C to 85°C ambient temperature range, and 100 MHz over the full –55°C to 125°C operating range. This specification is validated under VCC = 5 V ± 0.5 V and CL = 50 pF load conditions, as confirmed in the official TI datasheet SCHS323.
Does CD74ACT112M96 require external pull-up resistors on PRE and CLR inputs?
No-CD74ACT112M96 does not require external pull-ups on PRE or CLR. These inputs are active-low and internally compatible with TTL logic levels; however, TI explicitly requires all unused inputs to be tied to VCC or GND to prevent floating states that could cause erratic operation or increased ICC.
Is CD74ACT112M96 pin-compatible with CD74HC112M96?
Yes-CD74ACT112M96 and CD74HC112M96 share identical SOIC-16 pinouts and terminal assignments (including CLK, J, K, PRE, CLR, Q, Q̅, VCC, GND). However, they differ electrically: ACT offers higher drive, faster speed, and TTL-compatible inputs, while HC uses CMOS thresholds and lower power.
What is the meaning of "SCR-latchup-resistant" for CD74ACT112M96?
"SCR-latchup-resistant" means the CD74ACT112M96 employs specialized CMOS process and layout techniques to suppress silicon-controlled rectifier (SCR) parasitic structures. This prevents destructive latchup events caused by transient overvoltage, ESD, or supply sequencing faults-ensuring operational integrity in harsh electrical environments.
Can CD74ACT112M96 operate reliably at 3.3 V supply?
No-CD74ACT112M96 is specified only for 4.5 V to 5.5 V operation. Its TTL-compatible input thresholds (VIH = 2.0 V min, VIL = 0.8 V max) and internal gate design require ≥4.5 V for guaranteed logic-level recognition and output drive compliance. Operation below 4.5 V violates recommended conditions and risks functional failure.
CD74ACT112M96 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74ACT
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Set(Preset) and Reset
- Type:
- JK Type
- Output Type:
- Complementary
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 100 MHz
- Max Propagation Delay @ V, Max CL:
- 10.3ns @ 5V, 50pF
- Trigger Type:
- Negative Edge
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 4.5V ~ 5.5V
- Current - Quiescent (Iq):
- 4 µA
- Input Capacitance:
- 10 pF
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
CD74ACT112M96 FAQ
1.How can I place an order for CD74ACT112M96 through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74ACT112M96 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74ACT112M96 reliable?
The price and inventory of CD74ACT112M96 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74ACT112M96 is usually 5 days.
3.What payment methods are accepted for CD74ACT112M96?
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4.How is shipping managed for CD74ACT112M96?
CD74ACT112M96 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD74ACT112M96 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74ACT112M96?
For technical support, including CD74ACT112M96 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74ACT112M96 requirements.
6.How does Aetrix verify that CD74ACT112M96 is sourced from the original manufacturer or authorized distributors?
All CD74ACT112M96 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74ACT112M96 meets industry standards.
7.What is the process for return or replacement of CD74ACT112M96?
All CD74ACT112M96 units undergo pre-shipment inspection (PSI). If there is an issue with CD74ACT112M96, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74ACT112M96 part is unused and in its original packaging.
Return procedure for CD74ACT112M96:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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