Texas Instruments CD74ACT157E
- Part No.:
- CD74ACT157E
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
CD74ACT157E.pdf
- Description:
- IC MULTIPLEXER 4 X 2:1 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:994
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Product details
Overview
CD74ACT157E from Texas Instruments is a quadruple 2-line to 1-line data selector/multiplexer in PDIP-16 package, operating at 4.5V–5.5V VCC, with ±24mA output drive, balanced propagation delays (tPLH/tPHL ≤ 9.5ns), and TTL-voltage-compatible inputs. It enables synchronous 4-bit bus selection in digital control logic, data routing, and address decoding circuits.
For engineers reviewing the CD74ACT157E datasheet, CD74ACT157E pinout, CD74ACT157E application, or CD74ACT157E equivalent, key selection criteria include its 16-pin DIP footprint, active-low strobe (G) for global output disable, CMOS push-pull outputs with 2kV HBM ESD rating, and guaranteed operation across –55°C to 125°C industrial temperature range.
Technical Context
The CD74ACT157E implements four independent 2:1 multiplexers sharing a common address select (A/B) and active-low strobe (G) input. Each Y output reflects the selected A or B input when G is high; all outputs force low when G is low - enabling synchronized channel enable/disable without external gating logic.
Its TTL-compatible CMOS inputs accept VIH ≥ 2.0V and VIL ≤ 0.8V under 4.5V–5.5V supply, while push-pull outputs deliver VOH ≥ 3.7V at IOH = –24mA and VOL ≤ 0.5V at IOL = 24mA, supporting fanout to 15 F-series devices. Propagation delay matching between channels ensures deterministic timing in parallel data paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 4.5V to 5.5V - ensures compatibility with standard 5V TTL/CMOS systems and stable logic thresholds |
| Output Drive | ±24mA - supports direct interfacing to multiple TTL loads or moderate capacitive loads without buffers |
| Propagation Delay | tPLH/tPHL ≤ 9.5ns (–55°C to 125°C) - guarantees sub-10ns switching for high-speed bus arbitration |
| Input Compatibility | TTL-voltage compatible - accepts standard TTL output levels (2.0V/0.8V thresholds) without level-shifting |
| ESD Rating | ±2000V HBM - exceeds MIL-STD-883 requirement, enabling robust handling in manual assembly environments |
| Operating Temp | –55°C to 125°C - qualified for extended industrial, automotive under-hood, and military-grade applications |
| Quiescent Current | ICC ≤ 160μA (max) - enables low-static-power operation in battery-backed or always-on logic subsystems |
Pinout & Package
Packaged in 16-pin plastic dual in-line package (PDIP-N), body size 19.31mm × 6.35mm, with through-hole mounting and industry-standard 0.3" width.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A, 3A, 4A | Data Input A (Channel 1–4) | Four independent high-side data inputs; each paired with corresponding 1B–4B for 2:1 selection |
| 1B, 2B, 3B, 4B | Data Input B (Channel 1–4) | Four independent low-side data inputs; selected when A/B = logic high |
| 1Y, 2Y, 3Y, 4Y | Data Output (Channel 1–4) | CMOS push-pull outputs; reflect selected A/B input when G = high; forced low when G = low |
| A/B | Address Select | Global 2:1 select control - determines whether A or B inputs appear at Y outputs |
| G | Output Strobe (Active Low) | Global enable/disable - all Y outputs go low when G = low, regardless of A/B or data states |
| VCC | Positive Supply | Primary power rail (4.5V–5.5V); must be decoupled with 0.1μF capacitor near pin 16 |
| GND | Ground Reference | Return path for all signals and supply current; requires low-impedance connection to system ground plane |
Key Features
| Feature | Design Value |
|---|---|
| Balanced propagation delays | Matched tPLH/tPHL across all four channels ensures simultaneous switching for coherent 4-bit data routing |
| SCR-latchup-resistant process | Guarantees immunity to latch-up under transient overvoltage or ESD events per JEDEC JESD78 |
| TTL-compatible inputs | Accepts standard TTL output voltage levels directly - eliminates need for external level translators in mixed-logic systems |
| ±24mA output drive | Supports fanout to 15 F-series logic gates or drives 50Ω transmission lines up to 85°C without signal degradation |
| Active-low global strobe (G) | Enables hardware-level bus isolation or power-gated operation without additional logic gates or software intervention |
Applications
| Industrial Control Logic | Digital Test Equipment |
|---|---|
Use Scenario: Routing sensor data streams from multiple analog-to-digital converters to a single microcontroller input port based on real-time configuration commands. IC Role / Device Role / Timing Role: Data selector performing time-multiplexed acquisition - four independent 2:1 paths switch between primary and backup ADC channels under A/B and G control. Use Value: Eliminates need for four discrete SPDT analog switches or FPGA-based routing logic, reducing BOM count and PCB area in space-constrained PLC modules. | Use Scenario: Selecting between reference and DUT output signals during automated functional testing of digital ICs on a bed-of-nails fixture. IC Role / Device Role / Timing Role: Signal multiplexer synchronizing test pattern delivery - A/B selects source, G enables/disables output during test vector transitions to prevent glitches. Use Value: Provides deterministic, sub-10ns switching between stimulus and measurement paths, ensuring clean signal capture without metastability or timing skew. |
| Legacy System Bus Expansion | Embedded Microcontroller Peripherals |
Use Scenario: Expanding address/data bus capability of an 8-bit microcontroller by selecting between two peripheral memory banks using decoded address bits. IC Role / Device Role / Timing Role: Address decoder multiplexer - A/B driven by MSB of address bus, G tied to chip-select logic to gate memory access cycles. Use Value: Enables dual-bank memory mapping with zero wait-state overhead and full 5V TTL compatibility, extending life of legacy 8051 or Z80-based designs. | Use Scenario: Sharing a single UART TX/RX line between two external modems via hardware-controlled selection in a remote telemetry node. IC Role / Device Role / Timing Role: Serial interface router - 1A/1B carry TX from MCU, 2A/2B receive RX from modem A/B, 1Y/2Y feed transceiver, controlled by GPIO-driven A/B and G. Use Value: Delivers glitch-free handover between communication links using only one set of UART pins, avoiding software polling or protocol-level arbitration delays. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar data selector/multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74ACT157N | Identical logic function, pinout, and electrical specs; same PDIP-16 package and TI manufacturing process | No functional difference - direct second-source part with identical qualification and reliability data | Select SN74ACT157N for dual-sourcing assurance without design revalidation |
| CD74HC157E | Same pinout and function but HC-family: lower drive (±7.8mA), slower max speed (29ns), wider VCC (2V–6V) | Suitable for low-power or wide-supply applications where 24mA drive or <10ns timing is not required | Choose CD74HC157E only if supply voltage flexibility or reduced static current (<4μA) outweighs speed and drive needs |
Compared with SN74ACT157N, CD74ACT157E offers identical performance and sourcing; versus CD74HC157E, it delivers 3× higher output current and >2× faster propagation - critical for driving terminated lines or interfacing with legacy TTL loads.
Availability
CD74ACT157E is available at Aetrix Electronics and suitable for industrial control logic, digital test equipment, legacy system bus expansion, and embedded microcontroller peripheral routing requiring stable component supply across extended temperature ranges.
Supply support for CD74ACT157E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of heritage in high-reliability logic families.
The CD74ACT157E belongs to TI's Advanced CMOS (ACT) logic series, engineered for speed/power optimization in 5V systems where TTL compatibility, robust ESD tolerance, and precise timing matching are essential.
FAQ
What is the maximum capacitive load the CD74ACT157E can drive while maintaining specified timing?
The CD74ACT157E is characterized for CL = 50 pF in its switching characteristics table. While it can drive larger loads, performance (propagation delay, rise/fall times) degrades beyond this value. For reliable operation within datasheet limits, keep total output capacitance ≤ 50 pF - including trace, probe, and receiver input capacitance. Exceeding this may cause timing violations in high-speed bus applications using CD74ACT157E.
Can unused inputs on the CD74ACT157E be left floating?
No - all unused inputs on the CD74ACT157E must be terminated to either VCC or GND. Floating TTL-compatible CMOS inputs cause excessive power consumption, oscillation, and potential device damage due to undefined internal node voltages. A 10 kΩ pull-up or pull-down resistor is recommended for inputs that may be inactive during certain modes, ensuring stable logic levels and preventing noise coupling into CD74ACT157E.
Does the CD74ACT157E support hot insertion or live insertion into a powered system?
No - CD74ACT157E is not designed for hot insertion. Its absolute maximum ratings specify that VCC must be applied before or simultaneously with input signals. Applying inputs before VCC risks exceeding IIK clamp current limits (±20 mA), potentially damaging internal protection diodes. Always power the CD74ACT157E supply first, then apply logic signals - especially critical in backplane or modular systems using CD74ACT157E.
How does the strobe (G) pin affect output behavior when held low?
When the G pin is held low, all four Y outputs (1Y–4Y) are forced to logic low regardless of the states of A/B or any A/B inputs. This overrides normal multiplexer operation and provides hardware-level output disable - useful for bus contention avoidance, power sequencing, or safe state initialization. The CD74ACT157E maintains this behavior across its full –55°C to 125°C temperature range without timing penalty.
Is the CD74ACT157E RoHS compliant and lead-free?
Yes - the CD74ACT157E is RoHS compliant and features lead-free (NIPDAU) termination per the TI Packaging Information Addendum. It meets EU Directive 2011/65/EU requirements and carries "Yes" in the RoHS column for all active orderable variants, including CD74ACT157E. No lead-based solder or finishes are used in its PDIP-N package construction or plating.
CD74ACT157E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74ACT
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Multiplexer
- Circuit:
- 4 x 2:1
- Independent Circuits:
- 1
- Current - Output High, Low:
- 24mA, 24mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
CD74ACT157E FAQ
1.How can I place an order for CD74ACT157E through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74ACT157E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74ACT157E reliable?
The price and inventory of CD74ACT157E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74ACT157E is usually 5 days.
3.What payment methods are accepted for CD74ACT157E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD74ACT157E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD74ACT157E?
CD74ACT157E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD74ACT157E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74ACT157E?
For technical support, including CD74ACT157E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74ACT157E requirements.
6.How does Aetrix verify that CD74ACT157E is sourced from the original manufacturer or authorized distributors?
All CD74ACT157E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74ACT157E meets industry standards.
7.What is the process for return or replacement of CD74ACT157E?
All CD74ACT157E units undergo pre-shipment inspection (PSI). If there is an issue with CD74ACT157E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74ACT157E part is unused and in its original packaging.
Return procedure for CD74ACT157E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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