Texas Instruments CD74ACT158M96

Overview

CD74ACT158M96 from Texas Instruments is a quadruple 2-line to 1-line data selector/multiplexer in SOIC-16 package, operating at 4.5–5.5 V, delivering ±24-mA output drive, 2.3–9.2 ns propagation delay (A/B→Y), and TTL-compatible inputs. It routes one of two 4-bit data sources to four inverted outputs under common strobe control, used in digital logic routing and address/data path selection.

For engineers reviewing the CD74ACT158M96 datasheet, CD74ACT158M96 pinout, CD74ACT158M96 application, or CD74ACT158M96 equivalent, key selection criteria include strobe-controlled quad multiplexing, CMOS ACT-series speed-power balance, inverted output polarity, ±24-mA drive capability, and –55°C to 125°C industrial temperature range.

Technical Context

The CD74ACT158M96 implements four independent 2:1 multiplexers sharing a single active-low strobe (G) input and a common select line (A/B). When G is high, all Y outputs are forced high regardless of A/B or data inputs; when G is low, each Y selects between corresponding A and B inputs based on A/B state.

It uses SCR-latchup-resistant CMOS process with TTL-voltage-compatible inputs (VIH = 2 V min, VIL = 0.8 V max), supports fanout to 15 F-series devices, and features balanced tPLH/tPHL delays across all channels - critical for synchronous bus arbitration and parallel data path switching.

Key Specifications

Pinout & Package

CD74ACT158M96 is housed in a 16-pin SOIC (D) package (JEDEC MS-012AC, 3.9 mm body width, 1.27 mm pitch), with exposed pad not present and RoHS-compliant NiPdAu lead finish.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2:1 multiplexer applications.

Compared with SN74ACT158N and CD74HC158E, the CD74ACT158M96 uniquely combines SOIC packaging, ±24-mA drive, TTL compatibility, and industrial temperature range - making it optimal for space-constrained, high-reliability 5-V digital systems requiring robust fanout and timing precision.

Availability

CD74ACT158M96 is available at Aetrix Electronics and suitable for microprocessor address decoding, industrial PLC I/O multiplexing, digital test equipment signal routing, and avionics bus arbitration requiring stable component supply across extended temperature and long product lifecycles.

Supply support for CD74ACT158M96 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader founded in 1930, specializing in analog, embedded processing, and logic solutions with broad industrial, automotive, and aerospace qualification.

The CD74ACT158M96 belongs to TI's Advanced CMOS Technology (ACT) logic family - engineered to deliver bipolar-speed performance with CMOS power efficiency for demanding 5-V digital systems.

FAQ

What logic family does the CD74ACT158M96 belong to, and how does it differ from standard 74LS or 74HC devices?

The CD74ACT158M96 belongs to Texas Instruments' Advanced CMOS Technology (ACT) logic family. Unlike 74LS (bipolar, high power), it uses CMOS process with TTL-compatible inputs and delivers ±24-mA output drive - matching LS speed while cutting power consumption. Versus 74HC, CD74ACT158M96 offers stronger drive, faster propagation (9.2 ns vs 24 ns), and guaranteed TTL input thresholds, making CD74ACT158M96 ideal for mixed-logic 5-V systems needing fanout and noise margin.

Does the CD74ACT158M96 provide non-inverting or inverting outputs, and how does that affect system design?

The CD74ACT158M96 provides inverted outputs: Y = NOT(selected input). This means when A/B = low and 1A = high, 1Y = low. System designers must account for this inversion in downstream logic - e.g., pairing with inverting latches or adjusting enable polarity. The inversion is inherent to the device architecture and cannot be disabled; CD74ACT158M96 data sheets confirm "this device provides inverted data" in the functional description.

What is the role of the G (strobe) pin on the CD74ACT158M96, and what happens when it is high?

The G pin on the CD74ACT158M96 is an active-high strobe that globally disables multiplexing. When G = high, all four Y outputs are forced high regardless of A/B or data inputs - effectively isolating downstream logic. When G = low, normal 2:1 selection resumes. This behavior is explicitly defined in the FUNCTION TABLE and logic diagram; CD74ACT158M96 uses G as a three-state-like enable, though outputs remain actively driven (not high-Z).

Can the CD74ACT158M96 operate reliably at 4.5 V, and what are the guaranteed timing limits at that voltage?

Yes, CD74ACT158M96 is fully specified for 4.5 V minimum VCC. At VCC = 4.5 V and TA = –55°C to 125°C, propagation delay from A/B to Y is guaranteed 2.3 ns (min) to 13.5 ns (max), and from G to Y is 3.1 ns (min) to 12.4 ns (max). These values are tabulated in the "Switching Characteristics" section of the CD74ACT158M96 datasheet and validated across temperature and voltage corners.

Is the CD74ACT158M96 pin-compatible with other 74-series multiplexers like the 74ACT157 or 74ACT158 variants?

No, CD74ACT158M96 is not pin-compatible with 74ACT157 (dual 2:1) or alternate 74ACT158 packages such as PDIP. Its SOIC-16 pinout - including dedicated A/B select on Pin 1 and G on Pin 15 - matches only the M-suffix SOIC variant. The CD74ACT158M96 pin map differs from DIP (N-suffix) and ceramic (F-suffix) versions; always verify against the M PACKAGE (TOP VIEW) diagram in the CD74ACT158M96 datasheet.